#include <op_encodings.hh>

Inheritance diagram for Gcn3ISA::Inst_VOP3:

Public Member Functions
	Inst_VOP3 (InFmt_VOP3 *, const std::string &opcode, bool sgpr_dst)

	~Inst_VOP3 ()

int	instSize () const override

void	generateDisassembly () override

bool	isScalarRegister (int opIdx) override

bool	isVectorRegister (int opIdx) override

int	getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override

Public Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst
	GCN3GPUStaticInst (const std::string &opcode)

	~GCN3GPUStaticInst ()

bool	isFlatScratchRegister (int opIdx) override

bool	isExecMaskRegister (int opIdx) override

bool	isSrcOperand (int opIdx) override

bool	isDstOperand (int opIdx) override

int	getOperandSize (int opIdx) override

int	coalescerTokenCount () const override
	Return the number of tokens needed by the coalescer. More...

ScalarRegU32	srcLiteral () const override

Public Member Functions inherited from GPUStaticInst
	GPUStaticInst (const std::string &opcode)

virtual	~GPUStaticInst ()

void	instAddr (int inst_addr)

int	instAddr () const

int	nextInstAddr () const

void	instNum (int num)

int	instNum ()

void	ipdInstNum (int num)

int	ipdInstNum () const

virtual void	execute (GPUDynInstPtr gpuDynInst)=0

const std::string &	disassemble ()

virtual int	getNumOperands ()=0

virtual int	numDstRegOperands ()=0

virtual int	numSrcRegOperands ()=0

int	numDstVecOperands ()

int	numSrcVecOperands ()

int	numDstVecDWORDs ()

int	numSrcVecDWORDs ()

int	numOpdDWORDs (int operandIdx)

bool	isALU () const

bool	isBranch () const

bool	isCondBranch () const

bool	isNop () const

bool	isReturn () const

bool	isEndOfKernel () const

bool	isKernelLaunch () const

bool	isSDWAInst () const

bool	isDPPInst () const

bool	isUnconditionalJump () const

bool	isSpecialOp () const

bool	isWaitcnt () const

bool	isBarrier () const

bool	isMemSync () const

bool	isMemRef () const

bool	isFlat () const

bool	isLoad () const

bool	isStore () const

bool	isAtomic () const

bool	isAtomicNoRet () const

bool	isAtomicRet () const

bool	isScalar () const

bool	readsSCC () const

bool	writesSCC () const

bool	readsVCC () const

bool	writesVCC () const

bool	readsEXEC () const

bool	writesEXEC () const

bool	readsMode () const

bool	writesMode () const

bool	ignoreExec () const

bool	isAtomicAnd () const

bool	isAtomicOr () const

bool	isAtomicXor () const

bool	isAtomicCAS () const

bool	isAtomicExch () const

bool	isAtomicAdd () const

bool	isAtomicSub () const

bool	isAtomicInc () const

bool	isAtomicDec () const

bool	isAtomicMax () const

bool	isAtomicMin () const

bool	isArgLoad () const

bool	isGlobalMem () const

bool	isLocalMem () const

bool	isArgSeg () const

bool	isGlobalSeg () const

bool	isGroupSeg () const

bool	isKernArgSeg () const

bool	isPrivateSeg () const

bool	isReadOnlySeg () const

bool	isSpillSeg () const

bool	isGloballyCoherent () const
	Coherence domain of a memory instruction. More...

bool	isSystemCoherent () const

bool	isF16 () const

bool	isF32 () const

bool	isF64 () const

bool	isFMA () const

bool	isMAC () const

bool	isMAD () const

virtual void	initiateAcc (GPUDynInstPtr gpuDynInst)

virtual void	completeAcc (GPUDynInstPtr gpuDynInst)

virtual uint32_t	getTargetPc ()

void	setFlag (Flags flag)

const std::string &	opcode () const

Protected Attributes
InFmt_VOP3	instData

InFmt_VOP3_1	extData

Protected Attributes inherited from Gcn3ISA::GCN3GPUStaticInst
ScalarRegU32	_srcLiteral
	if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More...

Protected Attributes inherited from GPUStaticInst
const std::string	_opcode

std::string	disassembly

int	_instNum

int	_instAddr

int	srcVecOperands

int	dstVecOperands

int	srcVecDWORDs

int	dstVecDWORDs

int	_ipdInstNum
	Identifier of the immediate post-dominator instruction. More...

std::bitset< Num_Flags >	_flags

Private Member Functions
bool	hasSecondDword (InFmt_VOP3 *)

Private Attributes
const bool	sgprDst
	the v_cmp and readlane instructions in the VOP3 encoding are unique because they are the only instructions that use the VDST field to specify a scalar register destination. More...

Additional Inherited Members
Public Attributes inherited from GPUStaticInst
Enums::StorageClassType	executed_as

Static Public Attributes inherited from GPUStaticInst
static uint64_t	dynamic_id_count

Protected Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst
void	panicUnimplemented () const

Detailed Description

Definition at line 355 of file op_encodings.hh.

Constructor & Destructor Documentation

◆ Inst_VOP3()

Gcn3ISA::Inst_VOP3::Inst_VOP3	(	InFmt_VOP3 *	iFmt,
		const std::string &	opcode,
		bool	sgpr_dst
	)

Definition at line 1214 of file op_encodings.cc.

References Gcn3ISA::GCN3GPUStaticInst::_srcLiteral, extData, and instData.

◆ ~Inst_VOP3()

Gcn3ISA::Inst_VOP3::~Inst_VOP3 ( )

Definition at line 1225 of file op_encodings.cc.

Member Function Documentation

◆ generateDisassembly()

void Gcn3ISA::Inst_VOP3::generateDisassembly ( )

overridevirtual

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 1236 of file op_encodings.cc.

References GPUStaticInst::_opcode, GPUStaticInst::disassembly, extData, GPUStaticInst::getNumOperands(), Gcn3ISA::GCN3GPUStaticInst::getOperandSize(), instData, Gcn3ISA::InFmt_VOP3_1::NEG, GPUStaticInst::numSrcRegOperands(), Gcn3ISA::opSelectorToRegSym(), sgprDst, Gcn3ISA::InFmt_VOP3_1::SRC0, Gcn3ISA::InFmt_VOP3_1::SRC1, Gcn3ISA::InFmt_VOP3_1::SRC2, and Gcn3ISA::InFmt_VOP3::VDST.

◆ getRegisterIndex()

int Gcn3ISA::Inst_VOP3::getRegisterIndex	(	int	opIdx,
		GPUDynInstPtr	gpuDynInst
	)

overridevirtual

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 1442 of file op_encodings.cc.

References extData, fatal, GPUStaticInst::getNumOperands(), instData, GPUStaticInst::numSrcRegOperands(), Gcn3ISA::opSelectorToRegIdx(), GPUStaticInst::readsVCC(), Gcn3ISA::REG_VCC_LO, sgprDst, Gcn3ISA::InFmt_VOP3_1::SRC0, Gcn3ISA::InFmt_VOP3_1::SRC1, Gcn3ISA::InFmt_VOP3_1::SRC2, Gcn3ISA::InFmt_VOP3::VDST, and GPUStaticInst::writesVCC().

◆ hasSecondDword()

bool Gcn3ISA::Inst_VOP3::hasSecondDword ( InFmt_VOP3 * )

private

◆ instSize()

int Gcn3ISA::Inst_VOP3::instSize ( ) const

overridevirtual

Implements GPUStaticInst.

Definition at line 1230 of file op_encodings.cc.

◆ isScalarRegister()

bool Gcn3ISA::Inst_VOP3::isScalarRegister ( int opIdx )

overridevirtual

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 1294 of file op_encodings.cc.

References extData, fatal, GPUStaticInst::getNumOperands(), Gcn3ISA::isScalarReg(), GPUStaticInst::numSrcRegOperands(), GPUStaticInst::readsVCC(), sgprDst, Gcn3ISA::InFmt_VOP3_1::SRC0, Gcn3ISA::InFmt_VOP3_1::SRC1, Gcn3ISA::InFmt_VOP3_1::SRC2, and GPUStaticInst::writesVCC().

◆ isVectorRegister()

bool Gcn3ISA::Inst_VOP3::isVectorRegister ( int opIdx )

overridevirtual

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 1368 of file op_encodings.cc.

References extData, fatal, GPUStaticInst::getNumOperands(), Gcn3ISA::isVectorReg(), GPUStaticInst::numSrcRegOperands(), GPUStaticInst::readsVCC(), sgprDst, Gcn3ISA::InFmt_VOP3_1::SRC0, Gcn3ISA::InFmt_VOP3_1::SRC1, Gcn3ISA::InFmt_VOP3_1::SRC2, and GPUStaticInst::writesVCC().

Member Data Documentation

◆ extData

InFmt_VOP3_1 Gcn3ISA::Inst_VOP3::extData

protected

Definition at line 372 of file op_encodings.hh.

◆ instData

InFmt_VOP3 Gcn3ISA::Inst_VOP3::instData

protected

Definition at line 370 of file op_encodings.hh.

◆ sgprDst

const bool Gcn3ISA::Inst_VOP3::sgprDst

private

the v_cmp and readlane instructions in the VOP3 encoding are unique because they are the only instructions that use the VDST field to specify a scalar register destination.

for VOP3::V_CMP insts VDST specifies the arbitrary SGPR pair used to write VCC. for V_READLANE VDST specifies the SGPR to return the value of the selected lane in the source VGPR from which we are reading.

Definition at line 386 of file op_encodings.hh.

Referenced by generateDisassembly(), getRegisterIndex(), isScalarRegister(), and isVectorRegister().

The documentation for this class was generated from the following files:

arch/gcn3/insts/op_encodings.hh
arch/gcn3/insts/op_encodings.cc

Public Member Functions

Protected Attributes

Private Member Functions

Private Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ Inst_VOP3()

◆ ~Inst_VOP3()

Member Function Documentation

◆ generateDisassembly()

◆ getRegisterIndex()

◆ hasSecondDword()

◆ instSize()

◆ isScalarRegister()

◆ isVectorRegister()

Member Data Documentation

◆ extData

◆ instData

◆ sgprDst