gem5  v20.1.0.0
Classes | Namespaces | Macros | Enumerations | Functions | Variables
i8254xGBe_defs.hh File Reference
#include "base/bitfield.hh"

Go to the source code of this file.

Classes

struct  iGbReg::RxDesc
 
struct  iGbReg::TxDesc
 
struct  iGbReg::Regs
 
struct  iGbReg::Regs::Reg< T >
 
struct  iGbReg::Regs::CTRL
 
struct  iGbReg::Regs::STATUS
 
struct  iGbReg::Regs::EECD
 
struct  iGbReg::Regs::EERD
 
struct  iGbReg::Regs::CTRL_EXT
 
struct  iGbReg::Regs::MDIC
 
struct  iGbReg::Regs::ICR
 
struct  iGbReg::Regs::ITR
 
struct  iGbReg::Regs::RCTL
 
struct  iGbReg::Regs::FCTTV
 
struct  iGbReg::Regs::TCTL
 
struct  iGbReg::Regs::PBA
 
struct  iGbReg::Regs::FCRTL
 
struct  iGbReg::Regs::FCRTH
 
struct  iGbReg::Regs::RDBA
 
struct  iGbReg::Regs::RDLEN
 
struct  iGbReg::Regs::SRRCTL
 
struct  iGbReg::Regs::RDH
 
struct  iGbReg::Regs::RDT
 
struct  iGbReg::Regs::RDTR
 
struct  iGbReg::Regs::RXDCTL
 
struct  iGbReg::Regs::RADV
 
struct  iGbReg::Regs::RSRPD
 
struct  iGbReg::Regs::TDBA
 
struct  iGbReg::Regs::TDLEN
 
struct  iGbReg::Regs::TDH
 
struct  iGbReg::Regs::TXDCA_CTL
 
struct  iGbReg::Regs::TDT
 
struct  iGbReg::Regs::TIDV
 
struct  iGbReg::Regs::TXDCTL
 
struct  iGbReg::Regs::TADV
 
struct  iGbReg::Regs::RXCSUM
 
struct  iGbReg::Regs::RFCTL
 
struct  iGbReg::Regs::MANC
 
struct  iGbReg::Regs::SWSM
 
struct  iGbReg::Regs::FWSM
 

Namespaces

 iGbReg
 
 iGbReg::TxdOp
 

Macros

#define ADD_FIELD32(NAME, OFFSET, BITS)
 
#define ADD_FIELD64(NAME, OFFSET, BITS)
 

Enumerations

enum  iGbReg::IntTypes {
  iGbReg::IT_NONE = 0x00000, iGbReg::IT_TXDW = 0x00001, iGbReg::IT_TXQE = 0x00002, iGbReg::IT_LSC = 0x00004,
  iGbReg::IT_RXSEQ = 0x00008, iGbReg::IT_RXDMT = 0x00010, iGbReg::IT_RXO = 0x00040, iGbReg::IT_RXT = 0x00080,
  iGbReg::IT_MADC = 0x00200, iGbReg::IT_RXCFG = 0x00400, iGbReg::IT_GPI0 = 0x02000, iGbReg::IT_GPI1 = 0x04000,
  iGbReg::IT_TXDLOW = 0x08000, iGbReg::IT_SRPD = 0x10000, iGbReg::IT_ACK = 0x20000
}
 

Functions

bool iGbReg::TxdOp::isLegacy (TxDesc *d)
 
uint8_t iGbReg::TxdOp::getType (TxDesc *d)
 
bool iGbReg::TxdOp::isType (TxDesc *d, uint8_t type)
 
bool iGbReg::TxdOp::isTypes (TxDesc *d, uint8_t t1, uint8_t t2)
 
bool iGbReg::TxdOp::isAdvDesc (TxDesc *d)
 
bool iGbReg::TxdOp::isContext (TxDesc *d)
 
bool iGbReg::TxdOp::isData (TxDesc *d)
 
Addr iGbReg::TxdOp::getBuf (TxDesc *d)
 
Addr iGbReg::TxdOp::getLen (TxDesc *d)
 
void iGbReg::TxdOp::setDd (TxDesc *d)
 
bool iGbReg::TxdOp::ide (TxDesc *d)
 
bool iGbReg::TxdOp::vle (TxDesc *d)
 
bool iGbReg::TxdOp::rs (TxDesc *d)
 
bool iGbReg::TxdOp::ic (TxDesc *d)
 
bool iGbReg::TxdOp::tse (TxDesc *d)
 
bool iGbReg::TxdOp::ifcs (TxDesc *d)
 
bool iGbReg::TxdOp::eop (TxDesc *d)
 
bool iGbReg::TxdOp::ip (TxDesc *d)
 
bool iGbReg::TxdOp::tcp (TxDesc *d)
 
uint8_t iGbReg::TxdOp::getCso (TxDesc *d)
 
uint8_t iGbReg::TxdOp::getCss (TxDesc *d)
 
bool iGbReg::TxdOp::ixsm (TxDesc *d)
 
bool iGbReg::TxdOp::txsm (TxDesc *d)
 
int iGbReg::TxdOp::tucse (TxDesc *d)
 
int iGbReg::TxdOp::tucso (TxDesc *d)
 
int iGbReg::TxdOp::tucss (TxDesc *d)
 
int iGbReg::TxdOp::ipcse (TxDesc *d)
 
int iGbReg::TxdOp::ipcso (TxDesc *d)
 
int iGbReg::TxdOp::ipcss (TxDesc *d)
 
int iGbReg::TxdOp::mss (TxDesc *d)
 
int iGbReg::TxdOp::hdrlen (TxDesc *d)
 
int iGbReg::TxdOp::getTsoLen (TxDesc *d)
 
int iGbReg::TxdOp::utcmd (TxDesc *d)
 

Variables

const uint32_t iGbReg::REG_CTRL = 0x00000
 
const uint32_t iGbReg::REG_STATUS = 0x00008
 
const uint32_t iGbReg::REG_EECD = 0x00010
 
const uint32_t iGbReg::REG_EERD = 0x00014
 
const uint32_t iGbReg::REG_CTRL_EXT = 0x00018
 
const uint32_t iGbReg::REG_MDIC = 0x00020
 
const uint32_t iGbReg::REG_FCAL = 0x00028
 
const uint32_t iGbReg::REG_FCAH = 0x0002C
 
const uint32_t iGbReg::REG_FCT = 0x00030
 
const uint32_t iGbReg::REG_VET = 0x00038
 
const uint32_t iGbReg::REG_PBA = 0x01000
 
const uint32_t iGbReg::REG_ICR = 0x000C0
 
const uint32_t iGbReg::REG_ITR = 0x000C4
 
const uint32_t iGbReg::REG_ICS = 0x000C8
 
const uint32_t iGbReg::REG_IMS = 0x000D0
 
const uint32_t iGbReg::REG_IMC = 0x000D8
 
const uint32_t iGbReg::REG_IAM = 0x000E0
 
const uint32_t iGbReg::REG_RCTL = 0x00100
 
const uint32_t iGbReg::REG_FCTTV = 0x00170
 
const uint32_t iGbReg::REG_TIPG = 0x00410
 
const uint32_t iGbReg::REG_AIFS = 0x00458
 
const uint32_t iGbReg::REG_LEDCTL = 0x00e00
 
const uint32_t iGbReg::REG_EICR = 0x01580
 
const uint32_t iGbReg::REG_IVAR0 = 0x01700
 
const uint32_t iGbReg::REG_FCRTL = 0x02160
 
const uint32_t iGbReg::REG_FCRTH = 0x02168
 
const uint32_t iGbReg::REG_RDBAL = 0x02800
 
const uint32_t iGbReg::REG_RDBAH = 0x02804
 
const uint32_t iGbReg::REG_RDLEN = 0x02808
 
const uint32_t iGbReg::REG_SRRCTL = 0x0280C
 
const uint32_t iGbReg::REG_RDH = 0x02810
 
const uint32_t iGbReg::REG_RDT = 0x02818
 
const uint32_t iGbReg::REG_RDTR = 0x02820
 
const uint32_t iGbReg::REG_RXDCTL = 0x02828
 
const uint32_t iGbReg::REG_RADV = 0x0282C
 
const uint32_t iGbReg::REG_TCTL = 0x00400
 
const uint32_t iGbReg::REG_TDBAL = 0x03800
 
const uint32_t iGbReg::REG_TDBAH = 0x03804
 
const uint32_t iGbReg::REG_TDLEN = 0x03808
 
const uint32_t iGbReg::REG_TDH = 0x03810
 
const uint32_t iGbReg::REG_TXDCA_CTL = 0x03814
 
const uint32_t iGbReg::REG_TDT = 0x03818
 
const uint32_t iGbReg::REG_TIDV = 0x03820
 
const uint32_t iGbReg::REG_TXDCTL = 0x03828
 
const uint32_t iGbReg::REG_TADV = 0x0382C
 
const uint32_t iGbReg::REG_TDWBAL = 0x03838
 
const uint32_t iGbReg::REG_TDWBAH = 0x0383C
 
const uint32_t iGbReg::REG_CRCERRS = 0x04000
 
const uint32_t iGbReg::REG_RXCSUM = 0x05000
 
const uint32_t iGbReg::REG_RLPML = 0x05004
 
const uint32_t iGbReg::REG_RFCTL = 0x05008
 
const uint32_t iGbReg::REG_MTA = 0x05200
 
const uint32_t iGbReg::REG_RAL = 0x05400
 
const uint32_t iGbReg::REG_RAH = 0x05404
 
const uint32_t iGbReg::REG_VFTA = 0x05600
 
const uint32_t iGbReg::REG_WUC = 0x05800
 
const uint32_t iGbReg::REG_WUFC = 0x05808
 
const uint32_t iGbReg::REG_WUS = 0x05810
 
const uint32_t iGbReg::REG_MANC = 0x05820
 
const uint32_t iGbReg::REG_SWSM = 0x05B50
 
const uint32_t iGbReg::REG_FWSM = 0x05B54
 
const uint32_t iGbReg::REG_SWFWSYNC = 0x05B5C
 
const uint8_t iGbReg::EEPROM_READ_OPCODE_SPI = 0x03
 
const uint8_t iGbReg::EEPROM_RDSR_OPCODE_SPI = 0x05
 
const uint8_t iGbReg::EEPROM_SIZE = 64
 
const uint16_t iGbReg::EEPROM_CSUM = 0xBABA
 
const uint8_t iGbReg::VLAN_FILTER_TABLE_SIZE = 128
 
const uint8_t iGbReg::RCV_ADDRESS_TABLE_SIZE = 24
 
const uint8_t iGbReg::MULTICAST_TABLE_SIZE = 128
 
const uint32_t iGbReg::STATS_REGS_SIZE = 0x228
 
const uint8_t iGbReg::PHY_PSTATUS = 0x1
 
const uint8_t iGbReg::PHY_PID = 0x2
 
const uint8_t iGbReg::PHY_EPID = 0x3
 
const uint8_t iGbReg::PHY_GSTATUS = 10
 
const uint8_t iGbReg::PHY_EPSTATUS = 15
 
const uint8_t iGbReg::PHY_AGC = 18
 
const uint16_t iGbReg::RXDS_DYNINT = 0x800
 
const uint16_t iGbReg::RXDS_UDPV = 0x400
 
const uint16_t iGbReg::RXDS_CRCV = 0x100
 
const uint16_t iGbReg::RXDS_PIF = 0x080
 
const uint16_t iGbReg::RXDS_IPCS = 0x040
 
const uint16_t iGbReg::RXDS_TCPCS = 0x020
 
const uint16_t iGbReg::RXDS_UDPCS = 0x010
 
const uint16_t iGbReg::RXDS_VP = 0x008
 
const uint16_t iGbReg::RXDS_IXSM = 0x004
 
const uint16_t iGbReg::RXDS_EOP = 0x002
 
const uint16_t iGbReg::RXDS_DD = 0x001
 
const uint8_t iGbReg::RXDE_RXE = 0x80
 
const uint8_t iGbReg::RXDE_IPE = 0x40
 
const uint8_t iGbReg::RXDE_TCPE = 0x20
 
const uint8_t iGbReg::RXDE_SEQ = 0x04
 
const uint8_t iGbReg::RXDE_SE = 0x02
 
const uint8_t iGbReg::RXDE_CE = 0x01
 
const uint16_t iGbReg::RXDEE_HBO = 0x008
 
const uint16_t iGbReg::RXDEE_CE = 0x010
 
const uint16_t iGbReg::RXDEE_LE = 0x020
 
const uint16_t iGbReg::RXDEE_PE = 0x080
 
const uint16_t iGbReg::RXDEE_OSE = 0x100
 
const uint16_t iGbReg::RXDEE_USE = 0x200
 
const uint16_t iGbReg::RXDEE_TCPE = 0x400
 
const uint16_t iGbReg::RXDEE_IPE = 0x800
 
const uint8_t iGbReg::RXDT_LEGACY = 0x00
 
const uint8_t iGbReg::RXDT_ADV_ONEBUF = 0x01
 
const uint8_t iGbReg::RXDT_ADV_SPLIT_A = 0x05
 
const uint16_t iGbReg::RXDP_IPV4 = 0x001
 
const uint16_t iGbReg::RXDP_IPV4E = 0x002
 
const uint16_t iGbReg::RXDP_IPV6 = 0x004
 
const uint16_t iGbReg::RXDP_IPV6E = 0x008
 
const uint16_t iGbReg::RXDP_TCP = 0x010
 
const uint16_t iGbReg::RXDP_UDP = 0x020
 
const uint16_t iGbReg::RXDP_SCTP = 0x040
 
const uint16_t iGbReg::RXDP_NFS = 0x080
 
const uint8_t iGbReg::TxdOp::TXD_CNXT = 0x0
 
const uint8_t iGbReg::TxdOp::TXD_DATA = 0x1
 
const uint8_t iGbReg::TxdOp::TXD_ADVCNXT = 0x2
 
const uint8_t iGbReg::TxdOp::TXD_ADVDATA = 0x3
 

Macro Definition Documentation

◆ ADD_FIELD32

#define ADD_FIELD32 (   NAME,
  OFFSET,
  BITS 
)
Value:
inline uint32_t NAME() { return bits(_data, OFFSET+BITS-1, OFFSET); } \
inline void NAME(uint32_t d) { replaceBits(_data, OFFSET+BITS-1, OFFSET,d); }

Definition at line 289 of file i8254xGBe_defs.hh.

◆ ADD_FIELD64

#define ADD_FIELD64 (   NAME,
  OFFSET,
  BITS 
)
Value:
inline uint64_t NAME() { return bits(_data, OFFSET+BITS-1, OFFSET); } \
inline void NAME(uint64_t d) { replaceBits(_data, OFFSET+BITS-1, OFFSET,d); }

Definition at line 293 of file i8254xGBe_defs.hh.

replaceBits
void replaceBits(T &val, int first, int last, B bit_val)
A convenience function to replace bits first to last of val with bit_val in place.
Definition: bitfield.hh:179
ArmISA::d
Bitfield< 9 > d
Definition: miscregs_types.hh:60
bits
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:75
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