The bit manipulating API.

These are a collection of methods for bit manipulations. More...

Functions
uint64_t	mask (int nbits)
	Generate a 64-bit mask of 'nbits' 1s, right justified. More...
template<class T >
T	bits (T val, int first, int last)
	Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it. More...
template<class T >
T	bits (T val, int bit)
	Extract the bit from this position from 'val' and right justify it. More...
template<class T >
T	mbits (T val, int first, int last)
	Mask off the given bits in place like bits() but without shifting. More...
uint64_t	mask (int first, int last)
template<int N>
uint64_t	sext (uint64_t val)
	Sign-extend an N-bit value to 64 bits. More...
template<class T , class B >
T	insertBits (T val, int first, int last, B bit_val)
	Returns val with bits first to last set to the LSBs of bit_val. More...
template<class T , class B >
T	insertBits (T val, int bit, B bit_val)
	Overloaded for access to only one bit in value. More...
template<class T , class B >
void	replaceBits (T &val, int first, int last, B bit_val)
	A convenience function to replace bits first to last of val with bit_val in place. More...
template<class T , class B >
void	replaceBits (T &val, int bit, B bit_val)
	Overloaded function to allow to access only 1 bit. More...
template<class T >
T	reverseBits (T val, std::size_t size=sizeof(T))
	Takes a variable lenght word and returns the mirrored version (Bit by bit, LSB=>MSB). More...
int	findMsbSet (uint64_t val)
	Returns the bit position of the MSB that is set in the input. More...
int	findLsbSet (uint64_t val)
	Returns the bit position of the LSB that is set in the input. More...
template<class T >
bool	isPow2 (T v)
	Checks if a number is a power of two, or zero. More...
int	popCount (uint64_t val)
	Returns the number of set ones in the provided value. More...
uint64_t	alignToPowerOfTwo (uint64_t val)
	Align to the next highest power of two. More...
int	ctz32 (uint32_t value)
	Count trailing zeros in a 32-bit value. More...
int	ctz64 (uint64_t value)
	Count trailing zeros in a 64-bit value. More...

Detailed Description

These are a collection of methods for bit manipulations.

Function Documentation

alignToPowerOfTwo()

uint64_t alignToPowerOfTwo ( uint64_t  val )

inline

Align to the next highest power of two.

The number passed in is aligned to the next highest power of two, if it is not already a power of two. Please note that if 0 is passed in, 0 is returned.

This code has been modified from the following: http://graphics.stanford.edu/~seander/bithacks.html#RoundUpPowerOf2

Definition at line 316 of file bitfield.hh.

References X86ISA::val.

Referenced by Compressor::Multi::compress(), PciVirtIO::PciVirtIO(), and TEST().

bits() [1/2]

template<class T >

T bits ( T  val, int  bit  )

inline

Extract the bit from this position from 'val' and right justify it.

Definition at line 90 of file bitfield.hh.

References bits(), and X86ISA::val.

bits() [2/2]

template<class T >

T bits ( T  val, int  first, int  last  )

inline

Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.

MSB is numbered 63, LSB is 0.

Definition at line 75 of file bitfield.hh.

References mask(), and X86ISA::val.

Referenced by SparcISA::PageTableEntry::_size(), AddrRange::addIntlvBits(), ArmISA::addPAC(), ArmISA::VectorCatch::addressMatching(), sc_gem5::VcdTraceFile::addTraceVal(), ArmISA::TableWalker::LongDescriptor::af(), ArmISA::TableWalker::L1Descriptor::ap(), ArmISA::TableWalker::L2Descriptor::ap(), ArmISA::TableWalker::LongDescriptor::ap(), ArmISA::TableWalker::LongDescriptor::apTable(), ArmISA::ArmStaticInst::ArmStaticInst(), ArmISA::TableWalker::LongDescriptor::attrIndx(), ArmISA::auth(), bits(), ArmISA::bitsToFp(), ArmISA::calculateTBI(), CopyEngine::CopyEngineChannel::channelRead(), ArmISA::TableWalker::checkAddrSizeFaultAArch64(), X86ISA::Interrupts::checkInterrupts(), X86ISA::Interrupts::checkInterruptsRaw(), DRAMInterface::chooseNextFRFCFS(), ItsCommand::collectionOutOfRange(), ArmISA::WatchPoint::compareAddress(), ArmISA::TableWalker::LongDescriptor::contiguousHint(), SparcISA::PageTableEntry::cp(), ArmISA::ArmStaticInst::cpsrWriteByInstr(), CustomNoMaliGpu::CustomNoMaliGpu(), SparcISA::PageTableEntry::cv(), GenericPciHost::decodeAddress(), PseudoInst::decodeAddrOffset(), ArmISA::decodeMrsMsrBankedReg(), Compressor::DictionaryCompressor< T >::MaskedPattern< mask >::decompress(), Loader::ElfObject::determineArch(), GPUDynInst::doApertureCheck(), X86ISA::doCpuid(), ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doL2Descriptor(), ArmISA::TableWalker::L1Descriptor::domain(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), SMMUTranslationProcess::doReadCD(), SMMUTranslationProcess::doReadSTE(), X86ISA::Decoder::doVex2Of3State(), X86ISA::Decoder::doVex3Of3State(), MipsISA::dspDpaq(), MipsISA::dspDpsq(), MipsISA::dspExtp(), MipsISA::dspExtpd(), MipsISA::dspExtr(), MipsISA::dspPick(), MipsISA::dspShll(), MipsISA::dspShra(), MipsISA::dspShrl(), X86ISA::EndBitUnion(), iGbReg::TxdOp::eop(), GenericTimer::CoreTimers::EventStream::eventTargetValue(), Gcn3ISA::Inst_SOP2__S_ADD_I32::execute(), Gcn3ISA::Inst_SOP2__S_SUB_I32::execute(), Gcn3ISA::Inst_SOP2__S_LSHL_B32::execute(), Gcn3ISA::Inst_SOP2__S_LSHL_B64::execute(), Gcn3ISA::Inst_SOP2__S_LSHR_B32::execute(), Gcn3ISA::Inst_SOP2__S_LSHR_B64::execute(), Gcn3ISA::Inst_SOP2__S_ASHR_I32::execute(), Gcn3ISA::Inst_SOP2__S_ASHR_I64::execute(), Gcn3ISA::Inst_SOP2__S_BFM_B32::execute(), Gcn3ISA::Inst_SOP2__S_BFM_B64::execute(), Gcn3ISA::Inst_SOP2__S_BFE_U32::execute(), Gcn3ISA::Inst_SOP2__S_BFE_I32::execute(), Gcn3ISA::Inst_SOP2__S_BFE_U64::execute(), Gcn3ISA::Inst_SOP2__S_BFE_I64::execute(), Gcn3ISA::Inst_SOPK__S_ADDK_I32::execute(), Gcn3ISA::Inst_SOP1__S_SEXT_I32_I8::execute(), Gcn3ISA::Inst_SOP1__S_SEXT_I32_I16::execute(), Gcn3ISA::Inst_SOP1__S_BITSET0_B32::execute(), Gcn3ISA::Inst_SOP1__S_BITSET0_B64::execute(), Gcn3ISA::Inst_SOP1__S_BITSET1_B32::execute(), Gcn3ISA::Inst_SOP1__S_BITSET1_B64::execute(), Gcn3ISA::Inst_SOPC__S_BITCMP0_B32::execute(), Gcn3ISA::Inst_SOPC__S_BITCMP1_B32::execute(), Gcn3ISA::Inst_SOPC__S_BITCMP0_B64::execute(), Gcn3ISA::Inst_SOPC__S_BITCMP1_B64::execute(), Gcn3ISA::Inst_VOP2__V_CNDMASK_B32::execute(), Gcn3ISA::Inst_VOP2__V_MUL_I32_I24::execute(), Gcn3ISA::Inst_VOP2__V_MUL_HI_I32_I24::execute(), Gcn3ISA::Inst_VOP2__V_MUL_U32_U24::execute(), Gcn3ISA::Inst_VOP2__V_MUL_HI_U32_U24::execute(), Gcn3ISA::Inst_VOP2__V_LSHRREV_B32::execute(), Gcn3ISA::Inst_VOP2__V_ASHRREV_I32::execute(), Gcn3ISA::Inst_VOP2__V_LSHLREV_B32::execute(), Gcn3ISA::Inst_VOP2__V_ADDC_U32::execute(), Gcn3ISA::Inst_VOP2__V_SUBB_U32::execute(), Gcn3ISA::Inst_VOP2__V_SUBBREV_U32::execute(), Gcn3ISA::Inst_VOP2__V_LSHLREV_B16::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE0::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE1::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE2::execute(), Gcn3ISA::Inst_VOP1__V_CVT_F32_UBYTE3::execute(), Gcn3ISA::Inst_VOPC__V_CMP_CLASS_F32::execute(), Gcn3ISA::Inst_VOPC__V_CMPX_CLASS_F32::execute(), Gcn3ISA::Inst_VOPC__V_CMP_CLASS_F64::execute(), Gcn3ISA::Inst_VOPC__V_CMPX_CLASS_F64::execute(), Gcn3ISA::Inst_VOP3__V_CMP_CLASS_F32::execute(), Gcn3ISA::Inst_VOP3__V_CMPX_CLASS_F32::execute(), Gcn3ISA::Inst_VOP3__V_CMP_CLASS_F64::execute(), Gcn3ISA::Inst_VOP3__V_CMPX_CLASS_F64::execute(), Gcn3ISA::Inst_VOP3__V_CNDMASK_B32::execute(), Gcn3ISA::Inst_VOP3__V_MUL_I32_I24::execute(), Gcn3ISA::Inst_VOP3__V_MUL_HI_I32_I24::execute(), Gcn3ISA::Inst_VOP3__V_MUL_U32_U24::execute(), Gcn3ISA::Inst_VOP3__V_MUL_HI_U32_U24::execute(), Gcn3ISA::Inst_VOP3__V_LSHRREV_B32::execute(), Gcn3ISA::Inst_VOP3__V_ASHRREV_I32::execute(), Gcn3ISA::Inst_VOP3__V_LSHLREV_B32::execute(), Gcn3ISA::Inst_VOP3__V_ADDC_U32::execute(), Gcn3ISA::Inst_VOP3__V_SUBB_U32::execute(), Gcn3ISA::Inst_VOP3__V_SUBBREV_U32::execute(), Gcn3ISA::Inst_VOP3__V_LSHLREV_B16::execute(), Gcn3ISA::Inst_VOP3__V_LSHRREV_B16::execute(), Gcn3ISA::Inst_VOP3__V_ASHRREV_I16::execute(), Gcn3ISA::Inst_VOP3__V_CVT_F32_UBYTE0::execute(), Gcn3ISA::Inst_VOP3__V_CVT_F32_UBYTE1::execute(), Gcn3ISA::Inst_VOP3__V_CVT_F32_UBYTE2::execute(), Gcn3ISA::Inst_VOP3__V_CVT_F32_UBYTE3::execute(), Gcn3ISA::Inst_VOP3__V_MAD_I32_I24::execute(), Gcn3ISA::Inst_VOP3__V_MAD_U32_U24::execute(), Gcn3ISA::Inst_VOP3__V_BFE_U32::execute(), Gcn3ISA::Inst_VOP3__V_BFE_I32::execute(), Gcn3ISA::Inst_VOP3__V_LERP_U8::execute(), Gcn3ISA::Inst_VOP3__V_ALIGNBIT_B32::execute(), Gcn3ISA::Inst_VOP3__V_ALIGNBYTE_B32::execute(), Gcn3ISA::Inst_VOP3__V_SAD_U8::execute(), Gcn3ISA::Inst_VOP3__V_SAD_HI_U8::execute(), Gcn3ISA::Inst_VOP3__V_SAD_U16::execute(), Gcn3ISA::Inst_VOP3__V_CVT_PK_U8_F32::execute(), Gcn3ISA::Inst_VOP3__V_DIV_FMAS_F64::execute(), Gcn3ISA::Inst_VOP3__V_MBCNT_LO_U32_B32::execute(), Gcn3ISA::Inst_VOP3__V_MBCNT_HI_U32_B32::execute(), Gcn3ISA::Inst_VOP3__V_LSHLREV_B64::execute(), Gcn3ISA::Inst_VOP3__V_LSHRREV_B64::execute(), Gcn3ISA::Inst_VOP3__V_ASHRREV_I64::execute(), Gcn3ISA::Inst_VOP3__V_BFM_B32::execute(), Gcn3ISA::Inst_DS__DS_SWIZZLE_B32::execute(), Gcn3ISA::Inst_DS__DS_PERMUTE_B32::execute(), Gcn3ISA::Inst_DS__DS_BPERMUTE_B32::execute(), ArmISA::ArmStaticInst::extendReg64(), findLsbSet(), findMsbSet(), findNegative(), ArmISA::fixFpDFpSDest(), ArmISA::fixFpSFpDDest(), ArmISA::fplibFPToFixedJS(), ArmISA::fpRecipEstimate(), ArmISA::fprSqrtEstimate(), ArmISA::fpToBits(), MipsISA::genCCVector(), Gicv3CPUInterface::generateSGI(), GuestABI::Argument< ABI, Arg, typename std::enable_if<!ABI::template IsWide< Arg >::value >::type >::get(), ArmISA::BrkPoint::getAddrfromReg(), ArmISA::WatchPoint::getAddrfromReg(), ArmISA::BrkPoint::getContextfromReg(), iGbReg::TxdOp::getCso(), iGbReg::TxdOp::getCss(), ArmISA::AbortFault< DataAbort >::getFsr(), iGbReg::TxdOp::getLen(), X86ISA::Interrupts::getRegArrayBit(), ArmISA::getRestoredITBits(), MPP_StatisticalCorrector_8KB::getSizeInBits(), MPP_StatisticalCorrector_64KB::getSizeInBits(), TAGEBase::getSizeInBits(), BitfieldBackend::Unsigned< Storage, first, last >::getter(), BitfieldBackend::Signed< Storage, first, last >::getter(), X86ISA::SegDescriptorLimit::getter(), iGbReg::TxdOp::getTsoLen(), iGbReg::TxdOp::getType(), X86ISA::I8259::getVector(), ArmISA::BrkPoint::getVMIDfromReg(), ArmISA::TableWalker::L1Descriptor::global(), ArmISA::TableWalker::L2Descriptor::global(), ArmISA::TableWalker::LongDescriptor::global(), GenericTimer::handleStream(), BloomFilter::H3::hash(), BloomFilter::Bulk::hash(), BloomFilter::MultiBitSel::hash(), BloomFilter::Block::hash(), iGbReg::TxdOp::hdrlen(), Gicv3CPUInterface::hppviCanPreempt(), iGbReg::TxdOp::ic(), iGbReg::TxdOp::ide(), SparcISA::PageTableEntry::ie(), iGbReg::TxdOp::ifcs(), V7LPageTableOps::index(), V8PageTableOps4k::index(), V8PageTableOps16k::index(), V8PageTableOps64k::index(), X86ISA::X86_64Process::initState(), PowerISA::PowerStaticInst::insertCRField(), ArmISA::TableWalker::L2Descriptor::invalid(), ItsCommand::invall(), RiscvISA::RiscvFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), iGbReg::TxdOp::ip(), iGbReg::TxdOp::ipcse(), iGbReg::TxdOp::ipcso(), iGbReg::TxdOp::ipcss(), ArmISA::SelfDebug::isDebugEnabledForEL32(), PowerISA::FloatOp::isDenormalized(), GicV2::isGroup0(), PowerISA::FloatOp::isInfinity(), PciDevice::isLargeBAR(), iGbReg::TxdOp::isLegacy(), GicV2::isLevelSensitive(), PowerISA::FloatOp::isNan(), MipsISA::isNan(), PowerISA::FloatOp::isNegative(), PowerISA::FloatOp::isNormalized(), PowerISA::FloatOp::isQnan(), MipsISA::isQnan(), ArmISA::UndefinedInstruction::iss(), ArmISA::SecureMonitorCall::iss(), PowerISA::FloatOp::isSnan(), MipsISA::isSnan(), V7LPageTableOps::isWritable(), V8PageTableOps4k::isWritable(), V8PageTableOps16k::isWritable(), V8PageTableOps64k::isWritable(), PowerISA::FloatOp::isZero(), iGbReg::TxdOp::ixsm(), ArmISA::TableWalker::L2Descriptor::large(), SparcISA::PageTableEntry::locked(), ArmISA::MacroMemOp::MacroMemOp(), SparcISA::TLB::MakeTsbPtr(), ItsCommand::mapc(), ItsCommand::mapd(), ItsCommand::mapi(), ItsCommand::mapti(), ArmISA::TableWalker::LongDescriptor::memAttr(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), SparcISA::Decoder::moreBytes(), ItsCommand::movall(), ItsCommand::movi(), iGbReg::TxdOp::mss(), ArmISA::TableWalker::LongDescriptor::nextDescAddr(), SparcISA::PageTableEntry::nofault(), sc_gem5::VcdTraceValTime::output(), sc_gem5::VcdTraceValInt< T >::output(), Gicv3Its::pageAddress(), V7LPageTableOps::pageMask(), V8PageTableOps4k::pageMask(), V8PageTableOps16k::pageMask(), V8PageTableOps64k::pageMask(), BloomFilter::Bulk::permute(), SparcISA::PageTableEntry::pfn(), ArmISA::TableWalker::L1Descriptor::pfn(), ArmISA::TableWalker::L2Descriptor::pfn(), ArmISA::TableWalker::LongDescriptor::pfn(), SparcISA::PageTableEntry::populate(), ArmISA::PredImmOp::PredImmOp(), MsrBase::printMsrBase(), SparcISA::PageTableEntry::priv(), ArmISA::Decoder::process(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkAArch64(), ArmISA::TableWalker::processWalkLPAE(), ArmISA::purifyTaggedAddr(), ArmISA::TableWalker::LongDescriptor::pxn(), ArmISA::TableWalker::LongDescriptor::pxnTable(), Gcn3ISA::quadMask(), X86ISA::LongModePTE::read(), FastModel::CortexA76TC::readCCRegFlat(), IdeController::readConfig(), GicV2::readCpu(), SparcISA::ISA::readMiscRegNoEffect(), Gcn3ISA::ScalarOperand< DataType, Const, sizeof(DataType)/sizeof(VecElemU32) >::readSpecialVal(), PS2Keyboard::recv(), X86ISA::I8259::requestInterrupt(), Sp804::Timer::restartCounter(), ArmISA::HTMCheckpoint::restore(), iGbReg::TxdOp::rs(), ArmISA::TableWalker::LongDescriptor::rw(), ArmISA::TableWalker::LongDescriptor::rwTable(), SatCounter::SatCounter(), ArmISA::ArmStaticInst::saturateOp(), Gcn3ISA::sdwaInstDstImpl_helper(), Gcn3ISA::sdwaInstSrcImpl_helper(), ArmISA::TableWalker::L1Descriptor::secure(), ArmISA::TableWalker::LongDescriptor::secure(), ArmISA::TableWalker::LongDescriptor::secureTable(), Iris::Interrupts::serialize(), PciDevice::serialize(), ArmISA::SelfDebug::setbSDD(), MultiperspectivePerceptron::setExtraBits(), SparcISA::ISA::setFSReg(), ArmISA::SelfDebug::setMDBGen(), ArmISA::SelfDebug::setMDSCRvals(), RiscvISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), ArmISA::ISA::setMiscRegNoEffect(), X86ISA::Interrupts::setReg(), ArmISA::ArmFault::setSyndrome(), X86ISA::SegDescriptorLimit::setter(), setThreadArea32Func(), sext(), ArmISA::TableWalker::LongDescriptor::sh(), ArmISA::TableWalker::L1Descriptor::shareable(), ArmISA::TableWalker::L2Descriptor::shareable(), ArmISA::ArmStaticInst::shiftReg64(), SparcISA::PageTableEntry::sideffect(), X86ISA::I8259::signalInterrupt(), ArmISA::simd_modified_imm(), MipsISA::simdPack(), MipsISA::simdUnpack(), ItsCommand::sizeOutOfRange(), ArmISA::ArmStaticInst::spsrWriteByInstr(), X86ISA::Walker::WalkerState::stepWalk(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if< std::is_base_of< SparcProcess::SyscallABI, ABI >::value >::type >::store(), ArmISA::stripPAC(), ArmISA::TableWalker::L1Descriptor::supersection(), iGbReg::TxdOp::tcp(), TEST(), ArmISA::BrkPoint::testAddrMatch(), ArmISA::BrkPoint::testAddrMissMatch(), ArmISA::BrkPoint::testContextMatch(), ArmISA::BrkPoint::testVMIDMatch(), ArmISA::TableWalker::L1Descriptor::texcb(), ArmISA::TableWalker::L2Descriptor::texcb(), AddrRange::to_string(), Compressor::Base::toChunks(), X86ISA::TLB::translate(), RiscvISA::TLB::translate(), X86ISA::GpuTLB::translate(), SparcISA::TLB::translateData(), SparcISA::TLB::translateFunctional(), SparcISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), ArmISA::TLB::translateMmuOff(), iGbReg::TxdOp::tse(), iGbReg::TxdOp::tucse(), iGbReg::TxdOp::tucso(), iGbReg::TxdOp::tucss(), iGbReg::TxdOp::txsm(), ArmISA::TableWalker::LongDescriptor::type(), PciDevice::unserialize(), ArmISA::unsignedRecipEstimate(), ArmISA::unsignedRSqrtEstimate(), GicV2::updateIntState(), ArmISA::TLB::updateMiscReg(), ArmISA::SelfDebug::updateOSLock(), ArmISA::TableWalker::LongDescriptor::user(), ArmISA::TableWalker::LongDescriptor::userTable(), iGbReg::TxdOp::utcmd(), SparcISA::TteTag::va(), SparcISA::TteTag::valid(), SparcISA::PageTableEntry::valid(), ArmISA::vcvtFpFpH(), ArmISA::vcvtFpHFp(), ArmISA::vfp_modified_imm(), Gicv3CPUInterface::virtualIncrementEOICount(), iGbReg::TxdOp::vle(), Gcn3ISA::wholeQuadMode(), SparcISA::PageTableEntry::writable(), X86ISA::I8237::write(), Sp805::write(), FVPBasePwrCtrl::write(), X86ISA::I8259::write(), X86ISA::I8042::write(), CopyEngine::write(), Gicv3Redistributor::write(), Gicv3Distributor::write(), IGbE::write(), GicV2::writeDistributor(), Iob::writeIob(), Iob::writeJBus(), X86ISA::I82094AA::writeReg(), ArmISA::TableWalker::L1Descriptor::xn(), ArmISA::TableWalker::L2Descriptor::xn(), ArmISA::TableWalker::LongDescriptor::xn(), and ArmISA::TableWalker::LongDescriptor::xnTable().

ctz32()

int ctz32 ( uint32_t  value )

inline

Count trailing zeros in a 32-bit value.

Parameters

An	input value

Returns

The number of trailing zeros or 32 if the value is zero.

Definition at line 338 of file bitfield.hh.

Referenced by Gicv3CPUInterface::highestActiveGroup(), Gicv3CPUInterface::highestActivePriority(), TEST(), Gicv3CPUInterface::virtualDropPriority(), and Gicv3CPUInterface::virtualHighestActivePriority().

ctz64()

int ctz64 ( uint64_t  value )

inline

Count trailing zeros in a 64-bit value.

Parameters

An	input value

Returns

The number of trailing zeros or 64 if the value is zero.

Definition at line 351 of file bitfield.hh.

Referenced by AddrRange::addIntlvBits(), AddrRange::granularity(), AddrRange::removeIntlvBits(), TEST(), and AddrRange::to_string().

findLsbSet()

int findLsbSet ( uint64_t  val )

inline

Returns the bit position of the LSB that is set in the input.

Definition at line 253 of file bitfield.hh.

References bits(), and X86ISA::val.

Referenced by Gcn3ISA::Inst_VOP1__V_READFIRSTLANE_B32::execute(), Gcn3ISA::findFirstOne(), Gcn3ISA::findFirstZero(), WalkCache::pickSetIdx(), UFSHostDevice::requestHandler(), and TEST().

findMsbSet()

int findMsbSet ( uint64_t  val )

inline

Returns the bit position of the MSB that is set in the input.

Definition at line 234 of file bitfield.hh.

References bits(), and X86ISA::val.

Referenced by ArmSemihosting::calcTickShift(), CopyEngine::CopyEngine(), Gcn3ISA::countZeroBitsMsb(), HDLcd::createDmaEngine(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), Gcn3ISA::findFirstOneMsb(), X86ISA::Interrupts::findRegArrayMSB(), X86ISA::I8259::getVector(), X86ISA::I8259::handleEOI(), KernelWorkload::KernelWorkload(), TEST(), and X86ISA::I8259::write().

insertBits() [1/2]

template<class T , class B >

T insertBits ( T  val, int  bit, B  bit_val  )

inline

Overloaded for access to only one bit in value.

Definition at line 163 of file bitfield.hh.

References insertBits(), and X86ISA::val.

insertBits() [2/2]

template<class T , class B >

T insertBits ( T  val, int  first, int  last, B  bit_val  )

inline

Returns val with bits first to last set to the LSBs of bit_val.

E.g.: first: 7 last: 4 val: 0xFFFF bit_val: 0x0000 returned: 0xFF0F

Definition at line 147 of file bitfield.hh.

References mask(), and X86ISA::val.

Referenced by AddrRange::addIntlvBits(), GenericTimerMem::counterCtrlWrite(), MipsISA::dspDpaq(), MipsISA::dspDpsq(), MipsISA::dspExtp(), MipsISA::dspExtpd(), MipsISA::dspExtr(), MipsISA::dspMaq(), MipsISA::dspMulsaq(), MipsISA::dspPrecrq(), MipsISA::dspPrecrqu(), ArmISA::ISA::initID32(), ArmISA::ISA::initID64(), insertBits(), GenericSyscallABI32::mergeRegs(), X86ISA::ISA::readMiscReg(), AddrRange::removeIntlvBits(), replaceBits(), Gcn3ISA::sdwaInstDstImpl_helper(), FastModel::CortexA76TC::setCCRegFlat(), TEST(), GenericTimerMem::timerCtrlWrite(), GenericTimerFrame::timerWrite(), X86ISA::TLB::translateFunctional(), and Gicv3CPUInterface::virtualIncrementEOICount().

isPow2()

template<class T >

bool isPow2 ( T  v )

inline

Checks if a number is a power of two, or zero.

Definition at line 273 of file bitfield.hh.

References ArmISA::v.

Referenced by TEST().

mask() [1/2]

uint64_t mask ( int  first, int  last  )

inline

Definition at line 113 of file bitfield.hh.

References LL, and mbits().

mask() [2/2]

uint64_t mask ( int  nbits )

inline

Generate a 64-bit mask of 'nbits' 1s, right justified.

If a number of bits greater than 64 is given, it is truncated to 64.

Parameters

nbits

The number of bits set in the mask.

Definition at line 61 of file bitfield.hh.

References LL, and ULL.

Referenced by bits(), insertBits(), mbits(), and sext().

mbits()

template<class T >

T mbits ( T  val, int  first, int  last  )

inline

Mask off the given bits in place like bits() but without shifting.

msb = 63, lsb = 0

Definition at line 104 of file bitfield.hh.

References mask(), and X86ISA::val.

Referenced by IGbE::TxDescCache::actionAfterWb(), ArmISA::TableWalker::doLongDescriptor(), SparcISA::TLB::doMmuRegWrite(), GenericTimer::CoreTimers::EventStream::eventTargetValue(), SparcISA::TLB::GetTsbPtr(), RiscvISA::RiscvFault::invoke(), ArmISA::TableWalker::L1Descriptor::l2Addr(), SparcISA::TLB::MakeTsbPtr(), ItsCommand::mapd(), mask(), V7LPageTableOps::nextLevelPointer(), V8PageTableOps4k::nextLevelPointer(), V8PageTableOps16k::nextLevelPointer(), V8PageTableOps64k::nextLevelPointer(), ArmISA::TableWalker::LongDescriptor::nextTableAddr(), ArmISA::TableWalker::L1Descriptor::paddr(), SparcISA::PageTableEntry::paddr(), ArmISA::TableWalker::L2Descriptor::paddr(), ArmISA::TableWalker::LongDescriptor::paddr(), Gicv3Its::pageAddress(), SparcISA::PageTableEntry::populate(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkLPAE(), GicV2::readDistributor(), RiscvISA::ISA::readMiscReg(), SparcISA::ISA::readMiscReg(), SparcISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), TEST(), SparcISA::TlbEntry::TlbEntry(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), and SparcISA::TLB::writeTagAccess().

popCount()

int popCount ( uint64_t  val )

inline

Returns the number of set ones in the provided value.

PD algorithm from http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel

Definition at line 285 of file bitfield.hh.

References RiscvISA::sum, and X86ISA::val.

Referenced by AddrRange::addIntlvBits(), AddrRange::contains(), Gcn3ISA::countZeroBits(), Gcn3ISA::Inst_SOP1__S_BCNT1_I32_B32::execute(), Gcn3ISA::Inst_SOP1__S_BCNT1_I32_B64::execute(), Gcn3ISA::Inst_VOP3__V_BCNT_U32_B32::execute(), Gcn3ISA::Inst_VOP3__V_MBCNT_LO_U32_B32::execute(), Gcn3ISA::Inst_VOP3__V_MBCNT_HI_U32_B32::execute(), and TEST().

replaceBits() [1/2]

template<class T , class B >

void replaceBits ( T &  val, int  bit, B  bit_val  )

inline

Overloaded function to allow to access only 1 bit.

Definition at line 192 of file bitfield.hh.

References insertBits(), and X86ISA::val.

replaceBits() [2/2]

template<class T , class B >

void replaceBits ( T &  val, int  first, int  last, B  bit_val  )

inline

A convenience function to replace bits first to last of val with bit_val in place.

It is functionally equivalent to insertBits.

Note

"first" is the MSB and "last" is the LSB. "first" >= "last"

Definition at line 179 of file bitfield.hh.

References insertBits(), and X86ISA::val.

Referenced by MipsISA::ISA::configCP(), SparcISA::doNormalFault(), SparcISA::doREDFault(), X86ISA::EndBitUnion(), Compressor::Base::fromChunks(), DramGen::genStartAddr(), NvmGen::genStartAddr(), HybridGen::genStartAddr(), ArmISA::getMPIDR(), DramGen::getNextPacket(), NvmGen::getNextPacket(), DramRotGen::getNextPacket(), HybridGen::getNextPacket(), X86ISA::IntelMP::IntAssignment::IntAssignment(), ArmISA::MacroMemOp::MacroMemOp(), DRAMInterface::minBankPrep(), X86ISA::IntelMP::Processor::Processor(), ArmISA::HTMCheckpoint::restore(), Gcn3ISA::ScalarOperand< DataType, Const, sizeof(DataType)/sizeof(VecElemU32) >::setBit(), iGbReg::TxdOp::setDd(), BitfieldBackend::Unsigned< Storage, first, last >::setter(), BitfieldBackend::Signed< Storage, first, last >::setter(), X86ISA::SegDescriptorLimit::setter(), ArmISA::vcvtFpFpH(), ArmISA::vcvtFpHFp(), X86ISA::I8237::write(), Gcn3ISA::ScalarOperand< DataType, Const, sizeof(DataType)/sizeof(VecElemU32) >::write(), and IdeController::writeConfig().

reverseBits()

template<class T >

T reverseBits	(	T	val,
		std::size_t	size = sizeof(T)
	)

Takes a variable lenght word and returns the mirrored version (Bit by bit, LSB=>MSB).

algorithm from http://graphics.stanford.edu/~seander/bithacks.html #ReverseBitsByLookupTable

Parameters

val	variable lenght word
size	number of bytes to mirror

Returns

mirrored word

Definition at line 213 of file bitfield.hh.

References output(), reverseLookUpTable, and X86ISA::val.

Referenced by crc32(), Gcn3ISA::Inst_SOP1__S_BREV_B32::execute(), Gcn3ISA::Inst_SOP1__S_BREV_B64::execute(), Gcn3ISA::Inst_VOP1__V_BFREV_B32::execute(), Gcn3ISA::Inst_VOP3__V_BFREV_B32::execute(), and TEST().

sext()

template<int N>

uint64_t sext ( uint64_t  val )

inline

Sign-extend an N-bit value to 64 bits.

Definition at line 126 of file bitfield.hh.

References bits(), mask(), and X86ISA::val.

Referenced by BitfieldBackend::Signed< Storage, first, last >::getter().