gem5  v20.1.0.0
utility.hh
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1 /*
2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
3  * Copyright (c) 2007 MIPS Technologies, Inc.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are
8  * met: redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer;
10  * redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution;
13  * neither the name of the copyright holders nor the names of its
14  * contributors may be used to endorse or promote products derived from
15  * this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #ifndef __ARCH_MIPS_UTILITY_HH__
31 #define __ARCH_MIPS_UTILITY_HH__
32 #include "arch/mips/isa_traits.hh"
33 #include "arch/mips/types.hh"
34 #include "base/logging.hh"
35 #include "base/types.hh"
36 #include "cpu/static_inst.hh"
37 #include "cpu/thread_context.hh"
38 
39 class ThreadContext;
40 
41 namespace MipsISA {
42 
43 inline PCState
44 buildRetPC(const PCState &curPC, const PCState &callPC)
45 {
46  PCState ret = callPC;
47  ret.advance();
48  ret.pc(curPC.npc());
49  return ret;
50 }
51 
52 uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
53 
55 //
56 // Floating Point Utility Functions
57 //
58 uint64_t fpConvert(ConvertType cvt_type, double fp_val);
59 double roundFP(double val, int digits);
60 double truncFP(double val);
61 
62 bool getCondCode(uint32_t fcsr, int cc);
63 uint32_t genCCVector(uint32_t fcsr, int num, uint32_t cc_val);
64 uint32_t genInvalidVector(uint32_t fcsr);
65 
66 bool isNan(void *val_ptr, int size);
67 bool isQnan(void *val_ptr, int size);
68 bool isSnan(void *val_ptr, int size);
69 
70 static inline bool
72 {
73  RegVal Stat = tc->readMiscReg(MISCREG_STATUS);
74  RegVal Dbg = tc->readMiscReg(MISCREG_DEBUG);
75 
76  if ((Stat & 0x10000006) == 0 && // EXL, ERL or CU0 set, CP0 accessible
77  (Dbg & 0x40000000) == 0 && // DM bit set, CP0 accessible
78  (Stat & 0x00000018) != 0) { // KSU = 0, kernel mode is base mode
79  // Unable to use Status_CU0, etc directly, using bitfields & masks
80  return true;
81  } else {
82  return false;
83  }
84 }
85 
87 //
88 // Translation stuff
89 //
90 inline Addr
92 {
93  return addr & ~(PageBytes - 1);
94 }
95 
96 inline Addr
98 {
99  return (addr + PageBytes - 1) & ~(PageBytes - 1);
100 }
101 
102 void copyRegs(ThreadContext *src, ThreadContext *dest);
103 void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
104 
105 inline void
107 {
108  pc.advance();
109 }
110 
111 inline uint64_t
113 {
114  return 0;
115 }
116 
117 };
118 
119 
120 #endif
MipsISA::genCCVector
uint32_t genCCVector(uint32_t fcsr, int cc_num, uint32_t cc_val)
Definition: utility.cc:124
MipsISA::truncFP
double truncFP(double val)
Definition: utility.cc:109
types.hh
MipsISA::roundFP
double roundFP(double val, int digits)
Definition: utility.cc:98
MipsISA::getExecutingAsid
uint64_t getExecutingAsid(ThreadContext *tc)
Definition: utility.hh:112
MipsISA
Definition: decoder.cc:31
MipsISA::TruncPage
Addr TruncPage(Addr addr)
Definition: utility.hh:91
MipsISA::fp
Bitfield< 0 > fp
Definition: pra_constants.hh:244
GenericISA::SimplePCState::npc
Addr npc() const
Definition: types.hh:161
MipsISA::MISCREG_STATUS
@ MISCREG_STATUS
Definition: registers.hh:179
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
MipsISA::fpConvert
uint64_t fpConvert(ConvertType cvt_type, double fp_val)
Definition: utility.cc:54
MipsISA::advancePC
void advancePC(PCState &pc, const StaticInstPtr &inst)
Definition: utility.hh:106
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
MipsISA::RoundPage
Addr RoundPage(Addr addr)
Definition: utility.hh:97
MipsISA::isNan
bool isNan(void *val_ptr, int size)
Definition: utility.cc:150
static_inst.hh
X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
GenericISA::DelaySlotPCState
Definition: types.hh:312
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
MipsISA::ConvertType
ConvertType
Definition: types.hh:44
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
types.hh
MipsISA::getCondCode
bool getCondCode(uint32_t fcsr, int cc_idx)
Definition: utility.cc:116
MipsISA::getArgument
uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
Definition: utility.cc:47
ThreadContext::readMiscReg
virtual RegVal readMiscReg(RegIndex misc_reg)=0
GenericISA::DelaySlotPCState::advance
void advance()
Definition: types.hh:344
MipsISA::copyMiscRegs
void copyMiscRegs(ThreadContext *src, ThreadContext *dest)
Definition: utility.cc:239
MipsISA::copyRegs
void copyRegs(ThreadContext *src, ThreadContext *dest)
Definition: utility.cc:217
addr
ip6_addr_t addr
Definition: inet.hh:423
MipsISA::PageBytes
const Addr PageBytes
Definition: isa_traits.hh:41
logging.hh
isa_traits.hh
GenericISA::SimplePCState::pc
Addr pc() const
Definition: types.hh:158
RefCountingPtr< StaticInst >
MipsISA::isQnan
bool isQnan(void *val_ptr, int size)
Definition: utility.cc:173
MipsISA::isSnan
bool isSnan(void *val_ptr, int size)
Definition: utility.cc:195
MipsISA::MISCREG_DEBUG
@ MISCREG_DEBUG
Definition: registers.hh:227
MipsISA::buildRetPC
PCState buildRetPC(const PCState &curPC, const PCState &callPC)
Definition: utility.hh:44
thread_context.hh
RegVal
uint64_t RegVal
Definition: types.hh:168
MipsISA::inUserMode
static bool inUserMode(ThreadContext *tc)
Definition: utility.hh:71
MipsISA::genInvalidVector
uint32_t genInvalidVector(uint32_t fcsr_bits)
Definition: utility.cc:136

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