gem5  v20.1.0.0
pl011.hh
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40 
41 
46 #ifndef __DEV_ARM_PL011_H__
47 #define __DEV_ARM_PL011_H__
48 
49 #include "dev/arm/amba_device.hh"
50 #include "dev/serial/uart.hh"
51 
52 class BaseGic;
53 struct Pl011Params;
54 
55 class Pl011 : public Uart, public AmbaDevice
56 {
57  public:
58  Pl011(const Pl011Params *p);
59 
60  void serialize(CheckpointOut &cp) const override;
61  void unserialize(CheckpointIn &cp) override;
62 
63  public: // PioDevice
64  Tick read(PacketPtr pkt) override;
65  Tick write(PacketPtr pkt) override;
66 
67  public: // Uart
68  void dataAvailable() override;
69 
70 
71  protected: // Interrupt handling
73  void generateInterrupt();
74 
86  void setInterrupts(uint16_t ints, uint16_t mask);
100  void raiseInterrupts(uint16_t ints) { setInterrupts(rawInt | ints, imsc); }
107  void clearInterrupts(uint16_t ints) { setInterrupts(rawInt & ~ints, imsc); }
108 
110  inline uint16_t maskInt() const { return rawInt & imsc; }
111 
114 
115  protected: // Registers
116  static const uint64_t AMBA_ID = ULL(0xb105f00d00341011);
117  static const int UART_DR = 0x000;
118  static const int UART_RSR = 0x004;
119  static const int UART_ECR = 0x004;
120  static const int UART_FR = 0x018;
121  static const int UART_FR_CTS = 0x001;
122  static const int UART_FR_RXFE = 0x010;
123  static const int UART_FR_TXFF = 0x020;
124  static const int UART_FR_RXFF = 0x040;
125  static const int UART_FR_TXFE = 0x080;
126  static const int UART_IBRD = 0x024;
127  static const int UART_FBRD = 0x028;
128  static const int UART_LCRH = 0x02C;
129  static const int UART_CR = 0x030;
130  static const int UART_IFLS = 0x034;
131  static const int UART_IMSC = 0x038;
132  static const int UART_RIS = 0x03C;
133  static const int UART_MIS = 0x040;
134  static const int UART_ICR = 0x044;
135  static const int UART_DMACR = 0x048;
136 
137  static const uint16_t UART_RIINTR = 1 << 0;
138  static const uint16_t UART_CTSINTR = 1 << 1;
139  static const uint16_t UART_CDCINTR = 1 << 2;
140  static const uint16_t UART_DSRINTR = 1 << 3;
141  static const uint16_t UART_RXINTR = 1 << 4;
142  static const uint16_t UART_TXINTR = 1 << 5;
143  static const uint16_t UART_RTINTR = 1 << 6;
144  static const uint16_t UART_FEINTR = 1 << 7;
145  static const uint16_t UART_PEINTR = 1 << 8;
146  static const uint16_t UART_BEINTR = 1 << 9;
147  static const uint16_t UART_OEINTR = 1 << 10;
148 
149  uint16_t control;
150 
153  uint16_t fbrd;
154 
157  uint16_t ibrd;
158 
161  uint16_t lcrh;
162 
165  uint16_t ifls;
166 
168  uint16_t imsc;
169 
171  uint16_t rawInt;
172 
173  protected: // Configuration
175  const bool endOnEOT;
176 
178 
180  const Tick intDelay;
181 };
182 
183 #endif //__DEV_ARM_PL011_H__
Pl011::ifls
uint16_t ifls
interrupt fifo level register.
Definition: pl011.hh:165
Pl011::UART_RTINTR
static const uint16_t UART_RTINTR
Definition: pl011.hh:143
Pl011::UART_FBRD
static const int UART_FBRD
Definition: pl011.hh:127
Pl011::AMBA_ID
static const uint64_t AMBA_ID
Definition: pl011.hh:116
Pl011::ibrd
uint16_t ibrd
integer baud rate divisor.
Definition: pl011.hh:157
Pl011::setInterruptMask
void setInterruptMask(uint16_t mask)
Convenience function to update the interrupt mask.
Definition: pl011.hh:93
Pl011::UART_RIS
static const int UART_RIS
Definition: pl011.hh:132
Pl011::UART_IFLS
static const int UART_IFLS
Definition: pl011.hh:130
amba_device.hh
Pl011::lcrh
uint16_t lcrh
Line control register.
Definition: pl011.hh:161
Pl011::UART_BEINTR
static const uint16_t UART_BEINTR
Definition: pl011.hh:146
Pl011::UART_FR_CTS
static const int UART_FR_CTS
Definition: pl011.hh:121
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
Pl011::UART_IBRD
static const int UART_IBRD
Definition: pl011.hh:126
Pl011::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pl011.cc:314
Pl011::maskInt
uint16_t maskInt() const
Masked interrupt status register.
Definition: pl011.hh:110
Pl011::setInterrupts
void setInterrupts(uint16_t ints, uint16_t mask)
Assign new interrupt values and update interrupt signals.
Definition: pl011.cc:281
Pl011::intDelay
const Tick intDelay
Delay before interrupting.
Definition: pl011.hh:180
Pl011::UART_DSRINTR
static const uint16_t UART_DSRINTR
Definition: pl011.hh:140
EventFunctionWrapper
Definition: eventq.hh:1101
Pl011::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pl011.cc:299
Pl011::UART_IMSC
static const int UART_IMSC
Definition: pl011.hh:131
Pl011::UART_ECR
static const int UART_ECR
Definition: pl011.hh:119
Pl011::UART_DR
static const int UART_DR
Definition: pl011.hh:117
cp
Definition: cprintf.cc:40
Pl011::rawInt
uint16_t rawInt
raw interrupt status register
Definition: pl011.hh:171
Pl011::UART_RIINTR
static const uint16_t UART_RIINTR
Definition: pl011.hh:137
Uart
Definition: uart.hh:46
Pl011::UART_CTSINTR
static const uint16_t UART_CTSINTR
Definition: pl011.hh:138
Pl011::UART_FR_RXFE
static const int UART_FR_RXFE
Definition: pl011.hh:122
Pl011::clearInterrupts
void clearInterrupts(uint16_t ints)
Convenience function to clear interrupts.
Definition: pl011.hh:107
Pl011::UART_FR
static const int UART_FR
Definition: pl011.hh:120
Pl011::UART_ICR
static const int UART_ICR
Definition: pl011.hh:134
uart.hh
Pl011::UART_RXINTR
static const uint16_t UART_RXINTR
Definition: pl011.hh:141
Pl011::UART_FR_TXFF
static const int UART_FR_TXFF
Definition: pl011.hh:123
Pl011::imsc
uint16_t imsc
interrupt mask register.
Definition: pl011.hh:168
Pl011::UART_CDCINTR
static const uint16_t UART_CDCINTR
Definition: pl011.hh:139
Pl011::UART_TXINTR
static const uint16_t UART_TXINTR
Definition: pl011.hh:142
Pl011::raiseInterrupts
void raiseInterrupts(uint16_t ints)
Convenience function to raise a new interrupt.
Definition: pl011.hh:100
Pl011::control
uint16_t control
Definition: pl011.hh:149
Pl011::interrupt
ArmInterruptPin *const interrupt
Definition: pl011.hh:177
AmbaDevice
Definition: amba_device.hh:60
Pl011::UART_OEINTR
static const uint16_t UART_OEINTR
Definition: pl011.hh:147
Pl011::UART_FR_RXFF
static const int UART_FR_RXFF
Definition: pl011.hh:124
BaseGic
Definition: base_gic.hh:62
Pl011::fbrd
uint16_t fbrd
fractional baud rate divisor.
Definition: pl011.hh:153
Pl011::dataAvailable
void dataAvailable() override
Inform the uart that there is data available.
Definition: pl011.cc:260
Pl011::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl011.cc:169
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
Pl011::UART_RSR
static const int UART_RSR
Definition: pl011.hh:118
ArmInterruptPin
Generic representation of an Arm interrupt pin.
Definition: base_gic.hh:176
Pl011::UART_FEINTR
static const uint16_t UART_FEINTR
Definition: pl011.hh:144
Pl011::generateInterrupt
void generateInterrupt()
Function to generate interrupt.
Definition: pl011.cc:269
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:63
Pl011::UART_PEINTR
static const uint16_t UART_PEINTR
Definition: pl011.hh:145
Pl011::Pl011
Pl011(const Pl011Params *p)
Definition: pl011.cc:53
Pl011::endOnEOT
const bool endOnEOT
Should the simulation end on an EOT.
Definition: pl011.hh:175
Pl011::UART_CR
static const int UART_CR
Definition: pl011.hh:129
Pl011::UART_LCRH
static const int UART_LCRH
Definition: pl011.hh:128
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
Pl011::intEvent
EventFunctionWrapper intEvent
Wrapper to create an event out of the thing.
Definition: pl011.hh:113
CheckpointIn
Definition: serialize.hh:67
Pl011::UART_FR_TXFE
static const int UART_FR_TXFE
Definition: pl011.hh:125
Pl011
Definition: pl011.hh:55
ULL
#define ULL(N)
uint64_t constant
Definition: types.hh:50
Pl011::UART_DMACR
static const int UART_DMACR
Definition: pl011.hh:135
Pl011::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl011.cc:64
ArmISA::mask
Bitfield< 28, 24 > mask
Definition: miscregs_types.hh:711
Pl011::UART_MIS
static const int UART_MIS
Definition: pl011.hh:133

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