gem5  v20.1.0.0
interrupts.hh
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28 
29 #ifndef __ARCH_POWER_INTERRUPT_HH__
30 #define __ARCH_POWER_INTERRUPT_HH__
31 
33 #include "base/logging.hh"
34 #include "params/PowerInterrupts.hh"
35 
36 class BaseCPU;
37 class ThreadContext;
38 
39 namespace PowerISA {
40 
41 class Interrupts : public BaseInterrupts
42 {
43  public:
44  typedef PowerInterruptsParams Params;
45 
46  const Params *
47  params() const
48  {
49  return dynamic_cast<const Params *>(_params);
50  }
51 
53 
54  void
55  post(int int_num, int index)
56  {
57  panic("Interrupts::post not implemented.\n");
58  }
59 
60  void
61  clear(int int_num, int index)
62  {
63  panic("Interrupts::clear not implemented.\n");
64  }
65 
66  void
68  {
69  panic("Interrupts::clearAll not implemented.\n");
70  }
71 
72  bool
74  {
75  panic("Interrupts::checkInterrupts not implemented.\n");
76  }
77 
78  Fault
80  {
81  assert(checkInterrupts());
82  panic("Interrupts::getInterrupt not implemented.\n");
83  }
84 
85  void
87  {
88  panic("Interrupts::updateIntrInfo not implemented.\n");
89  }
90 };
91 
92 } // namespace PowerISA
93 
94 #endif // __ARCH_POWER_INTERRUPT_HH__
95 
MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:44
PowerISA::Interrupts::Params
PowerInterruptsParams Params
Definition: interrupts.hh:44
PowerISA::Interrupts::post
void post(int int_num, int index)
Definition: interrupts.hh:55
PowerISA::Interrupts::getInterrupt
Fault getInterrupt()
Definition: interrupts.hh:79
PowerISA::Interrupts::params
const Params * params() const
Definition: interrupts.hh:47
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
PowerISA
Definition: decoder.cc:31
PowerISA::Interrupts::Interrupts
Interrupts(Params *p)
Definition: interrupts.hh:52
Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
BaseInterrupts::Params
BaseInterruptsParams Params
Definition: interrupts.hh:43
PowerISA::Interrupts
Definition: interrupts.hh:41
PowerISA::Interrupts::clear
void clear(int int_num, int index)
Definition: interrupts.hh:61
BaseCPU
Definition: cpu_dummy.hh:43
SimObject::_params
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:110
PowerISA::Interrupts::checkInterrupts
bool checkInterrupts() const
Definition: interrupts.hh:73
interrupts.hh
logging.hh
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
PowerISA::Interrupts::updateIntrInfo
void updateIntrInfo()
Definition: interrupts.hh:86
PowerISA::Interrupts::clearAll
void clearAll()
Definition: interrupts.hh:67
BaseInterrupts
Definition: interrupts.hh:37
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171

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