gem5  v20.1.0.0
random_gen.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2012-2013, 2017-2018 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed here under. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
44 #ifndef __CPU_TRAFFIC_GEN_RANDOM_GEN_HH__
45 #define __CPU_TRAFFIC_GEN_RANDOM_GEN_HH__
46 
47 #include "base/bitfield.hh"
48 #include "base/intmath.hh"
49 #include "base_gen.hh"
50 #include "mem/packet.hh"
51 
57 class RandomGen : public StochasticGen
58 {
59 
60  public:
61 
80  RequestorID requestor_id, Tick _duration,
81  Addr start_addr, Addr end_addr,
82  Addr _blocksize, Addr cacheline_size,
83  Tick min_period, Tick max_period,
84  uint8_t read_percent, Addr data_limit)
85  : StochasticGen(obj, requestor_id, _duration, start_addr, end_addr,
86  _blocksize, cacheline_size, min_period, max_period,
87  read_percent, data_limit),
89  { }
90 
91  void enter();
92 
94 
95  Tick nextPacketTick(bool elastic, Tick delay) const;
96 
97  protected:
104 };
105 
106 #endif
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
packet.hh
RequestorID
uint16_t RequestorID
Definition: request.hh:85
bitfield.hh
RandomGen::RandomGen
RandomGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit)
Create a random address sequence generator.
Definition: random_gen.hh:79
StochasticGen
Definition: base_gen.hh:132
RandomGen::nextPacketTick
Tick nextPacketTick(bool elastic, Tick delay) const
Determine the tick when the next packet is available.
Definition: random_gen.cc:81
RandomGen::getNextPacket
PacketPtr getNextPacket()
Get the next generated packet.
Definition: random_gen.cc:54
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
RandomGen::dataManipulated
Addr dataManipulated
Counter to determine the amount of data manipulated.
Definition: random_gen.hh:103
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
RandomGen
The random generator is similar to the linear one, but does not generate sequential addresses.
Definition: random_gen.hh:57
intmath.hh
RandomGen::enter
void enter()
Enter this generator state.
Definition: random_gen.cc:47
base_gen.hh
SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:92

Generated on Wed Sep 30 2020 14:02:09 for gem5 by doxygen 1.8.17