gem5  v20.1.0.0
smmu_v3_ptops.cc
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37 
38 #include "dev/arm/smmu_v3_ptops.hh"
39 
40 #include "base/bitfield.hh"
41 #include "base/logging.hh"
42 
43 bool
44 V7LPageTableOps::isValid(pte_t pte, unsigned level) const
45 {
46  switch (level) {
47  case 1: return pte & 0x1;
48  case 2: return pte & 0x1;
49  case 3: return (pte & 0x1) && (pte & 0x2);
50  default: panic("bad level %d", level);
51  }
52 }
53 
54 bool
55 V7LPageTableOps::isLeaf(pte_t pte, unsigned level) const
56 {
57  switch (level) {
58  case 1: return !(pte & 0x2);
59  case 2: return !(pte & 0x2);
60  case 3: return true;
61  default: panic("bad level %d", level);
62  }
63 }
64 
65 bool
66 V7LPageTableOps::isWritable(pte_t pte, unsigned level, bool stage2) const
67 {
68  return stage2 ? bits(pte, 7, 6)==3 : bits(pte, 7)==0;
69 }
70 
71 Addr
73 {
74  if (isLeaf(pte, level)) {
75  switch (level) {
76  case 1: return mbits(pte, 39, 30);
77  case 2: return mbits(pte, 39, 21);
78  case 3: return mbits(pte, 39, 12);
79  default: panic("bad level %d", level);
80  }
81  } else {
82  return mbits(pte, 39, 12);
83  }
84 }
85 
86 Addr
88 {
89  // In theory this should be configurable...
90  const int n = 12;
91 
92  switch (level) {
93  case 1: return bits(va, 26+n, 30) << 3; break;
94  case 2: return bits(va, 29, 21) << 3; break;
95  case 3: return bits(va, 20, 12) << 3; break;
96  default: panic("bad level %d", level);
97  }
98 }
99 
100 Addr
102 {
103  switch (level) {
104  case 1: return ~mask(30);
105  case 2: return ~mask(21);
106  case 3: return bits(pte, 52) ? ~mask(16) : ~mask(12);
107  default: panic("bad level %d", level);
108  }
109 }
110 
111 Addr
113 {
114  switch (level) {
115  case 1: return ~mask(30);
116  case 2: return ~mask(21);
117  case 3: return ~mask(12);
118  default: panic("bad level %d", level);
119  }
120 }
121 
122 unsigned
123 V7LPageTableOps::firstLevel(uint8_t tsz) const
124 {
125  return 1;
126 }
127 
128 unsigned
130 {
131  return 3;
132 }
133 
134 bool
136 {
137  switch (level) {
138  case 0: return pte & 0x1;
139  case 1: return pte & 0x1;
140  case 2: return pte & 0x1;
141  case 3: return (pte & 0x1) && (pte & 0x2);
142  default: panic("bad level %d", level);
143  }
144 }
145 
146 bool
148 {
149  switch (level) {
150  case 0: return false;
151  case 1: return !(pte & 0x2);
152  case 2: return !(pte & 0x2);
153  case 3: return true;
154  default: panic("bad level %d", level);
155  }
156 }
157 
158 bool
159 V8PageTableOps4k::isWritable(pte_t pte, unsigned level, bool stage2) const
160 {
161  return stage2 ? bits(pte, 7, 6)==3 : bits(pte, 7)==0;
162 }
163 
164 Addr
166 {
167  if (isLeaf(pte, level)) {
168  switch (level) {
169  // no level 0 here
170  case 1: return mbits(pte, 47, 30);
171  case 2: return mbits(pte, 47, 21);
172  case 3: return mbits(pte, 47, 12);
173  default: panic("bad level %d", level);
174  }
175  } else {
176  return mbits(pte, 47, 12);
177  }
178 }
179 
180 Addr
182 {
183  switch (level) {
184  case 0: return bits(va, 47, 39) << 3; break;
185  case 1: return bits(va, 38, 30) << 3; break;
186  case 2: return bits(va, 29, 21) << 3; break;
187  case 3: return bits(va, 20, 12) << 3; break;
188  default: panic("bad level %d", level);
189  }
190 }
191 
192 Addr
194 {
195  switch (level) {
196  // no level 0 here
197  case 1: return ~mask(30);
198  case 2: return ~mask(21);
199  case 3: return bits(pte, 52) ? ~mask(16) : ~mask(12);
200  default: panic("bad level %d", level);
201  }
202 }
203 
204 Addr
206 {
207  switch (level) {
208  case 0: return ~mask(39);
209  case 1: return ~mask(30);
210  case 2: return ~mask(21);
211  case 3: return ~mask(12);
212  default: panic("bad level %d", level);
213  }
214 }
215 
216 unsigned
218 {
219  if (tsz >= 16 && tsz <= 24) return 0;
220  if (tsz >= 25 && tsz <= 33) return 1;
221  if (tsz >= 34 && tsz <= 39) return 2;
222 
223  panic("Unsupported TnSZ: %d\n", tsz);
224 }
225 
226 unsigned
228 {
229  return 3;
230 }
231 
232 bool
234 {
235  switch (level) {
236  case 0: return pte & 0x1;
237  case 1: return pte & 0x1;
238  case 2: return pte & 0x1;
239  case 3: return (pte & 0x1) && (pte & 0x2);
240  default: panic("bad level %d", level);
241  }
242 }
243 
244 bool
246 {
247  switch (level) {
248  case 0: return false;
249  case 1: return false;
250  case 2: return !(pte & 0x2);
251  case 3: return true;
252  default: panic("bad level %d", level);
253  }
254 }
255 
256 bool
257 V8PageTableOps16k::isWritable(pte_t pte, unsigned level, bool stage2) const
258 {
259  return stage2 ? bits(pte, 7, 6) == 3 : bits(pte, 7) == 0;
260 }
261 
262 Addr
264 {
265  if (isLeaf(pte, level)) {
266  switch (level) {
267  // no level 0 here
268  case 1: return mbits(pte, 47, 36);
269  case 2: return mbits(pte, 47, 25);
270  case 3: return mbits(pte, 47, 14);
271  default: panic("bad level %d", level);
272  }
273  } else {
274  return mbits(pte, 47, 14);
275  }
276 }
277 
278 Addr
280 {
281  switch (level) {
282  case 0: return bits(va, 47, 47) << 3; break;
283  case 1: return bits(va, 46, 36) << 3; break;
284  case 2: return bits(va, 35, 25) << 3; break;
285  case 3: return bits(va, 24, 14) << 3; break;
286  default: panic("bad level %d", level);
287  }
288 }
289 
290 Addr
292 {
293  switch (level) {
294  // no level 0 here
295  case 1: return ~mask(36);
296  // 16K granule supports contiguous entries also at L2; - 1G
297  case 2: return bits(pte, 52) ? ~mask(30) : ~mask(25);
298  // as well as at L3; - 2M
299  case 3: return bits(pte, 52) ? ~mask(21) : ~mask(14);
300  default: panic("bad level %d", level);
301  }
302 }
303 
304 Addr
306 {
307  switch (level) {
308  case 0: return ~mask(47);
309  case 1: return ~mask(36);
310  case 2: return ~mask(25);
311  case 3: return ~mask(14);
312  default: panic("bad level %d", level);
313  }
314 }
315 
316 unsigned
318 {
319  if (tsz == 16) return 0;
320  if (tsz >= 17 && tsz <= 27) return 1;
321  if (tsz >= 28 && tsz <= 38) return 2;
322  if (tsz == 39) return 3;
323 
324  panic("Unsupported TnSZ: %d\n", tsz);
325 }
326 
327 unsigned
329 {
330  return 3;
331 }
332 
333 bool
335 {
336  switch (level) {
337  case 1: return pte & 0x1;
338  case 2: return pte & 0x1;
339  case 3: return (pte & 0x1) && (pte & 0x2);
340  default: panic("bad level %d", level);
341  }
342 }
343 
344 bool
346 {
347  switch (level) {
348  case 1: return false;
349  case 2: return !(pte & 0x2);
350  case 3: return true;
351  default: panic("bad level %d", level);
352  }
353 }
354 
355 bool
356 V8PageTableOps64k::isWritable(pte_t pte, unsigned level, bool stage2) const
357 {
358  return stage2 ? bits(pte, 7, 6)==3 : bits(pte, 7)==0;
359 }
360 
361 Addr
363 {
364  if (isLeaf(pte, level)) {
365  switch (level) {
366  // no level 1 here
367  case 2: return mbits(pte, 47, 29);
368  case 3: return mbits(pte, 47, 16);
369  default: panic("bad level %d", level);
370  }
371  } else {
372  return mbits(pte, 47, 16);
373  }
374 }
375 
376 Addr
378 {
379  switch (level) {
380  case 1: return bits(va, 47, 42) << 3; break;
381  case 2: return bits(va, 41, 29) << 3; break;
382  case 3: return bits(va, 28, 16) << 3; break;
383  default: panic("bad level %d", level);
384  }
385 }
386 
387 Addr
389 {
390  switch (level) {
391  // no level 1 here
392  case 2: return ~mask(29);
393  case 3: return bits(pte, 52) ? ~mask(21) : ~mask(16);
394  default: panic("bad level %d", level);
395  }
396 }
397 
398 Addr
400 {
401  switch (level) {
402  case 1: return ~mask(42);
403  case 2: return ~mask(29);
404  case 3: return ~mask(16);
405  default: panic("bad level %d", level);
406  }
407 }
408 
409 unsigned
411 {
412  if (tsz >= 12 && tsz <= 21) return 1;
413  if (tsz >= 22 && tsz <= 34) return 2;
414  if (tsz >= 35 && tsz <= 39) return 3;
415 
416  panic("Unsupported TnSZ: %d\n", tsz);
417 }
418 
419 unsigned
421 {
422  return 3;
423 }
V8PageTableOps16k::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:291
V7LPageTableOps::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:123
V8PageTableOps16k::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:317
V8PageTableOps64k::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:362
V8PageTableOps4k::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:135
V7LPageTableOps::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:55
mbits
T mbits(T val, int first, int last)
Mask off the given bits in place like bits() but without shifting.
Definition: bitfield.hh:104
V7LPageTableOps::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:129
V8PageTableOps16k::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:257
V8PageTableOps64k::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:420
V8PageTableOps16k::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:263
V8PageTableOps64k::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:399
V8PageTableOps4k::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:217
V8PageTableOps64k::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:377
ArmISA::n
Bitfield< 31 > n
Definition: miscregs_types.hh:450
V8PageTableOps4k::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:147
V7LPageTableOps::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:44
bitfield.hh
V7LPageTableOps::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:87
V8PageTableOps16k::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:245
V8PageTableOps16k::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:328
V8PageTableOps64k::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:334
smmu_v3_ptops.hh
V8PageTableOps16k::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:279
PageTableOps::pte_t
int64_t pte_t
Definition: smmu_v3_ptops.hh:47
V7LPageTableOps::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:112
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
V8PageTableOps4k::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:227
X86ISA::level
Bitfield< 20 > level
Definition: intmessage.hh:47
V8PageTableOps4k::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:159
V8PageTableOps4k::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:205
V8PageTableOps64k::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:410
V7LPageTableOps::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:72
V8PageTableOps16k::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:305
logging.hh
V8PageTableOps4k::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:193
V8PageTableOps64k::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:345
V8PageTableOps4k::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:181
V8PageTableOps16k::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:233
V8PageTableOps64k::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:388
ArmISA::va
Bitfield< 8 > va
Definition: miscregs_types.hh:272
ArmISA::mask
Bitfield< 28, 24 > mask
Definition: miscregs_types.hh:711
V7LPageTableOps::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:66
V8PageTableOps4k::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:165
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171
V8PageTableOps64k::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:356
V7LPageTableOps::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:101
bits
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:75

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