gem5  v20.1.0.0
pagetable.hh
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28 
29 #ifndef __ARCH_SPARC_PAGETABLE_HH__
30 #define __ARCH_SPARC_PAGETABLE_HH__
31 
32 #include <cassert>
33 
34 #include "arch/sparc/isa_traits.hh"
35 #include "base/bitfield.hh"
36 #include "base/logging.hh"
37 #include "sim/serialize.hh"
38 
39 namespace SparcISA
40 {
41 
42 class TteTag
43 {
44  private:
45  uint64_t entry;
46  bool populated;
47 
48  public:
49  TteTag() : entry(0), populated(false) {}
50  TteTag(uint64_t e) : entry(e), populated(true) {}
51 
52  const TteTag &
53  operator=(uint64_t e)
54  {
55  populated = true;
56  entry = e;
57  return *this;
58  }
59 
60  bool valid() const { assert(populated); return !bits(entry,62,62); }
61  Addr va() const { assert(populated); return bits(entry,41,0); }
62 };
63 
64 
66 {
67  public:
68  enum EntryType {
72  };
73 
74  private:
75  uint64_t entry;
77  uint64_t entry4u;
78  bool populated;
79 
80  public:
82  {}
83 
85  : entry(e), type(t), populated(true)
86  {
88  }
89 
90  void
91  populate(uint64_t e, EntryType t = sun4u)
92  {
93  entry = e;
94  type = t;
95  populated = true;
96 
97  // If we get a sun4v format TTE, turn it into a sun4u
98  if (type == sun4u)
99  entry4u = entry;
100  else {
101  entry4u = 0;
102  entry4u |= mbits(entry,63,63); // valid
103  entry4u |= bits(entry,1,0) << 61; // size[1:0]
104  entry4u |= bits(entry,62,62) << 60; // nfo
105  entry4u |= bits(entry,12,12) << 59; // ie
106  entry4u |= bits(entry,2,2) << 48; // size[2]
107  entry4u |= mbits(entry,39,13); // paddr
108  entry4u |= bits(entry,61,61) << 6;; // locked
109  entry4u |= bits(entry,10,10) << 5; // cp
110  entry4u |= bits(entry,9,9) << 4; // cv
111  entry4u |= bits(entry,11,11) << 3; // e
112  entry4u |= bits(entry,8,8) << 2; // p
113  entry4u |= bits(entry,6,6) << 1; // w
114  }
115  }
116 
117  void
119  {
120  populated = false;
121  }
122 
123  static int pageSizes[6];
124 
125  uint64_t operator()() const { assert(populated); return entry4u; }
126 
127  const PageTableEntry &
128  operator=(uint64_t e)
129  {
130  populated = true;
131  entry4u = e;
132  return *this;
133  }
134 
135  const PageTableEntry &
137  {
138  populated = true;
139  entry4u = e.entry4u;
140  type = e.type;
141  return *this;
142  }
143 
144  bool valid() const { return bits(entry4u,63,63) && populated; }
145 
146  uint8_t
147  _size() const
148  {
149  assert(populated);
150  return bits(entry4u, 62,61) | bits(entry4u, 48,48) << 2;
151  }
152 
153  Addr size() const { assert(_size() < 6); return pageSizes[_size()]; }
154  Addr sizeMask() const { return size() - 1; }
155  bool ie() const { return bits(entry4u, 59,59); }
156  Addr pfn() const { assert(populated); return bits(entry4u,39,13); }
157  Addr paddr() const { assert(populated); return mbits(entry4u, 39,13);}
158  bool locked() const { assert(populated); return bits(entry4u,6,6); }
159  bool cv() const { assert(populated); return bits(entry4u,4,4); }
160  bool cp() const { assert(populated); return bits(entry4u,5,5); }
161  bool priv() const { assert(populated); return bits(entry4u,2,2); }
162  bool writable() const { assert(populated); return bits(entry4u,1,1); }
163  bool nofault() const { assert(populated); return bits(entry4u,60,60); }
164  bool sideffect() const { assert(populated); return bits(entry4u,3,3); }
165  Addr paddrMask() const { assert(populated); return paddr() & ~sizeMask(); }
166 
167  Addr
169  {
170  assert(populated);
171  Addr mask = sizeMask();
172  return (paddr() & ~mask) | (vaddr & mask);
173  }
174 };
175 
176 struct TlbRange
177 {
182  bool real;
183 
184  inline bool
185  operator<(const TlbRange &r2) const
186  {
187  if (real && !r2.real)
188  return true;
189  if (!real && r2.real)
190  return false;
191 
192  if (!real && !r2.real) {
193  if (contextId < r2.contextId)
194  return true;
195  else if (contextId > r2.contextId)
196  return false;
197  }
198 
199  if (partitionId < r2.partitionId)
200  return true;
201  else if (partitionId > r2.partitionId)
202  return false;
203 
204  if (va < r2.va)
205  return true;
206  return false;
207  }
208 
209  inline bool
210  operator==(const TlbRange &r2) const
211  {
212  return va == r2.va &&
213  size == r2.size &&
214  contextId == r2.contextId &&
215  partitionId == r2.partitionId &&
216  real == r2.real;
217  }
218 };
219 
220 
221 struct TlbEntry
222 {
224  {}
225 
226  TlbEntry(Addr asn, Addr vaddr, Addr paddr,
227  bool uncacheable, bool read_only)
228  {
229  uint64_t entry = 0;
230  if (!read_only)
231  entry |= 1ULL << 1; // Writable
232  entry |= 0ULL << 2; // Available in nonpriveleged mode
233  entry |= 0ULL << 3; // No side effects
234  if (!uncacheable) {
235  entry |= 1ULL << 4; // Virtually cachable
236  entry |= 1ULL << 5; // Physically cachable
237  }
238  entry |= 0ULL << 6; // Not locked
239  entry |= mbits(paddr, 39, 13); // Physical address
240  entry |= 0ULL << 48; // size = 8k
241  entry |= 0uLL << 59; // Endianness not inverted
242  entry |= 0ULL << 60; // Not no fault only
243  entry |= 0ULL << 61; // size = 8k
244  entry |= 1ULL << 63; // valid
245  pte = PageTableEntry(entry);
246 
247  range.va = vaddr;
248  range.size = 8*(1<<10);
249  range.contextId = asn;
250  range.partitionId = 0;
251  range.real = false;
252 
253  valid = true;
254  }
255 
258  bool used;
259  bool valid;
260 
261  Addr
263  {
264  return pte.paddr();
265  }
266 
267  void
268  updateVaddr(Addr new_vaddr)
269  {
270  range.va = new_vaddr;
271  }
272 
273  void serialize(CheckpointOut &cp) const;
274  void unserialize(CheckpointIn &cp);
275 };
276 
277 } // namespace SparcISA
278 
279 #endif // __ARCH_SPARC_PAGE_TABLE_HH__
280 
SparcISA::PageTableEntry::sun4v
@ sun4v
Definition: pagetable.hh:69
SparcISA::TlbRange::contextId
int contextId
Definition: pagetable.hh:180
SparcISA::TlbEntry::valid
bool valid
Definition: pagetable.hh:259
SparcISA::PageTableEntry::PageTableEntry
PageTableEntry(uint64_t e, EntryType t=sun4u)
Definition: pagetable.hh:84
serialize.hh
SparcISA::PageTableEntry::PageTableEntry
PageTableEntry()
Definition: pagetable.hh:81
SparcISA::PageTableEntry::cv
bool cv() const
Definition: pagetable.hh:159
SparcISA::TteTag::TteTag
TteTag()
Definition: pagetable.hh:49
SparcISA::PageTableEntry::paddrMask
Addr paddrMask() const
Definition: pagetable.hh:165
SparcISA::TteTag
Definition: pagetable.hh:42
SparcISA::TteTag::populated
bool populated
Definition: pagetable.hh:46
SparcISA::PageTableEntry::translate
Addr translate(Addr vaddr) const
Definition: pagetable.hh:168
SparcISA::PageTableEntry::EntryType
EntryType
Definition: pagetable.hh:68
SparcISA::TlbEntry
Definition: pagetable.hh:221
SparcISA::TteTag::va
Addr va() const
Definition: pagetable.hh:61
SparcISA::PageTableEntry::entry4u
uint64_t entry4u
Definition: pagetable.hh:77
SparcISA::PageTableEntry::priv
bool priv() const
Definition: pagetable.hh:161
mbits
T mbits(T val, int first, int last)
Mask off the given bits in place like bits() but without shifting.
Definition: bitfield.hh:104
SparcISA::PageTableEntry::valid
bool valid() const
Definition: pagetable.hh:144
SparcISA::TteTag::TteTag
TteTag(uint64_t e)
Definition: pagetable.hh:50
SparcISA::TlbRange::size
Addr size
Definition: pagetable.hh:179
SparcISA::PageTableEntry::ie
bool ie() const
Definition: pagetable.hh:155
SparcISA::TlbRange::operator==
bool operator==(const TlbRange &r2) const
Definition: pagetable.hh:210
SparcISA::PageTableEntry::_size
uint8_t _size() const
Definition: pagetable.hh:147
SparcISA::TlbEntry::serialize
void serialize(CheckpointOut &cp) const
Definition: pagetable.cc:37
SparcISA::TlbEntry::TlbEntry
TlbEntry()
Definition: pagetable.hh:223
SparcISA::PageTableEntry::type
EntryType type
Definition: pagetable.hh:76
SparcISA
Definition: asi.cc:31
SparcISA::PageTableEntry::invalid
@ invalid
Definition: pagetable.hh:71
SparcISA::PageTableEntry::operator()
uint64_t operator()() const
Definition: pagetable.hh:125
SparcISA::PageTableEntry::pageSizes
static int pageSizes[6]
Definition: pagetable.hh:123
SparcISA::PageTableEntry::sun4u
@ sun4u
Definition: pagetable.hh:70
cp
Definition: cprintf.cc:40
SparcISA::TteTag::entry
uint64_t entry
Definition: pagetable.hh:45
SparcISA::TlbRange::operator<
bool operator<(const TlbRange &r2) const
Definition: pagetable.hh:185
SparcISA::PageTableEntry::operator=
const PageTableEntry & operator=(uint64_t e)
Definition: pagetable.hh:128
bitfield.hh
SparcISA::PageTableEntry::clear
void clear()
Definition: pagetable.hh:118
SparcISA::TteTag::operator=
const TteTag & operator=(uint64_t e)
Definition: pagetable.hh:53
SparcISA::TlbEntry::TlbEntry
TlbEntry(Addr asn, Addr vaddr, Addr paddr, bool uncacheable, bool read_only)
Definition: pagetable.hh:226
MipsISA::vaddr
vaddr
Definition: pra_constants.hh:275
isa_traits.hh
SparcISA::PageTableEntry::sizeMask
Addr sizeMask() const
Definition: pagetable.hh:154
SparcISA::PageTableEntry::entry
uint64_t entry
Definition: pagetable.hh:75
SparcISA::TlbEntry::updateVaddr
void updateVaddr(Addr new_vaddr)
Definition: pagetable.hh:268
SparcISA::TlbEntry::used
bool used
Definition: pagetable.hh:258
SparcISA::TlbEntry::unserialize
void unserialize(CheckpointIn &cp)
Definition: pagetable.cc:54
SparcISA::PageTableEntry::cp
bool cp() const
Definition: pagetable.hh:160
SparcISA::PageTableEntry::populate
void populate(uint64_t e, EntryType t=sun4u)
Definition: pagetable.hh:91
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
SparcISA::PageTableEntry::nofault
bool nofault() const
Definition: pagetable.hh:163
ArmISA::e
Bitfield< 9 > e
Definition: miscregs_types.hh:61
SparcISA::TlbRange::partitionId
int partitionId
Definition: pagetable.hh:181
SparcISA::TlbRange
Definition: pagetable.hh:176
ArmISA::t
Bitfield< 5 > t
Definition: miscregs_types.hh:67
SparcISA::PageTableEntry::sideffect
bool sideffect() const
Definition: pagetable.hh:164
logging.hh
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:63
SparcISA::TlbRange::va
Addr va
Definition: pagetable.hh:178
SparcISA::PageTableEntry::writable
bool writable() const
Definition: pagetable.hh:162
SparcISA::PageTableEntry
Definition: pagetable.hh:65
SparcISA::TlbEntry::pte
PageTableEntry pte
Definition: pagetable.hh:257
SparcISA::PageTableEntry::populated
bool populated
Definition: pagetable.hh:78
CheckpointIn
Definition: serialize.hh:67
SparcISA::PageTableEntry::pfn
Addr pfn() const
Definition: pagetable.hh:156
SparcISA::PageTableEntry::paddr
Addr paddr() const
Definition: pagetable.hh:157
SparcISA::PageTableEntry::locked
bool locked() const
Definition: pagetable.hh:158
SparcISA::TlbRange::real
bool real
Definition: pagetable.hh:182
SparcISA::TteTag::valid
bool valid() const
Definition: pagetable.hh:60
SparcISA::TlbEntry::range
TlbRange range
Definition: pagetable.hh:256
SparcISA::TlbEntry::pageStart
Addr pageStart()
Definition: pagetable.hh:262
ULL
#define ULL(N)
uint64_t constant
Definition: types.hh:50
SparcISA::PageTableEntry::operator=
const PageTableEntry & operator=(const PageTableEntry &e)
Definition: pagetable.hh:136
ArmISA::mask
Bitfield< 28, 24 > mask
Definition: miscregs_types.hh:711
bits
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:75
SparcISA::PageTableEntry::size
Addr size() const
Definition: pagetable.hh:153

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