gem5  v20.1.0.0
sve_mem.cc
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37 
39 
40 namespace ArmISA
41 {
42 
43 std::string
45  Addr pc, const Loader::SymbolTable *symtab) const
46 {
47  std::stringstream ss;
48  printMnemonic(ss, "", false);
49  printVecReg(ss, dest, true);
50  ccprintf(ss, ", [");
52  if (imm != 0) {
53  ccprintf(ss, ", #%d, mul vl", imm);
54  }
55  ccprintf(ss, "]");
56  return ss.str();
57 }
58 
59 std::string
61  Addr pc, const Loader::SymbolTable *symtab) const
62 {
63  std::stringstream ss;
64  printMnemonic(ss, "", false);
66  ccprintf(ss, ", [");
68  if (imm != 0) {
69  ccprintf(ss, ", #%d, mul vl", imm);
70  }
71  ccprintf(ss, "]");
72  return ss.str();
73 }
74 
75 std::string
77  Addr pc, const Loader::SymbolTable *symtab) const
78 {
79  // TODO: add suffix to transfer register and scaling factor (LSL #<x>)
80  std::stringstream ss;
81  printMnemonic(ss, "", false);
82  ccprintf(ss, "{");
83  printVecReg(ss, dest, true);
84  ccprintf(ss, "}, ");
86  ccprintf(ss, "/z, ");
87  ccprintf(ss, ", [");
89  ccprintf(ss, ", ");
91  ccprintf(ss, "]");
92  return ss.str();
93 }
94 
95 std::string
97  Addr pc, const Loader::SymbolTable *symtab) const
98 {
99  // TODO: add suffix to transfer register
100  std::stringstream ss;
101  printMnemonic(ss, "", false);
102  ccprintf(ss, "{");
103  printVecReg(ss, dest, true);
104  ccprintf(ss, "}, ");
106  ccprintf(ss, "/z, ");
107  ccprintf(ss, ", [");
108  printIntReg(ss, base);
109  if (imm != 0) {
110  ccprintf(ss, ", #%d, mul vl", imm);
111  }
112  ccprintf(ss, "]");
113  return ss.str();
114 }
115 
116 } // namespace ArmISA
ArmISA::SveContigMemSI::imm
uint64_t imm
Definition: sve_mem.hh:132
ArmISA::SveContigMemSS::base
IntRegIndex base
Definition: sve_mem.hh:104
ArmISA::SveMemPredFillSpill::base
IntRegIndex base
Definition: sve_mem.hh:77
Loader::SymbolTable
Definition: symtab.hh:59
ArmISA::SveContigMemSS::offset
IntRegIndex offset
Definition: sve_mem.hh:105
ArmISA::ArmStaticInst::printIntReg
void printIntReg(std::ostream &os, RegIndex reg_idx, uint8_t opWidth=0) const
Print a register name for disassembly given the unique dependence tag number (FP or int).
Definition: static_inst.cc:296
ArmISA
Definition: ccregs.hh:41
ArmISA::SveContigMemSS::dest
IntRegIndex dest
Definition: sve_mem.hh:102
ArmISA::ss
Bitfield< 21 > ss
Definition: miscregs_types.hh:56
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
ArmISA::SveMemVecFillSpill::imm
uint64_t imm
Definition: sve_mem.hh:52
ArmISA::SveMemVecFillSpill::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve_mem.cc:44
ArmISA::SveContigMemSI::base
IntRegIndex base
Definition: sve_mem.hh:131
ArmISA::SveMemPredFillSpill::dest
IntRegIndex dest
Definition: sve_mem.hh:76
ArmISA::SveContigMemSS::gp
IntRegIndex gp
Definition: sve_mem.hh:103
ArmISA::SveMemVecFillSpill::base
IntRegIndex base
Definition: sve_mem.hh:51
ArmISA::SveContigMemSI::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve_mem.cc:96
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
ArmISA::ArmStaticInst::printVecPredReg
void printVecPredReg(std::ostream &os, RegIndex reg_idx) const
Definition: static_inst.cc:355
ArmISA::ArmStaticInst::printVecReg
void printVecReg(std::ostream &os, RegIndex reg_idx, bool isSveVecReg=false) const
Definition: static_inst.cc:348
ArmISA::SveContigMemSI::gp
IntRegIndex gp
Definition: sve_mem.hh:130
ArmISA::SveContigMemSI::dest
IntRegIndex dest
Definition: sve_mem.hh:129
ArmISA::ArmStaticInst::printMnemonic
void printMnemonic(std::ostream &os, const std::string &suffix="", bool withPred=true, bool withCond64=false, ConditionCode cond64=COND_UC) const
Definition: static_inst.cc:374
ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:127
ArmISA::SveContigMemSS::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve_mem.cc:76
ArmISA::SveMemPredFillSpill::imm
uint64_t imm
Definition: sve_mem.hh:78
sve_mem.hh
ArmISA::SveMemPredFillSpill::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve_mem.cc:60
ArmISA::SveMemVecFillSpill::dest
IntRegIndex dest
Definition: sve_mem.hh:50

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