gem5  v20.1.0.0
trace_cpu.hh
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37 
38 #ifndef __CPU_TRACE_TRACE_CPU_HH__
39 #define __CPU_TRACE_TRACE_CPU_HH__
40 
41 #include <array>
42 #include <cstdint>
43 #include <queue>
44 #include <set>
45 #include <unordered_map>
46 
47 #include "arch/registers.hh"
48 #include "base/statistics.hh"
49 #include "cpu/base.hh"
50 #include "debug/TraceCPUData.hh"
51 #include "debug/TraceCPUInst.hh"
52 #include "params/TraceCPU.hh"
53 #include "proto/inst_dep_record.pb.h"
54 #include "proto/packet.pb.h"
55 #include "proto/protoio.hh"
56 #include "sim/sim_events.hh"
57 
140 class TraceCPU : public BaseCPU
141 {
142 
143  public:
144  TraceCPU(TraceCPUParams *params);
145  ~TraceCPU();
146 
147  void init();
148 
157  {
158  return 0;
159  }
160 
168  {
169  return traceStats.numOps.value();
170  }
171 
172  /*
173  * Set the no. of ops when elastic data generator completes executing a
174  * node.
175  */
176  void updateNumOps(uint64_t rob_num);
177 
178  /* Pure virtual function in BaseCPU. Do nothing. */
179  void wakeup(ThreadID tid = 0)
180  {
181  return;
182  }
183 
184  /*
185  * When resuming from checkpoint in FS mode, the TraceCPU takes over from
186  * the old cpu. This function overrides the takeOverFrom() function in the
187  * BaseCPU. It unbinds the ports of the old CPU and binds the ports of the
188  * TraceCPU.
189  */
190  void takeOverFrom(BaseCPU *oldCPU);
191 
196  void icacheRetryRecvd();
197 
202  void dcacheRetryRecvd();
203 
211 
217  void schedDcacheNextEvent(Tick when);
218 
219  protected:
220 
224  class IcachePort : public RequestPort
225  {
226  public:
229  : RequestPort(_cpu->name() + ".icache_port", _cpu),
230  owner(_cpu)
231  { }
232 
233  public:
242  bool recvTimingResp(PacketPtr pkt);
243 
250 
255  void recvReqRetry();
256 
257  private:
259  };
260 
264  class DcachePort : public RequestPort
265  {
266 
267  public:
270  : RequestPort(_cpu->name() + ".dcache_port", _cpu),
271  owner(_cpu)
272  { }
273 
274  public:
275 
283  bool recvTimingResp(PacketPtr pkt);
284 
291  { }
292 
299  { }
300 
305  void recvReqRetry();
306 
312  bool isSnooping() const { return true; }
313 
314  private:
316  };
317 
320 
323 
326 
329 
332 
340  {
341 
342  private:
343 
347  struct TraceElement {
348 
351 
354 
357 
360 
363 
366 
372  bool isValid() const {
373  return cmd != MemCmd::InvalidCmd;
374  }
375 
379  void clear() {
381  }
382  };
383 
390  {
391 
392  private:
393 
394  // Input file stream for the protobuf trace
396 
397  public:
398 
404  InputStream(const std::string& filename);
405 
410  void reset();
411 
420  bool read(TraceElement* element);
421  };
422 
423  public:
424  /* Constructor */
425  FixedRetryGen(TraceCPU& _owner, const std::string& _name,
426  RequestPort& _port, RequestorID requestor_id,
427  const std::string& trace_file)
428  : owner(_owner),
429  port(_port),
430  requestorId(requestor_id),
431  trace(trace_file),
432  genName(owner.name() + ".fixedretry." + _name),
433  retryPkt(nullptr),
434  delta(0),
435  traceComplete(false), fixedStats(&_owner, _name)
436  {
437  }
438 
445  Tick init();
446 
453  bool tryNext();
454 
456  const std::string& name() const { return genName; }
457 
471  bool send(Addr addr, unsigned size, const MemCmd& cmd,
472  Request::FlagsType flags, Addr pc);
473 
475  void exit();
476 
484  bool nextExecute();
485 
492  bool isTraceComplete() { return traceComplete; }
493 
494  int64_t tickDelta() { return delta; }
495 
496 
497  private:
498 
501 
504 
507 
510 
512  std::string genName;
513 
516 
522  int64_t delta;
523 
528 
531  protected:
533  {
536  const std::string& _name);
544  } fixedStats;
545 
546  };
547 
560  {
561 
562  private:
563 
565  typedef uint64_t NodeSeqNum;
566 
568  typedef uint64_t NodeRobNum;
569 
570  typedef ProtoMessage::InstDepRecord::RecordType RecordType;
571  typedef ProtoMessage::InstDepRecord Record;
572 
579  class GraphNode {
580 
581  public:
587  static const uint8_t maxRobDep = 2;
588 
590  typedef std::array<NodeSeqNum, maxRobDep> RobDepArray;
591 
593  typedef std::array<NodeSeqNum, TheISA::MaxInstSrcRegs> RegDepArray;
594 
597 
600 
603 
606 
609 
611  uint32_t size;
612 
615 
618 
621 
623  uint8_t numRobDep;
624 
626  uint64_t compDelay;
627 
633 
635  uint8_t numRegDep;
636 
643 
645  bool isLoad() const { return (type == Record::LOAD); }
646 
648  bool isStore() const { return (type == Record::STORE); }
649 
651  bool isComp() const { return (type == Record::COMP); }
652 
654  void clearRegDep();
655 
657  void clearRobDep();
658 
660  bool removeRegDep(NodeSeqNum reg_dep);
661 
663  bool removeRobDep(NodeSeqNum rob_dep);
664 
666  bool removeDepOnInst(NodeSeqNum done_seq_num);
667 
669  bool isStrictlyOrdered() const {
671  }
676  void writeElementAsTrace() const;
677 
679  std::string typeToStr() const;
680  };
681 
683  struct ReadyNode
684  {
687 
690  };
691 
698  {
699  public:
707  HardwareResource(uint16_t max_rob, uint16_t max_stores,
708  uint16_t max_loads);
709 
715  void occupy(const GraphNode* new_node);
716 
722  void release(const GraphNode* done_node);
723 
725  void releaseStoreBuffer();
726 
733  bool isAvailable(const GraphNode* new_node) const;
734 
742  bool awaitingResponse() const;
743 
745  void printOccupancy();
746 
747  private:
752  const uint16_t sizeROB;
753 
758  const uint16_t sizeStoreBuffer;
759 
764  const uint16_t sizeLoadBuffer;
765 
776  std::map<NodeSeqNum, NodeRobNum> inFlightNodes;
777 
780 
783 
786  };
787 
794  {
795 
796  private:
797 
800 
807  const double timeMultiplier;
808 
810  uint64_t microOpCount;
811 
816  uint32_t windowSize;
817  public:
818 
825  InputStream(const std::string& filename,
826  const double time_multiplier);
827 
832  void reset();
833 
843  bool read(GraphNode* element);
844 
846  uint32_t getWindowSize() const { return windowSize; }
847 
849  uint64_t getMicroOpCount() const { return microOpCount; }
850  };
851 
852  public:
853  /* Constructor */
854  ElasticDataGen(TraceCPU& _owner, const std::string& _name,
855  RequestPort& _port, RequestorID requestor_id,
856  const std::string& trace_file, TraceCPUParams *params)
857  : owner(_owner),
858  port(_port),
859  requestorId(requestor_id),
860  trace(trace_file, 1.0 / params->freqMultiplier),
861  genName(owner.name() + ".elastic." + _name),
862  retryPkt(nullptr),
863  traceComplete(false),
864  nextRead(false),
865  execComplete(false),
866  windowSize(trace.getWindowSize()),
867  hwResource(params->sizeROB, params->sizeStoreBuffer,
868  params->sizeLoadBuffer), elasticStats(&_owner, _name)
869  {
870  DPRINTF(TraceCPUData, "Window size in the trace is %d.\n",
871  windowSize);
872  }
873 
880  Tick init();
881 
889 
891  const std::string& name() const { return genName; }
892 
894  void exit();
895 
903  bool readNextWindow();
904 
915  template<typename T> void addDepsOnParent(GraphNode *new_node,
916  T& dep_array,
917  uint8_t& num_dep);
918 
928  void execute();
929 
940  PacketPtr executeMemReq(GraphNode* node_ptr);
941 
949  void addToSortedReadyList(NodeSeqNum seq_num, Tick exec_tick);
950 
952  void printReadyList();
953 
959  void completeMemAccess(PacketPtr pkt);
960 
967  bool isExecComplete() const { return execComplete; }
968 
979  bool checkAndIssue(const GraphNode* node_ptr, bool first = true);
980 
982  uint64_t getMicroOpCount() const { return trace.getMicroOpCount(); }
983 
984 
985  private:
986 
989 
992 
995 
998 
1000  std::string genName;
1001 
1004 
1007 
1009  bool nextRead;
1010 
1013 
1023  const uint32_t windowSize;
1024 
1030 
1032  std::unordered_map<NodeSeqNum, GraphNode*> depGraph;
1033 
1041  std::queue<const GraphNode*> depFreeQueue;
1042 
1045 
1046  protected:
1047  // Defining the a stat group
1049  {
1052  const std::string& _name);
1065  } elasticStats;
1066  };
1067 
1070 
1073 
1080  void schedIcacheNext();
1081 
1087  void schedDcacheNext();
1088 
1091 
1094 
1096  void checkAndSchedExitEvent();
1097 
1100 
1108 
1115  static int numTraceCPUs;
1116 
1123 
1128  const bool enableEarlyExit;
1129 
1134  const uint64_t progressMsgInterval;
1135 
1136  /*
1137  * The progress msg threshold is kept updated to the next multiple of the
1138  * progress msg interval. As soon as the threshold is reached, an info
1139  * message is printed.
1140  */
1142  struct TraceStats : public Stats::Group
1143  {
1144  TraceStats(TraceCPU *trace);
1147 
1153  } traceStats;
1154 
1155  public:
1156 
1158  Port &getInstPort() { return icachePort; }
1159 
1161  Port &getDataPort() { return dcachePort; }
1162 
1163 };
1164 #endif // __CPU_TRACE_TRACE_CPU_HH__
TraceCPU::ElasticDataGen::completeMemAccess
void completeMemAccess(PacketPtr pkt)
When a load writeback is received, that is when the load completes, release the dependents on it.
Definition: trace_cpu.cc:680
TraceCPU::progressMsgInterval
const uint64_t progressMsgInterval
Interval of committed instructions specified by the user at which a progress info message is printed.
Definition: trace_cpu.hh:1134
TraceCPU::ElasticDataGen::InputStream::getWindowSize
uint32_t getWindowSize() const
Get window size from trace.
Definition: trace_cpu.hh:846
TraceCPU::schedIcacheNext
void schedIcacheNext()
This is the control flow that uses the functionality of the icacheGen to replay the trace.
Definition: trace_cpu.cc:154
TraceCPU::ElasticDataGen::HardwareResource
The HardwareResource class models structures that hold the in-flight nodes.
Definition: trace_cpu.hh:697
TraceCPU::ElasticDataGen::addDepsOnParent
void addDepsOnParent(GraphNode *new_node, T &dep_array, uint8_t &num_dep)
Iterate over the dependencies of a new node and add the new node to the list of dependents of the par...
Definition: trace_cpu.cc:338
TraceCPU::ElasticDataGen::execute
void execute()
This is the main execute function which consumes nodes from the sorted readyList.
Definition: trace_cpu.cc:369
TraceCPU::ElasticDataGen::GraphNode::removeRobDep
bool removeRobDep(NodeSeqNum rob_dep)
Remove completed instruction from order dependency array.
Definition: trace_cpu.cc:1304
TraceCPU::ElasticDataGen::GraphNode::removeDepOnInst
bool removeDepOnInst(NodeSeqNum done_seq_num)
Check for all dependencies on completed inst.
Definition: trace_cpu.cc:1337
TraceCPU::TraceStats::TraceStats
TraceStats(TraceCPU *trace)
Definition: trace_cpu.cc:212
TraceCPU::takeOverFrom
void takeOverFrom(BaseCPU *oldCPU)
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be sw...
Definition: trace_cpu.cc:103
TraceCPU::ElasticDataGen::GraphNode::RobDepArray
std::array< NodeSeqNum, maxRobDep > RobDepArray
Typedef for the array containing the ROB dependencies.
Definition: trace_cpu.hh:590
TraceCPU::ElasticDataGen::HardwareResource::sizeROB
const uint16_t sizeROB
The size of the ROB used to throttle the max.
Definition: trace_cpu.hh:752
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup
Definition: trace_cpu.hh:532
TraceCPU::icachePort
IcachePort icachePort
Port to connect to L1 instruction cache.
Definition: trace_cpu.hh:319
TraceCPU::traceStats
TraceCPU::TraceStats traceStats
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSendSucceeded
Stats::Scalar numSendSucceeded
Definition: trace_cpu.hh:1057
TraceCPU::TraceStats::numSchedDcacheEvent
Stats::Scalar numSchedDcacheEvent
Definition: trace_cpu.hh:1145
TraceCPU::TraceStats::numSchedIcacheEvent
Stats::Scalar numSchedIcacheEvent
Definition: trace_cpu.hh:1146
TraceCPU::ElasticDataGen::GraphNode::typeToStr
std::string typeToStr() const
Return string specifying the type of the node.
Definition: trace_cpu.cc:1385
Request::FlagsType
uint64_t FlagsType
Definition: request.hh:90
TraceCPU::ElasticDataGen::InputStream::reset
void reset()
Reset the stream such that it can be played once again.
Definition: trace_cpu.cc:1204
sim_events.hh
TraceCPU::FixedRetryGen::init
Tick init()
Called from TraceCPU init().
Definition: trace_cpu.cc:970
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:227
TraceCPU::ElasticDataGen::InputStream::trace
ProtoInputStream trace
Input file stream for the protobuf trace.
Definition: trace_cpu.hh:799
Flags< FlagsType >
TraceCPU::ElasticDataGen::HardwareResource::inFlightNodes
std::map< NodeSeqNum, NodeRobNum > inFlightNodes
A map from the sequence number to the ROB number of the in- flight nodes.
Definition: trace_cpu.hh:776
TraceCPU::ElasticDataGen::addToSortedReadyList
void addToSortedReadyList(NodeSeqNum seq_num, Tick exec_tick)
Add a ready node to the readyList.
Definition: trace_cpu.cc:747
TraceCPU::FixedRetryGen::TraceElement::flags
Request::FlagsType flags
Potential request flags to use.
Definition: trace_cpu.hh:362
TraceCPU::execCompleteEvent
CountedExitEvent * execCompleteEvent
A CountedExitEvent which when serviced decrements the counter.
Definition: trace_cpu.hh:1122
TraceCPU::ElasticDataGen::HardwareResource::HardwareResource
HardwareResource(uint16_t max_rob, uint16_t max_stores, uint16_t max_loads)
Constructor that initializes the sizes of the structures.
Definition: trace_cpu.cc:821
TraceCPU::ElasticDataGen::genName
std::string genName
String to store the name of the FixedRetryGen.
Definition: trace_cpu.hh:1000
TraceCPU::ElasticDataGen::GraphNode::clearRobDep
void clearRobDep()
Initialize register dependency array to all zeroes.
Definition: trace_cpu.cc:1329
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
TraceCPU::oneTraceComplete
bool oneTraceComplete
Set to true when one of the generators finishes replaying its trace.
Definition: trace_cpu.hh:1099
TraceCPU::FixedRetryGen::tickDelta
int64_t tickDelta()
Definition: trace_cpu.hh:494
protoio.hh
TraceCPU::FixedRetryGen::owner
TraceCPU & owner
Reference of the TraceCPU.
Definition: trace_cpu.hh:500
TraceCPU::getInstPort
Port & getInstPort()
Used to get a reference to the icache port.
Definition: trace_cpu.hh:1158
TraceCPU::DcachePort::isSnooping
bool isSnooping() const
Required functionally.
Definition: trace_cpu.hh:312
TraceCPU::ElasticDataGen::GraphNode::physAddr
Addr physAddr
The address for the request if any.
Definition: trace_cpu.hh:605
TraceCPU::schedDcacheNext
void schedDcacheNext()
This is the control flow that uses the functionality of the dcacheGen to replay the trace.
Definition: trace_cpu.cc:179
TraceCPU::DcachePort::DcachePort
DcachePort(TraceCPU *_cpu)
Default constructor.
Definition: trace_cpu.hh:269
TraceCPU::ElasticDataGen::requestorId
const RequestorID requestorId
RequestorID used for the requests being sent.
Definition: trace_cpu.hh:994
TraceCPU::checkAndSchedExitEvent
void checkAndSchedExitEvent()
This is called when either generator finishes executing from the trace.
Definition: trace_cpu.cc:193
TraceCPU::ElasticDataGen::HardwareResource::awaitingResponse
bool awaitingResponse() const
Check if there are any outstanding requests, i.e.
Definition: trace_cpu.cc:943
TraceCPU::ElasticDataGen::InputStream::timeMultiplier
const double timeMultiplier
A multiplier for the compute delays in the trace to modulate the Trace CPU frequency either up or dow...
Definition: trace_cpu.hh:807
TraceCPU::IcachePort
IcachePort class that interfaces with L1 Instruction Cache.
Definition: trace_cpu.hh:224
std::vector
STL vector class.
Definition: stl.hh:37
TraceCPU::ElasticDataGen::trace
InputStream trace
Input stream used for reading the input trace file.
Definition: trace_cpu.hh:997
TraceCPU::ElasticDataGen::GraphNode::robNum
NodeRobNum robNum
ROB occupancy number.
Definition: trace_cpu.hh:599
TraceCPU::init
void init()
Definition: trace_cpu.cc:111
TraceCPU::ElasticDataGen::readyList
std::list< ReadyNode > readyList
List of nodes that are ready to execute.
Definition: trace_cpu.hh:1044
TraceCPU::ElasticDataGen::ReadyNode
Struct to store a ready-to-execute node and its execution tick.
Definition: trace_cpu.hh:683
TraceCPU::DcachePort
DcachePort class that interfaces with L1 Data Cache.
Definition: trace_cpu.hh:264
TraceCPU::FixedRetryGen::FixedRetryGen
FixedRetryGen(TraceCPU &_owner, const std::string &_name, RequestPort &_port, RequestorID requestor_id, const std::string &trace_file)
Definition: trace_cpu.hh:425
TraceCPU::FixedRetryGen::genName
std::string genName
String to store the name of the FixedRetryGen.
Definition: trace_cpu.hh:512
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSendFailed
Stats::Scalar numSendFailed
Definition: trace_cpu.hh:1058
TraceCPU::ElasticDataGen::hwResource
HardwareResource hwResource
Hardware resources required to contain in-flight nodes and to throttle issuing of new nodes when reso...
Definition: trace_cpu.hh:1029
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::instLastTick
Stats::Scalar instLastTick
Last simulated tick by the FixedRetryGen.
Definition: trace_cpu.hh:543
TraceCPU::icacheGen
FixedRetryGen icacheGen
Instance of FixedRetryGen to replay instruction read requests.
Definition: trace_cpu.hh:1069
TraceCPU::FixedRetryGen::TraceElement
This struct stores a line in the trace file.
Definition: trace_cpu.hh:347
EventFunctionWrapper
Definition: eventq.hh:1101
TraceCPU::ElasticDataGen::adjustInitTraceOffset
void adjustInitTraceOffset(Tick &offset)
Adjust traceOffset based on what TraceCPU init() determines on comparing the offsets in the fetch req...
Definition: trace_cpu.cc:272
TraceCPU::FixedRetryGen::traceComplete
bool traceComplete
Set to true when end of trace is reached.
Definition: trace_cpu.hh:527
TraceCPU::ElasticDataGen::GraphNode::seqNum
NodeSeqNum seqNum
Instruction sequence number.
Definition: trace_cpu.hh:596
TraceCPU::IcachePort::recvTimingSnoopReq
void recvTimingSnoopReq(PacketPtr pkt)
Required functionally but do nothing.
Definition: trace_cpu.hh:249
TraceCPU::FixedRetryGen::InputStream::read
bool read(TraceElement *element)
Attempt to read a trace element from the stream, and also notify the caller if the end of the file wa...
Definition: trace_cpu.cc:1412
TraceCPU::~TraceCPU
~TraceCPU()
Definition: trace_cpu.cc:80
TraceCPU::ElasticDataGen::GraphNode::isStrictlyOrdered
bool isStrictlyOrdered() const
Return true if node has a request which is strictly ordered.
Definition: trace_cpu.hh:669
TraceCPU::FixedRetryGen::port
RequestPort & port
Reference of the port to be used to issue memory requests.
Definition: trace_cpu.hh:503
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numSendAttempted
Stats::Scalar numSendAttempted
Stats for instruction accesses replayed.
Definition: trace_cpu.hh:538
TraceCPU::FixedRetryGen::exit
void exit()
Exit the FixedRetryGen.
Definition: trace_cpu.cc:1034
Stats::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:2533
TraceCPU::ElasticDataGen::HardwareResource::sizeLoadBuffer
const uint16_t sizeLoadBuffer
The size of load buffer.
Definition: trace_cpu.hh:764
TraceCPU::FixedRetryGen::isTraceComplete
bool isTraceComplete()
Returns the traceComplete variable which is set when end of the input trace file is reached.
Definition: trace_cpu.hh:492
RequestorID
uint16_t RequestorID
Definition: request.hh:85
TraceCPU::ElasticDataGen::HardwareResource::numInFlightStores
uint16_t numInFlightStores
Number of ready stores for which request may or may not be sent.
Definition: trace_cpu.hh:785
Counter
int64_t Counter
Statistics counter type.
Definition: types.hh:58
MemCmd::InvalidCmd
@ InvalidCmd
Definition: packet.hh:81
Request::STRICT_ORDER
@ STRICT_ORDER
The request is required to be strictly ordered by CPU models and is non-speculative.
Definition: request.hh:124
TraceCPU::ElasticDataGen::InputStream::getMicroOpCount
uint64_t getMicroOpCount() const
Get number of micro-ops modelled in the TraceCPU replay.
Definition: trace_cpu.hh:849
TraceCPU::wakeup
void wakeup(ThreadID tid=0)
Definition: trace_cpu.hh:179
TraceCPU::ElasticDataGen::NodeRobNum
uint64_t NodeRobNum
Node ROB number type.
Definition: trace_cpu.hh:568
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::FixedRetryGenStatGroup
FixedRetryGenStatGroup(Stats::Group *parent, const std::string &_name)
name is the extension to the name for these stats
Definition: trace_cpu.cc:957
TraceCPU::dcacheRetryRecvd
void dcacheRetryRecvd()
When data cache port receives a retry, schedule event dcacheNextEvent.
Definition: trace_cpu.cc:1113
TraceCPU::ElasticDataGen::port
RequestPort & port
Reference of the port to be used to issue memory requests.
Definition: trace_cpu.hh:991
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numSendSucceeded
Stats::Scalar numSendSucceeded
Definition: trace_cpu.hh:539
TraceCPU::FixedRetryGen::nextExecute
bool nextExecute()
Reads a line of the trace file.
Definition: trace_cpu.cc:1040
Stats::ScalarBase::value
Counter value() const
Return the current value of this stat as its base type.
Definition: statistics.hh:698
TraceCPU::ElasticDataGen::owner
TraceCPU & owner
Reference of the TraceCPU.
Definition: trace_cpu.hh:988
TraceCPU::FixedRetryGen::InputStream::InputStream
InputStream(const std::string &filename)
Create a trace input stream for a given file name.
Definition: trace_cpu.cc:1390
TraceCPU::FixedRetryGen::TraceElement::cmd
MemCmd cmd
Specifies if the request is to be a read or a write.
Definition: trace_cpu.hh:350
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numRetrySucceeded
Stats::Scalar numRetrySucceeded
Definition: trace_cpu.hh:541
TraceCPU::ElasticDataGen
The elastic data memory request generator to read protobuf trace containing execution trace annotated...
Definition: trace_cpu.hh:559
TraceCPU::DcachePort::recvReqRetry
void recvReqRetry()
Handle a retry signalled by the cache if data access failed in the first attempt.
Definition: trace_cpu.cc:1175
TraceCPU::DcachePort::owner
TraceCPU * owner
Definition: trace_cpu.hh:315
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup
Definition: trace_cpu.hh:1048
TraceCPU::DcachePort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive the timing reponse and call dcacheRecvTimingResp() method of the dcacheGen to handle completi...
Definition: trace_cpu.cc:1162
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
TraceCPU::ElasticDataGen::elasticStats
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup elasticStats
MemCmd
Definition: packet.hh:71
TraceCPU::FixedRetryGen::currElement
TraceElement currElement
Store an element read from the trace to send as the next packet.
Definition: trace_cpu.hh:530
TraceCPU::FixedRetryGen::TraceElement::pc
Addr pc
Instruction PC.
Definition: trace_cpu.hh:365
TraceCPU::ElasticDataGen::RecordType
ProtoMessage::InstDepRecord::RecordType RecordType
Definition: trace_cpu.hh:570
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
TraceCPU::IcachePort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive the timing reponse and simply delete the packet since instruction fetch requests are issued a...
Definition: trace_cpu.cc:1139
statistics.hh
TraceCPU::ElasticDataGen::GraphNode::flags
Request::Flags flags
Request flags if any.
Definition: trace_cpu.hh:614
TraceCPU::ElasticDataGen::execComplete
bool execComplete
Set true when execution of trace is complete.
Definition: trace_cpu.hh:1012
TraceCPU::ElasticDataGen::GraphNode::clearRegDep
void clearRegDep()
Initialize register dependency array to all zeroes.
Definition: trace_cpu.cc:1321
TraceCPU::FixedRetryGen::TraceElement::tick
Tick tick
The time at which the request should be sent.
Definition: trace_cpu.hh:359
Port
Ports are used to interface objects to each other.
Definition: port.hh:56
TraceCPU::ElasticDataGen::GraphNode::removeRegDep
bool removeRegDep(NodeSeqNum reg_dep)
Remove completed instruction from register dependency array.
Definition: trace_cpu.cc:1285
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSOStores
Stats::Scalar numSOStores
Definition: trace_cpu.hh:1062
TraceCPU::ElasticDataGen::printReadyList
void printReadyList()
Print readyList for debugging using debug flag TraceCPUData.
Definition: trace_cpu.cc:804
TraceCPU::FixedRetryGen
Generator to read protobuf trace containing memory requests at fixed timestamps, perform flow control...
Definition: trace_cpu.hh:339
TraceCPU::ElasticDataGen::GraphNode::dependents
std::vector< GraphNode * > dependents
A vector of nodes dependent (outgoing) on this node.
Definition: trace_cpu.hh:642
TraceCPU::DcachePort::recvFunctionalSnoop
void recvFunctionalSnoop(PacketPtr pkt)
Required functionally but do nothing.
Definition: trace_cpu.hh:298
TraceCPU::FixedRetryGen::InputStream
The InputStream encapsulates a trace file and the internal buffers and populates TraceElements based ...
Definition: trace_cpu.hh:389
TraceCPU::ElasticDataGen::GraphNode::compDelay
uint64_t compDelay
Computational delay.
Definition: trace_cpu.hh:626
TraceCPU::TraceCPU
TraceCPU(TraceCPUParams *params)
Definition: trace_cpu.cc:45
TraceCPU::ElasticDataGen::HardwareResource::isAvailable
bool isAvailable(const GraphNode *new_node) const
Check if structures required to issue a node are free.
Definition: trace_cpu.cc:899
TraceCPU::ElasticDataGen::GraphNode
The struct GraphNode stores an instruction in the trace file.
Definition: trace_cpu.hh:579
TraceCPU::ElasticDataGen::init
Tick init()
Called from TraceCPU init().
Definition: trace_cpu.cc:242
TraceCPU::progressMsgThreshold
uint64_t progressMsgThreshold
Definition: trace_cpu.hh:1141
TraceCPU::ElasticDataGen::GraphNode::pc
Addr pc
Instruction PC.
Definition: trace_cpu.hh:617
TraceCPU::ElasticDataGen::GraphNode::isStore
bool isStore() const
Is the node a store.
Definition: trace_cpu.hh:648
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSplitReqs
Stats::Scalar numSplitReqs
Definition: trace_cpu.hh:1060
TraceCPU::totalInsts
Counter totalInsts() const
This is a pure virtual function in BaseCPU.
Definition: trace_cpu.hh:156
TraceCPU::ElasticDataGen::readNextWindow
bool readNextWindow()
Reads a line of the trace file.
Definition: trace_cpu.cc:285
RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:74
TraceCPU::enableEarlyExit
const bool enableEarlyExit
Exit when any one Trace CPU completes its execution.
Definition: trace_cpu.hh:1128
TraceCPU::ElasticDataGen::depGraph
std::unordered_map< NodeSeqNum, GraphNode * > depGraph
Store the depGraph of GraphNodes.
Definition: trace_cpu.hh:1032
TraceCPU::icacheNextEvent
EventFunctionWrapper icacheNextEvent
Event for the control flow method schedIcacheNext()
Definition: trace_cpu.hh:1090
TraceCPU::schedDcacheNextEvent
void schedDcacheNextEvent(Tick when)
Schedule event dcacheNextEvent at the given tick.
Definition: trace_cpu.cc:1123
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
TraceCPU::ElasticDataGen::GraphNode::isComp
bool isComp() const
Is the node a compute (non load/store) node.
Definition: trace_cpu.hh:651
TraceCPU::ElasticDataGen::InputStream::InputStream
InputStream(const std::string &filename, const double time_multiplier)
Create a trace input stream for a given file name.
Definition: trace_cpu.cc:1180
BaseCPU::params
const Params * params() const
Definition: base.hh:296
Port::name
const std::string name() const
Return port name (for DPRINTF).
Definition: port.hh:106
TraceCPU::ElasticDataGen::HardwareResource::releaseStoreBuffer
void releaseStoreBuffer()
Release store buffer entry for a completed store.
Definition: trace_cpu.cc:892
TraceCPU::ElasticDataGen::InputStream
The InputStream encapsulates a trace file and the internal buffers and populates GraphNodes based on ...
Definition: trace_cpu.hh:793
TraceCPU::IcachePort::IcachePort
IcachePort(TraceCPU *_cpu)
Default constructor.
Definition: trace_cpu.hh:228
TraceCPU::FixedRetryGen::TraceElement::clear
void clear()
Make this element invalid.
Definition: trace_cpu.hh:379
TraceCPU::ElasticDataGen::GraphNode::type
RecordType type
Type of the node corresponding to the instruction modelled by it.
Definition: trace_cpu.hh:602
TraceCPU::FixedRetryGen::trace
InputStream trace
Input stream used for reading the input trace file.
Definition: trace_cpu.hh:509
TraceCPU::ElasticDataGen::Record
ProtoMessage::InstDepRecord Record
Definition: trace_cpu.hh:571
TraceCPU::ElasticDataGen::HardwareResource::oldestInFlightRobNum
NodeRobNum oldestInFlightRobNum
The ROB number of the oldest in-flight node.
Definition: trace_cpu.hh:779
TraceCPU::dcachePort
DcachePort dcachePort
Port to connect to L1 data cache.
Definition: trace_cpu.hh:322
TraceCPU::ElasticDataGen::GraphNode::numRegDep
uint8_t numRegDep
Number of register dependencies.
Definition: trace_cpu.hh:635
TraceCPU::ElasticDataGen::HardwareResource::numInFlightLoads
uint16_t numInFlightLoads
Number of ready loads for which request may or may not be sent.
Definition: trace_cpu.hh:782
TraceCPU::ElasticDataGen::GraphNode::RegDepArray
std::array< NodeSeqNum, TheISA::MaxInstSrcRegs > RegDepArray
Typedef for the array containing the register dependencies.
Definition: trace_cpu.hh:593
BaseCPU
Definition: cpu_dummy.hh:43
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numRetrySucceeded
Stats::Scalar numRetrySucceeded
Definition: trace_cpu.hh:1059
TraceCPU::ElasticDataGen::InputStream::microOpCount
uint64_t microOpCount
Count of committed ops read from trace plus the filtered ops.
Definition: trace_cpu.hh:810
TraceCPU::ElasticDataGen::InputStream::read
bool read(GraphNode *element)
Attempt to read a trace element from the stream, and also notify the caller if the end of the file wa...
Definition: trace_cpu.cc:1210
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSOLoads
Stats::Scalar numSOLoads
Definition: trace_cpu.hh:1061
TraceCPU::FixedRetryGen::send
bool send(Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags, Addr pc)
Creates a new request assigning the request parameters passed by the arguments.
Definition: trace_cpu.cc:1071
TraceCPU::ElasticDataGen::GraphNode::size
uint32_t size
Size of request if any.
Definition: trace_cpu.hh:611
TraceCPU::ElasticDataGen::ReadyNode::seqNum
NodeSeqNum seqNum
The sequence number of the ready node.
Definition: trace_cpu.hh:686
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::dataLastTick
Stats::Scalar dataLastTick
Tick when ElasticDataGen completes execution.
Definition: trace_cpu.hh:1064
TraceCPU::dcacheRecvTimingResp
void dcacheRecvTimingResp(PacketPtr pkt)
When data cache port receives a response, this calls the dcache generator method handle to complete t...
Definition: trace_cpu.cc:1155
TraceCPU::FixedRetryGen::InputStream::reset
void reset()
Reset the stream such that it can be played once again.
Definition: trace_cpu.cc:1406
base.hh
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::ElasticDataGenStatGroup
ElasticDataGenStatGroup(Stats::Group *parent, const std::string &_name)
name is the extension to the name for these stats
Definition: trace_cpu.cc:225
TraceCPU::ElasticDataGen::GraphNode::numRobDep
uint8_t numRobDep
Number of order dependencies.
Definition: trace_cpu.hh:623
TraceCPU::ElasticDataGen::HardwareResource::release
void release(const GraphNode *done_node)
Release appropriate structures for a completed node.
Definition: trace_cpu.cc:851
TraceCPU::FixedRetryGen::name
const std::string & name() const
Returns name of the FixedRetryGen instance.
Definition: trace_cpu.hh:456
TraceCPU::ElasticDataGen::exit
void exit()
Exit the ElasticDataGen.
Definition: trace_cpu.cc:279
TraceCPU::ElasticDataGen::executeMemReq
PacketPtr executeMemReq(GraphNode *node_ptr)
Creates a new request for a load or store assigning the request parameters.
Definition: trace_cpu.cc:563
TraceCPU::FixedRetryGen::fixedStats
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup fixedStats
TraceCPU::ElasticDataGen::HardwareResource::occupy
void occupy(const GraphNode *new_node)
Occupy appropriate structures for an issued node.
Definition: trace_cpu.cc:832
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::maxReadyListSize
Stats::Scalar maxReadyListSize
Definition: trace_cpu.hh:1055
Stats::Formula
A formula for statistics that is calculated when printed.
Definition: statistics.hh:3037
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
TraceCPU::ElasticDataGen::ElasticDataGen
ElasticDataGen(TraceCPU &_owner, const std::string &_name, RequestPort &_port, RequestorID requestor_id, const std::string &trace_file, TraceCPUParams *params)
Definition: trace_cpu.hh:854
Stats::Group
Statistics container.
Definition: group.hh:83
TraceCPU::ElasticDataGen::depFreeQueue
std::queue< const GraphNode * > depFreeQueue
Queue of dependency-free nodes that are pending issue because resources are not available.
Definition: trace_cpu.hh:1041
TraceCPU::TraceStats::numOps
Stats::Scalar numOps
Stat for number of simulated micro-ops.
Definition: trace_cpu.hh:1149
addr
ip6_addr_t addr
Definition: inet.hh:423
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::numSendAttempted
Stats::Scalar numSendAttempted
Definition: trace_cpu.hh:1056
TraceCPU::FixedRetryGen::TraceElement::isValid
bool isValid() const
Check validity of this element.
Definition: trace_cpu.hh:372
CountedExitEvent
Definition: sim_events.hh:101
TraceCPU::dataTraceFile
std::string dataTraceFile
Definition: trace_cpu.hh:331
TraceCPU::ElasticDataGen::NodeSeqNum
uint64_t NodeSeqNum
Node sequence number type.
Definition: trace_cpu.hh:565
TraceCPU::numTraceCPUs
static int numTraceCPUs
Number of Trace CPUs in the system used as a shared variable and passed to the CountedExitEvent event...
Definition: trace_cpu.hh:1115
TraceCPU::ElasticDataGen::GraphNode::isLoad
bool isLoad() const
Is the node a load.
Definition: trace_cpu.hh:645
TraceCPU::ElasticDataGen::retryPkt
PacketPtr retryPkt
PacketPtr used to store the packet to retry.
Definition: trace_cpu.hh:1003
TraceCPU::TraceStats
Definition: trace_cpu.hh:1142
TraceCPU::ElasticDataGen::GraphNode::virtAddr
Addr virtAddr
The virtual address for the request if any.
Definition: trace_cpu.hh:608
TraceCPU::ElasticDataGen::GraphNode::maxRobDep
static const uint8_t maxRobDep
The maximum no.
Definition: trace_cpu.hh:587
TraceCPU::DcachePort::recvTimingSnoopReq
void recvTimingSnoopReq(PacketPtr pkt)
Required functionally but do nothing.
Definition: trace_cpu.hh:290
TraceCPU::ElasticDataGen::ElasticDataGenStatGroup::maxDependents
Stats::Scalar maxDependents
Stats for data memory accesses replayed.
Definition: trace_cpu.hh:1054
TraceCPU::ElasticDataGen::HardwareResource::sizeStoreBuffer
const uint16_t sizeStoreBuffer
The size of store buffer.
Definition: trace_cpu.hh:758
TraceCPU::ElasticDataGen::name
const std::string & name() const
Returns name of the ElasticDataGen instance.
Definition: trace_cpu.hh:891
TraceCPU::ElasticDataGen::traceComplete
bool traceComplete
Set to true when end of trace is reached.
Definition: trace_cpu.hh:1006
Flags::isSet
bool isSet() const
Definition: flags.hh:79
TraceCPU::ElasticDataGen::checkAndIssue
bool checkAndIssue(const GraphNode *node_ptr, bool first=true)
Attempts to issue a node once the node's source dependencies are complete.
Definition: trace_cpu.cc:640
TraceCPU::FixedRetryGen::tryNext
bool tryNext()
This tries to send current or retry packet and returns true if successfull.
Definition: trace_cpu.cc:985
TraceCPU::ElasticDataGen::windowSize
const uint32_t windowSize
Window size within which to check for dependencies.
Definition: trace_cpu.hh:1023
TraceCPU::dcacheNextEvent
EventFunctionWrapper dcacheNextEvent
Event for the control flow method schedDcacheNext()
Definition: trace_cpu.hh:1093
std::list
STL list class.
Definition: stl.hh:51
TraceCPU::IcachePort::owner
TraceCPU * owner
Definition: trace_cpu.hh:258
TraceCPU::totalOps
Counter totalOps() const
Return totalOps as the number of committed micro-ops plus the speculatively issued loads that are mod...
Definition: trace_cpu.hh:167
TraceCPU::ElasticDataGen::GraphNode::robDep
RobDepArray robDep
Array of order dependencies.
Definition: trace_cpu.hh:620
TraceCPU::FixedRetryGen::TraceElement::addr
Addr addr
The address for the request.
Definition: trace_cpu.hh:353
TraceCPU::FixedRetryGen::InputStream::trace
ProtoInputStream trace
Definition: trace_cpu.hh:395
TraceCPU::ElasticDataGen::nextRead
bool nextRead
Set to true when the next window of instructions need to be read.
Definition: trace_cpu.hh:1009
TraceCPU::FixedRetryGen::FixedRetryGenStatGroup::numSendFailed
Stats::Scalar numSendFailed
Definition: trace_cpu.hh:540
TraceCPU::IcachePort::recvReqRetry
void recvReqRetry()
Handle a retry signalled by the cache if instruction read failed in the first attempt.
Definition: trace_cpu.cc:1149
TraceCPU::FixedRetryGen::requestorId
const RequestorID requestorId
RequestorID used for the requests being sent.
Definition: trace_cpu.hh:506
TraceCPU::getDataPort
Port & getDataPort()
Used to get a reference to the dcache port.
Definition: trace_cpu.hh:1161
TraceCPU::ElasticDataGen::HardwareResource::printOccupancy
void printOccupancy()
Print resource occupancy for debugging.
Definition: trace_cpu.cc:949
TraceCPU::icacheRetryRecvd
void icacheRetryRecvd()
When instruction cache port receives a retry, schedule event icacheNextEvent.
Definition: trace_cpu.cc:1103
TraceCPU::FixedRetryGen::retryPkt
PacketPtr retryPkt
PacketPtr used to store the packet to retry.
Definition: trace_cpu.hh:515
TraceCPU::updateNumOps
void updateNumOps(uint64_t rob_num)
Definition: trace_cpu.cc:92
TraceCPU::TraceStats::cpi
Stats::Formula cpi
Stat for the CPI.
Definition: trace_cpu.hh:1152
TraceCPU::ElasticDataGen::InputStream::windowSize
uint32_t windowSize
The window size that is read from the header of the protobuf trace and used to process the dependency...
Definition: trace_cpu.hh:816
ProtoInputStream
A ProtoInputStream wraps a coded stream, potentially with decompression, based on looking at the file...
Definition: protoio.hh:140
TraceCPU::FixedRetryGen::TraceElement::blocksize
Addr blocksize
The size of the access for the request.
Definition: trace_cpu.hh:356
TraceCPU::dcacheGen
ElasticDataGen dcacheGen
Instance of ElasticDataGen to replay data read and write requests.
Definition: trace_cpu.hh:1072
TraceCPU::traceOffset
Tick traceOffset
This stores the time offset in the trace, which is taken away from the ready times of requests.
Definition: trace_cpu.hh:1107
TraceCPU::ElasticDataGen::getMicroOpCount
uint64_t getMicroOpCount() const
Get number of micro-ops modelled in the TraceCPU replay.
Definition: trace_cpu.hh:982
TraceCPU::instRequestorID
const RequestorID instRequestorID
Requestor id for instruction read requests.
Definition: trace_cpu.hh:325
TraceCPU::ElasticDataGen::ReadyNode::execTick
Tick execTick
The tick at which the ready node must be executed.
Definition: trace_cpu.hh:689
TraceCPU::FixedRetryGen::delta
int64_t delta
Stores the difference in the send ticks of the current and last packets.
Definition: trace_cpu.hh:522
TraceCPU::ElasticDataGen::GraphNode::regDep
RegDepArray regDep
Array of register dependencies (incoming) if any.
Definition: trace_cpu.hh:632
TraceCPU::instTraceFile
std::string instTraceFile
File names for input instruction and data traces.
Definition: trace_cpu.hh:331
TraceCPU
The trace cpu replays traces generated using the elastic trace probe attached to the O3 CPU model.
Definition: trace_cpu.hh:140
TraceCPU::ElasticDataGen::GraphNode::writeElementAsTrace
void writeElementAsTrace() const
Write out element in trace-compatible format using debug flag TraceCPUData.
Definition: trace_cpu.cc:1352
ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:153
TraceCPU::dataRequestorID
const RequestorID dataRequestorID
Requestor id for data read and write requests.
Definition: trace_cpu.hh:328
TraceCPU::ElasticDataGen::isExecComplete
bool isExecComplete() const
Returns the execComplete variable which is set when the last node is executed.
Definition: trace_cpu.hh:967

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