Data TLB Invalidate by VA. More...

#include <tlbi_op.hh>

Inheritance diagram for gem5::ArmISA::DTLBIMVA:

Public Member Functions
	DTLBIMVA (TranslationRegime _target_regime, SecurityState _ss, Addr _addr, uint16_t _asid)

void	operator() (ThreadContext *tc) override

bool	matchEntry (TlbEntry *entry, vmid_t curr_vmid) const override

Public Member Functions inherited from gem5::ArmISA::TLBIMVA
	TLBIMVA (TranslationRegime _target_regime, SecurityState _ss, Addr _addr, uint16_t _asid, bool last_level, Attr _attr=Attr::None)

void	operator() (ThreadContext *tc) override

bool	matchEntry (TlbEntry *entry, vmid_t curr_vmid) const override

Public Member Functions inherited from gem5::ArmISA::TLBIOp
	TLBIOp (TranslationRegime _target_regime, SecurityState _ss, Attr _attr)

virtual	~TLBIOp ()

void	broadcast (ThreadContext *tc)
	Broadcast the TLB Invalidate operation to all TLBs in the Arm system.

bool	match (TlbEntry *entry, vmid_t curr_vmid) const

virtual bool	stage1Flush () const
	Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class.

virtual bool	stage2Flush () const
	Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class.

Additional Inherited Members
Public Types inherited from gem5::ArmISA::TLBIOp
enum class	Attr { None , ExcludeXS }

Public Attributes inherited from gem5::ArmISA::TLBIMVA
Addr	addr

uint16_t	asid

bool	lastLevel

Public Attributes inherited from gem5::ArmISA::TLBIOp
SecurityState	ss

TranslationRegime	targetRegime

Attr	attr

Protected Member Functions inherited from gem5::ArmISA::TLBIMVA
TlbEntry::KeyType	lookupGen (vmid_t vmid) const