bac.hh

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#ifndef __CPU_O3_BAC_HH__
#define __CPU_O3_BAC_HH__
 
#include <list>
 
#include "base/statistics.hh"
#include "cpu/o3/comm.hh"
#include "cpu/o3/dyn_inst_ptr.hh"
#include "cpu/o3/limits.hh"
#include "cpu/pred/bpred_unit.hh"
#include "cpu/pred/branch_type.hh"
#include "cpu/timebuf.hh"
 
namespace gem5
{
 
struct BaseO3CPUParams;
 
namespace o3
{
 
class CPU;
class FTQ;
class FetchTarget;
typedef std::shared_ptr<FetchTarget> FetchTargetPtr;
 
/********************************************************************
 * BAC: Branch and Address Calculation
 *
 * The BAC stage handles branch prediction and next PC address
 * calculation and mainly consists of two parts:
 *
 * (1) The branch prediction part that manages the branch predictor.
 *     It checks the backward communication signals from the pipleline
 *     to update the branch predictor accordingly.
 *     This part can be decoupled from the fetch stage and used to
 *     feed the FTQ with fetch targets which will be consumed by the
 *     fetch stage.
 *     When decoupling is enabled this part is active and acts as
 *     a separate pipeline stage. Otherwise the stage remains idle and
 *     everything is in sync with the fetch stage. The branch prediction
 *     itself is then triggered from the PC calculation part.
 *
 * (2) The PC calculation part that is tightly coupled to the
 *     fetch stage. Fetch calls the updatePC() method after each
 *     predecoded instruction to advance the PC to the next instruction.
 *
 * Note that this organization means that the BAC stage spans
 * two pipeline stages and the second part is in the same stage as
 * the fetch stage which is not the nicest organization. However,
 * it allows to keep the fetch stage simple and most of the decoupling
 * in the BAC stage.
 */
class BAC
{
    typedef branch_prediction::BranchType BranchType;
 
  public:
    enum BACStatus
    {
        Active,
        Inactive
    };

    enum ThreadStatus
    {
        Idle,
        Running,
        Squashing,
        Blocked,
        FTQFull,
        FTQLocked,
        ThreadStatusMax
    };
 
  private:
    BACStatus _status;

    ThreadStatus bacStatus[MaxThreads];
 
  public:
    BAC(CPU *_cpu, const BaseO3CPUParams &params);
 
    // Interfaces to CPU ----------------------------------
    // These functions are to manage the BAC stage
    // and the interface with the remaining CPU.

    std::string name() const;

    void
    regProbePoints()
    {}

    void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);

    void setActiveThreads(std::list<ThreadID> *at_ptr);

    void setFetchTargetQueue(FTQ *_ptr);

    void startupStage();

    void clearStates(ThreadID tid);

    void drainResume();

    void drainSanityCheck() const;

    bool isDrained() const;

    void drainStall(ThreadID tid);

    void
    takeOverFrom()
    {
        resetStage();
    }
 
    void deactivateThread(ThreadID tid) {};

    void tick();
 
  private:
    void resetStage();

    void switchToActive();

    void switchToInactive();

    bool checkStall(ThreadID tid) const;

    void updateBACStatus();

    bool checkSignalsAndUpdate(ThreadID tid);

    bool checkAndUpdateBPUSignals(ThreadID tid);
 
  private:
    /* ----------------------------------------------------------------
     * Decoupled Frontend Functionality
     *
     * In a decoupled frontend the Branch predictor unit (BPU)
     * is not directly queried by Fetch once it pre-decodes
     * a branch. Instead BPU and Fetch is separated and
     * connected via a queue fetch target queue (FTQ). The BPU generates
     * fetch targets, similar to basic blocks (BB) and inserts them in
     * the queue. Fetch will consume the addresses and read them from the
     * I-cache.
     * The advantages are that it (1) cuts the critical path and (2)
     * allow a precise, BPU guided prefetching of the fetch targets.
     *
     * For determining next PC addresses the BPU relies solely on the BTB.
     *
     * The following functions are only used in the decoupled scenario.
     */

    FetchTargetPtr newFetchTarget(ThreadID tid, const PCStateBase &start_pc);

    bool predict(ThreadID tid, const StaticInstPtr &inst,
                 const FetchTargetPtr &ft, PCStateBase &pc);

    void generateFetchTargets(ThreadID tid, bool &status_change);
 
    /* ----------------------------------------------------------------
     * Next PC address calculation
     *
     * To update the PC the fetch stage will call the updatePC() method
     * with the currently pre-decoded instruction.
     * The BAC stage will then check if the instruction is a branch and
     * either perform the branch prediction (non-decoupled scenario) or
     * read the branch prediction from the currently processed fetch
     * target (decoupled scenario).
     */
  public:
    bool updatePC(const DynInstPtr &inst, PCStateBase &fetch_pc,
                  FetchTargetPtr &ft);
 
  private:
    bool updatePreDecode(ThreadID tid, const InstSeqNum seqNum,
                         const StaticInstPtr &inst, PCStateBase &pc,
                         const FetchTargetPtr &ft);
 
  private:
    void squash(const PCStateBase &new_pc, ThreadID tid);

    void squashBpuHistories(ThreadID tid);
 
  private:
    CPU *cpu;

    branch_prediction::BPredUnit *bpu;

    FTQ *ftq;

    TimeBuffer<TimeStruct> *timeBuffer;

    TimeBuffer<TimeStruct>::wire fromFetch;

    TimeBuffer<TimeStruct>::wire fromDecode;

    TimeBuffer<TimeStruct>::wire fromCommit;

    TimeBuffer<FetchStruct>::wire toFetch;

    std::unique_ptr<PCStateBase> bacPC[MaxThreads];

    bool wroteToTimeBuffer;

    struct Stalls
    {
        bool fetch;
        bool drain;
        bool bpu;
    };

    Stalls stalls[MaxThreads];

    const bool decoupledFrontEnd;

    const Cycles fetchToBacDelay;

    const Cycles decodeToFetchDelay;

    const Cycles commitToFetchDelay;

    const Cycles bacToFetchDelay;

    const unsigned int cacheBlkSize;

    const unsigned fetchTargetWidth;

    const unsigned minInstSize;

    std::list<ThreadID> *activeThreads;

    const ThreadID numThreads;
 
    /* Max number of FT added to the FTQ per Cycle */
    const unsigned maxFTPerCycle;
 
    /* Max number taken prediction by the BPU per Cycle*/
    const unsigned maxTakenPredPerCycle;

    inline Addr
    alignToCacheBlock(Addr addr)
    {
        return (addr & ~(cacheBlkSize - 1));
    }
 
  protected:
    struct BACStats : public statistics::Group
    {
        static std::string statusStrings[ThreadStatusMax];
 
        BACStats(CPU *cpu, BAC *bac);

        statistics::Vector status;

        statistics::Scalar fetchTargets;
        statistics::Scalar branches;
        statistics::Scalar predTakenBranches;
        statistics::Scalar branchesNotLastuOp;

        statistics::Scalar branchMisspredict;
        statistics::Scalar noBranchMisspredict;

        statistics::Scalar squashBranchDecode;
        statistics::Scalar squashBranchCommit;

        statistics::Vector preDecUpdate;
        statistics::Vector noHistByType;

        statistics::Scalar typeMissmatch;
        statistics::Scalar multiBranchInst;

        statistics::Distribution ftSizeDist;
        statistics::Distribution ftNumber;
 
    } stats;

};
 
} // namespace o3
} // namespace gem5
 
#endif // __CPU_O3_BAC_HH__