Class that implements the actual LQ and SQ for each specific thread. More...

#include <lsq_unit.hh>

Classes
class	LSQEntry

struct	LSQUnitStats

class	SQEntry

class	WritebackEvent
	Writeback event, specifically for when stores forward data to loads. More...

Public Types
using	LSQRequest = LSQ::LSQRequest

using	LoadQueue = CircularQueue<LQEntry>

using	StoreQueue = CircularQueue<SQEntry>

typedef CircularQueue< LQEntry >::iterator	LQIterator

typedef CircularQueue< SQEntry >::iterator	SQIterator

Public Member Functions
	LSQUnit (uint32_t lqEntries, uint32_t sqEntries)
	Constructs an LSQ unit.

	LSQUnit (const LSQUnit &l)
	We cannot copy LSQUnit because it has stats for which copy contructor is deleted explicitly.

void	init (CPU cpu_ptr, IEW iew_ptr, const BaseO3CPUParams &params, LSQ *lsq_ptr, unsigned id)
	Initializes the LSQ unit with the specified number of entries.

std::string	name () const
	Returns the name of the LSQ unit.

void	setDcachePort (RequestPort *dcache_port)
	Sets the pointer to the dcache port.

void	drainSanityCheck () const
	Perform sanity checks after a drain.

void	takeOverFrom ()
	Takes over from another CPU's thread.

void	insert (const DynInstPtr &inst)
	Inserts an instruction.

void	insertLoad (const DynInstPtr &load_inst)
	Inserts a load instruction.

void	insertStore (const DynInstPtr &store_inst)
	Inserts a store instruction.

Fault	checkViolations (typename LoadQueue::iterator &loadIt, const DynInstPtr &inst)
	Check for ordering violations in the LSQ.

void	checkSnoop (PacketPtr pkt)
	Check if an incoming invalidate hits in the lsq on a load that might have issued out of order wrt another load beacuse of the intermediate invalidate.

Fault	executeLoad (const DynInstPtr &inst)
	Executes a load instruction.

Fault	executeLoad (int lq_idx)

Fault	executeStore (const DynInstPtr &inst)
	Executes a store instruction.

void	commitLoad ()
	Commits the head load.

void	commitLoads (InstSeqNum &youngest_inst)
	Commits loads older than a specific sequence number.

void	commitStores (InstSeqNum &youngest_inst)
	Commits stores older than a specific sequence number.

void	writebackStores ()
	Writes back stores.

void	completeDataAccess (PacketPtr pkt)
	Completes the data access that has been returned from the memory system.

void	squash (const InstSeqNum &squashed_num)
	Squashes all instructions younger than a specific sequence number.

bool	violation ()
	Returns if there is a memory ordering violation.

DynInstPtr	getMemDepViolator ()
	Returns the memory ordering violator.

unsigned	numFreeLoadEntries ()
	Returns the number of free LQ entries.

unsigned	numFreeStoreEntries ()
	Returns the number of free SQ entries.

int	numLoads ()
	Returns the number of loads in the LQ.

int	numStores ()
	Returns the number of stores in the SQ.

int	numHtmStarts () const

int	numHtmStops () const

void	resetHtmStartsStops ()

uint64_t	getLatestHtmUid () const

void	setLastRetiredHtmUid (uint64_t htm_uid)

void	startStaleTranslationFlush ()

bool	checkStaleTranslations () const

bool	isFull ()
	Returns if either the LQ or SQ is full.

bool	isEmpty () const
	Returns if both the LQ and SQ are empty.

bool	lqFull ()
	Returns if the LQ is full.

bool	sqFull ()
	Returns if the SQ is full.

bool	lqEmpty () const
	Returns if the LQ is empty.

bool	sqEmpty () const
	Returns if the SQ is empty.

unsigned	getCount ()
	Returns the number of instructions in the LSQ.

bool	hasStoresToWB ()
	Returns if there are any stores to writeback.

int	numStoresToWB ()
	Returns the number of stores to writeback.

bool	willWB ()
	Returns if the LSQ unit will writeback on this cycle.

void	recvRetry ()
	Handles doing the retry.

unsigned int	cacheLineSize ()

bool	trySendPacket (bool isLoad, PacketPtr data_pkt)
	Attempts to send a packet to the cache.

void	dumpInsts () const
	Debugging function to dump instructions in the LSQ.

void	schedule (Event &ev, Tick when)
	Schedule event for the cpu.

BaseMMU *	getMMUPtr ()

bool	recvTimingResp (PacketPtr pkt)
	Handles writing back and completing the load or store that has returned from memory.

Fault	read (LSQRequest *request, ssize_t load_idx)
	Executes the load at the given index.

Fault	write (LSQRequest requst, uint8_t data, ssize_t store_idx)
	Executes the store at the given index.

int	getLoadHead ()
	Returns the index of the head load instruction.

InstSeqNum	getLoadHeadSeqNum ()
	Returns the sequence number of the head load instruction.

int	getStoreHead ()
	Returns the index of the head store instruction.

InstSeqNum	getStoreHeadSeqNum ()
	Returns the sequence number of the head store instruction.

bool	isStalled ()
	Returns whether or not the LSQ unit is stalled.

Public Attributes
StoreQueue	storeQueue
	The store queue.

LoadQueue	loadQueue
	The load queue.

Static Public Attributes
static constexpr auto	MaxDataBytes = MaxVecRegLenInBytes

Protected Attributes
gem5::o3::LSQUnit::LSQUnitStats	stats

Private Types
enum class	AddrRangeCoverage { PartialAddrRangeCoverage , FullAddrRangeCoverage , NoAddrRangeCoverage }
	Coverage of one address range with another. More...

using	LQEntry = LSQEntry

Private Member Functions
void	resetState ()
	Reset the LSQ state.

void	writeback (const DynInstPtr &inst, PacketPtr pkt)
	Writes back the instruction, sending it to IEW.

void	writebackBlockedStore ()
	Try to finish a previously blocked write back attempt.

void	completeStore (typename StoreQueue::iterator store_idx)
	Completes the store at the specified index.

void	storePostSend ()
	Handles completing the send of a store to memory.

Private Attributes
CPU *	cpu
	Pointer to the CPU.

IEW *	iewStage
	Pointer to the IEW stage.

LSQ *	lsq
	Pointer to the LSQ.

RequestPort *	dcachePort
	Pointer to the dcache port.

ThreadID	lsqID
	The LSQUnit thread id.

unsigned	depCheckShift
	The number of places to shift addresses in the LSQ before checking for dependency violations.

bool	checkLoads
	Should loads be checked for dependency issues.

int	storesToWB
	The number of store instructions in the SQ waiting to writeback.

int	htmStarts

int	htmStops

uint64_t	lastRetiredHtmUid

StoreQueue::iterator	storeWBIt
	The index of the first instruction that may be ready to be written back, and has not yet been written back.

Addr	cacheBlockMask
	Address Mask for a cache block (e.g.

TimeBuffer< IssueStruct >::wire	fromIssue
	Wire to read information from the issue stage time queue.

bool	stalled
	Whether or not the LSQ is stalled.

InstSeqNum	stallingStoreIsn
	The store that causes the stall due to partial store to load forwarding.

ssize_t	stallingLoadIdx
	The index of the above store.

PacketPtr	retryPkt
	The packet that needs to be retried.

bool	isStoreBlocked
	Whehter or not a store is blocked due to the memory system.

bool	storeInFlight
	Whether or not a store is in flight.

DynInstPtr	memDepViolator
	The oldest load that caused a memory ordering violation.

bool	needsTSO
	Flag for memory model.

Detailed Description

Class that implements the actual LQ and SQ for each specific thread.

Both are circular queues; load entries are freed upon committing, while store entries are freed once they writeback. The LSQUnit tracks if there are memory ordering violations, and also detects partial load to store forwarding cases (a store only has part of a load's data) that requires the load to wait until the store writes back. In the former case it holds onto the instruction until the dependence unit looks at it, and in the latter it stalls the LSQ until the store writes back. At that point the load is replayed.

Definition at line 88 of file lsq_unit.hh.

Member Typedef Documentation

◆ LoadQueue

using gem5::o3::LSQUnit::LoadQueue = CircularQueue<LQEntry>

Definition at line 208 of file lsq_unit.hh.

◆ LQEntry

using gem5::o3::LSQUnit::LQEntry = LSQEntry

private

Definition at line 197 of file lsq_unit.hh.

◆ LQIterator

typedef CircularQueue<LQEntry>::iterator gem5::o3::LSQUnit::LQIterator

Definition at line 567 of file lsq_unit.hh.

◆ LSQRequest

using gem5::o3::LSQUnit::LSQRequest = LSQ::LSQRequest

Definition at line 93 of file lsq_unit.hh.

◆ SQIterator

typedef CircularQueue<SQEntry>::iterator gem5::o3::LSQUnit::SQIterator

Definition at line 568 of file lsq_unit.hh.

◆ StoreQueue

using gem5::o3::LSQUnit::StoreQueue = CircularQueue<SQEntry>

Definition at line 209 of file lsq_unit.hh.

Member Enumeration Documentation

◆ AddrRangeCoverage

enum class gem5::o3::LSQUnit::AddrRangeCoverage

strongprivate

Coverage of one address range with another.

Enumerator
PartialAddrRangeCoverage
FullAddrRangeCoverage
NoAddrRangeCoverage

Definition at line 200 of file lsq_unit.hh.

Constructor & Destructor Documentation

◆ LSQUnit() [1/2]

gem5::o3::LSQUnit::LSQUnit	(	uint32_t	lqEntries,
		uint32_t	sqEntries )

Constructs an LSQ unit.

init() must be called prior to use.

Definition at line 192 of file lsq_unit.cc.

References cacheBlockMask, htmStarts, htmStops, isStoreBlocked, lastRetiredHtmUid, loadQueue, lsqID, stalled, stats, storeInFlight, storeQueue, and storesToWB.

Referenced by checkSnoop(), checkStaleTranslations(), checkViolations(), commitLoad(), commitStores(), completeStore(), executeLoad(), executeStore(), init(), insertLoad(), insertStore(), LSQUnit(), numFreeLoadEntries(), numFreeStoreEntries(), read(), recvRetry(), squash(), startStaleTranslationFlush(), storePostSend(), trySendPacket(), write(), writeback(), gem5::o3::LSQUnit::WritebackEvent::WritebackEvent(), and writebackStores().

◆ LSQUnit() [2/2]

gem5::o3::LSQUnit::LSQUnit ( const LSQUnit & l )

inline

We cannot copy LSQUnit because it has stats for which copy contructor is deleted explicitly.

However, STL vector requires a valid copy constructor for the base type at compile time.

Definition at line 219 of file lsq_unit.hh.

References gem5::MipsISA::l, LSQUnit(), panic, and stats.

Member Function Documentation

◆ cacheLineSize()

unsigned int gem5::o3::LSQUnit::cacheLineSize ( )

Definition at line 1320 of file lsq_unit.cc.

References cpu.

◆ checkSnoop()

void gem5::o3::LSQUnit::checkSnoop ( PacketPtr pkt )

Check if an incoming invalidate hits in the lsq on a load that might have issued out of order wrt another load beacuse of the intermediate invalidate.

Definition at line 431 of file lsq_unit.cc.

References cacheBlockMask, cpu, DPRINTF, gem5::RefCountingPtr< T >::get(), gem5::Packet::getAddr(), gem5::ThreadContext::getIsaPtr(), gem5::BaseISA::handleLockedSnoop(), gem5::o3::LSQ::LSQRequest::isCacheBlockHit(), gem5::Packet::isInvalidate(), gem5::Request::LLSC, loadQueue, LSQUnit(), needsTSO, gem5::o3::LSQ::LSQRequest::setStateToFault(), and gem5::RiscvISA::x.

◆ checkStaleTranslations()

bool gem5::o3::LSQUnit::checkStaleTranslations ( ) const

Definition at line 1265 of file lsq_unit.cc.

References DPRINTF, loadQueue, LSQUnit(), and storeQueue.

◆ checkViolations()

Fault gem5::o3::LSQUnit::checkViolations	(	typename LoadQueue::iterator &	loadIt,
		const DynInstPtr &	inst )

Check for ordering violations in the LSQ.

For a store squash if we ever find a conflicting load. For a load, only squash if we an external snoop invalidate has been seen for that load address

Parameters

load_idx	index to start checking at
inst	the instruction to check

Todo: in theory you only need to check an instruction that has executed however, there isn't a good way in the pipeline at the moment to check all instructions that will execute before the store writes back. Thus, like the implementation that came before it, we're overly conservative.

Definition at line 514 of file lsq_unit.cc.

References depCheckShift, DPRINTF, loadQueue, LSQUnit(), memDepViolator, gem5::NoFault, and stats.

Referenced by executeLoad(), and executeStore().

◆ commitLoad()

void gem5::o3::LSQUnit::commitLoad ( )

Commits the head load.

Definition at line 728 of file lsq_unit.cc.

References cpu, DPRINTF, loadQueue, LSQUnit(), and stats.

Referenced by commitLoads().

◆ commitLoads()

void gem5::o3::LSQUnit::commitLoads ( InstSeqNum & youngest_inst )

Commits loads older than a specific sequence number.

Definition at line 751 of file lsq_unit.cc.

References commitLoad(), and loadQueue.

◆ commitStores()

void gem5::o3::LSQUnit::commitStores ( InstSeqNum & youngest_inst )

Commits stores older than a specific sequence number.

Definition at line 762 of file lsq_unit.cc.

References DPRINTF, LSQUnit(), storeQueue, storesToWB, and gem5::RiscvISA::x.

◆ completeDataAccess()

void gem5::o3::LSQUnit::completeDataAccess ( PacketPtr pkt )

Completes the data access that has been returned from the memory system.

Definition at line 105 of file lsq_unit.cc.

References completeStore(), cpu, DPRINTF, gem5::FAIL_OTHER, gem5::FAIL_REMOTE, gem5::FAIL_SELF, gem5::Packet::getAddr(), gem5::Packet::getHtmTransactionFailedInCacheRC(), gem5::Packet::getHtmTransactionUid(), gem5::htmFailureToStr(), gem5::Packet::htmTransactionFailedInCache(), gem5::o3::LSQ::LSQRequest::instruction(), gem5::INVALID, gem5::Packet::isHtmTransactional(), gem5::Packet::isWrite(), gem5::o3::LSQ::LSQRequest::mainPacket(), gem5::MEMORY, gem5::o3::LSQ::LSQRequest::needWBToRegister(), gem5::OTHER, panic, gem5::Packet::senderState, gem5::Packet::setHtmTransactionFailedInCache(), gem5::SIZE, gem5::ArmISA::writeback, and gem5::o3::LSQ::LSQRequest::writebackDone().

◆ completeStore()

void gem5::o3::LSQUnit::completeStore ( typename StoreQueue::iterator store_idx )

private

Completes the store at the specified index.

Definition at line 1145 of file lsq_unit.cc.

References cpu, gem5::curTick(), DPRINTF, iewStage, isStalled(), loadQueue, LSQUnit(), needsTSO, stalled, stallingLoadIdx, stallingStoreIsn, storeInFlight, storeQueue, and storesToWB.

Referenced by completeDataAccess(), and writebackStores().

◆ drainSanityCheck()

void gem5::o3::LSQUnit::drainSanityCheck ( ) const

Perform sanity checks after a drain.

Definition at line 289 of file lsq_unit.cc.

References gem5::ArmISA::i, loadQueue, retryPkt, and storesToWB.

◆ dumpInsts()

void gem5::o3::LSQUnit::dumpInsts ( ) const

Debugging function to dump instructions in the LSQ.

Definition at line 1292 of file lsq_unit.cc.

References gem5::cprintf(), gem5::ArmISA::e, loadQueue, and storeQueue.

◆ executeLoad() [1/2]

Fault gem5::o3::LSQUnit::executeLoad ( const DynInstPtr & inst )

Executes a load instruction.

Definition at line 594 of file lsq_unit.cc.

References checkLoads, checkViolations(), DPRINTF, iewStage, LSQUnit(), and gem5::NoFault.

◆ executeLoad() [2/2]

Fault gem5::o3::LSQUnit::executeLoad ( int lq_idx )

inline

Definition at line 265 of file lsq_unit.hh.

References gem5::NoFault, and panic.

◆ executeStore()

Fault gem5::o3::LSQUnit::executeStore ( const DynInstPtr & inst )

Executes a store instruction.

Definition at line 666 of file lsq_unit.cc.

References checkViolations(), DPRINTF, iewStage, LSQUnit(), gem5::NoFault, storeQueue, and storesToWB.

◆ getCount()

unsigned gem5::o3::LSQUnit::getCount ( )

inline

Returns the number of instructions in the LSQ.

Definition at line 342 of file lsq_unit.hh.

References loadQueue, and storeQueue.

◆ getLatestHtmUid()

uint64_t gem5::o3::LSQUnit::getLatestHtmUid ( ) const

Definition at line 1045 of file lsq_unit.cc.

References cpu, and lsqID.

◆ getLoadHead()

int gem5::o3::LSQUnit::getLoadHead ( )

inline

Returns the index of the head load instruction.

Definition at line 554 of file lsq_unit.hh.

References loadQueue.

◆ getLoadHeadSeqNum()

InstSeqNum gem5::o3::LSQUnit::getLoadHeadSeqNum ( )

Returns the sequence number of the head load instruction.

Definition at line 1650 of file lsq_unit.cc.

References loadQueue.

◆ getMemDepViolator()

DynInstPtr gem5::o3::LSQUnit::getMemDepViolator ( )

Returns the memory ordering violator.

Definition at line 404 of file lsq_unit.cc.

References memDepViolator.

◆ getMMUPtr()

BaseMMU * gem5::o3::LSQUnit::getMMUPtr ( )

Definition at line 1317 of file lsq_unit.cc.

References cpu.

◆ getStoreHead()

int gem5::o3::LSQUnit::getStoreHead ( )

inline

Returns the index of the head store instruction.

Definition at line 560 of file lsq_unit.hh.

References storeQueue.

◆ getStoreHeadSeqNum()

InstSeqNum gem5::o3::LSQUnit::getStoreHeadSeqNum ( )

Returns the sequence number of the head store instruction.

Definition at line 1659 of file lsq_unit.cc.

References storeQueue.

◆ hasStoresToWB()

bool gem5::o3::LSQUnit::hasStoresToWB ( )

inline

Returns if there are any stores to writeback.

Definition at line 345 of file lsq_unit.hh.

References storesToWB.

◆ init()

void gem5::o3::LSQUnit::init	(	CPU *	cpu_ptr,
		IEW *	iew_ptr,
		const BaseO3CPUParams &	params,
		LSQ *	lsq_ptr,
		unsigned	id )

Initializes the LSQ unit with the specified number of entries.

Definition at line 203 of file lsq_unit.cc.

References checkLoads, cpu, gem5::csprintf(), depCheckShift, DPRINTF, gem5::ArmISA::id, iewStage, lsq, lsqID, LSQUnit(), needsTSO, resetState(), and stats.

◆ insert()

void gem5::o3::LSQUnit::insert ( const DynInstPtr & inst )

Inserts an instruction.

Definition at line 305 of file lsq_unit.cc.

References insertLoad(), and insertStore().

◆ insertLoad()

void gem5::o3::LSQUnit::insertLoad ( const DynInstPtr & load_inst )

Inserts a load instruction.

Definition at line 321 of file lsq_unit.cc.

References cpu, DPRINTF, htmStarts, htmStops, loadQueue, lsqID, LSQUnit(), stats, and storeQueue.

Referenced by insert().

◆ insertStore()

void gem5::o3::LSQUnit::insertStore ( const DynInstPtr & store_inst )

Inserts a store instruction.

Definition at line 382 of file lsq_unit.cc.

References DPRINTF, loadQueue, LSQUnit(), stats, and storeQueue.

Referenced by insert().

◆ isEmpty()

bool gem5::o3::LSQUnit::isEmpty ( ) const

inline

Returns if both the LQ and SQ are empty.

Definition at line 327 of file lsq_unit.hh.

References lqEmpty(), and sqEmpty().

◆ isFull()

bool gem5::o3::LSQUnit::isFull ( )

inline

Returns if either the LQ or SQ is full.

Definition at line 324 of file lsq_unit.hh.

References lqFull(), and sqFull().

◆ isStalled()

bool gem5::o3::LSQUnit::isStalled ( )

inline

Returns whether or not the LSQ unit is stalled.

Definition at line 565 of file lsq_unit.hh.

References stalled.

Referenced by completeStore(), squash(), and storePostSend().

◆ lqEmpty()

bool gem5::o3::LSQUnit::lqEmpty ( ) const

inline

Returns if the LQ is empty.

Definition at line 336 of file lsq_unit.hh.

References loadQueue.

Referenced by isEmpty().

◆ lqFull()

bool gem5::o3::LSQUnit::lqFull ( )

inline

Returns if the LQ is full.

Definition at line 330 of file lsq_unit.hh.

References loadQueue.

Referenced by isFull().

◆ name()

std::string gem5::o3::LSQUnit::name ( ) const

Returns the name of the LSQ unit.

Definition at line 245 of file lsq_unit.cc.

References iewStage, lsqID, and gem5::o3::MaxThreads.

◆ numFreeLoadEntries()

unsigned gem5::o3::LSQUnit::numFreeLoadEntries ( )

Returns the number of free LQ entries.

Definition at line 414 of file lsq_unit.cc.

References DPRINTF, loadQueue, and LSQUnit().

◆ numFreeStoreEntries()

unsigned gem5::o3::LSQUnit::numFreeStoreEntries ( )

Returns the number of free SQ entries.

Definition at line 422 of file lsq_unit.cc.

References DPRINTF, LSQUnit(), and storeQueue.

◆ numHtmStarts()

int gem5::o3::LSQUnit::numHtmStarts ( ) const

inline

Definition at line 308 of file lsq_unit.hh.

References htmStarts.

◆ numHtmStops()

int gem5::o3::LSQUnit::numHtmStops ( ) const

inline

Definition at line 309 of file lsq_unit.hh.

References htmStops.

◆ numLoads()

int gem5::o3::LSQUnit::numLoads ( )

inline

Returns the number of loads in the LQ.

Definition at line 302 of file lsq_unit.hh.

References loadQueue.

◆ numStores()

int gem5::o3::LSQUnit::numStores ( )

inline

Returns the number of stores in the SQ.

Definition at line 305 of file lsq_unit.hh.

References storeQueue.

◆ numStoresToWB()

int gem5::o3::LSQUnit::numStoresToWB ( )

inline

Returns the number of stores to writeback.

Definition at line 348 of file lsq_unit.hh.

References storesToWB.

◆ read()

Fault gem5::o3::LSQUnit::read	(	LSQRequest *	request,
		ssize_t	load_idx )

Executes the load at the given index.

Definition at line 1326 of file lsq_unit.cc.

References gem5::o3::LSQ::LSQRequest::_numOutstandingPackets, gem5::o3::LSQ::LSQRequest::buildPackets(), cpu, gem5::curTick(), gem5::RefCountingPtr< T >::data, gem5::Packet::dataStatic(), gem5::o3::LSQ::LSQRequest::discard(), DPRINTF, FullAddrRangeCoverage, gem5::RefCountingPtr< T >::get(), gem5::Packet::getAddr(), iewStage, gem5::o3::LSQUnit::LSQEntry::instruction(), gem5::o3::LSQ::LSQRequest::isAnyOutstandingRequest(), gem5::o3::LSQ::LSQRequest::isSent(), gem5::o3::LSQ::LSQRequest::isSplit(), loadQueue, lsq, lsqID, LSQUnit(), gem5::o3::LSQ::LSQRequest::mainReq(), MaxDataBytes, NoAddrRangeCoverage, gem5::NoFault, panic, PartialAddrRangeCoverage, gem5::MemCmd::ReadReq, gem5::Packet::req, gem5::o3::LSQ::LSQRequest::sendPacketToCache(), gem5::Packet::setHtmTransactional(), gem5::o3::LSQUnit::LSQEntry::setRequest(), stalled, stallingLoadIdx, stallingStoreIsn, stats, storeQueue, and storeWBIt.

◆ recvRetry()

void gem5::o3::LSQUnit::recvRetry ( )

Handles doing the retry.

Definition at line 1283 of file lsq_unit.cc.

References DPRINTF, isStoreBlocked, LSQUnit(), and writebackBlockedStore().

◆ recvTimingResp()

bool gem5::o3::LSQUnit::recvTimingResp ( PacketPtr pkt )

Handles writing back and completing the load or store that has returned from memory.

Parameters

pkt	Response packet from the memory sub-system

Definition at line 92 of file lsq_unit.cc.

References gem5::o3::LSQ::LSQRequest::isReleased(), gem5::o3::LSQ::LSQRequest::recvTimingResp(), and gem5::Packet::senderState.

◆ resetHtmStartsStops()

void gem5::o3::LSQUnit::resetHtmStartsStops ( )

inline

Definition at line 310 of file lsq_unit.hh.

References htmStarts, and htmStops.

◆ resetState()

void gem5::o3::LSQUnit::resetState ( )

private

Reset the LSQ state.

Definition at line 226 of file lsq_unit.cc.

References cacheBlockMask, cpu, htmStarts, htmStops, memDepViolator, retryPkt, stalled, storeQueue, storesToWB, and storeWBIt.

Referenced by init(), and takeOverFrom().

◆ schedule()

void gem5::o3::LSQUnit::schedule	(	Event &	ev,
		Tick	when )

Schedule event for the cpu.

Definition at line 1315 of file lsq_unit.cc.

References cpu.

◆ setDcachePort()

void gem5::o3::LSQUnit::setDcachePort ( RequestPort * dcache_port )

Sets the pointer to the dcache port.

Definition at line 283 of file lsq_unit.cc.

References dcachePort.

◆ setLastRetiredHtmUid()

void gem5::o3::LSQUnit::setLastRetiredHtmUid ( uint64_t htm_uid )

inline

Definition at line 313 of file lsq_unit.hh.

References lastRetiredHtmUid.

◆ sqEmpty()

bool gem5::o3::LSQUnit::sqEmpty ( ) const

inline

Returns if the SQ is empty.

Definition at line 339 of file lsq_unit.hh.

References storeQueue.

Referenced by isEmpty().

◆ sqFull()

bool gem5::o3::LSQUnit::sqFull ( )

inline

Returns if the SQ is full.

Definition at line 333 of file lsq_unit.hh.

References storeQueue.

Referenced by isFull().

◆ squash()

void gem5::o3::LSQUnit::squash ( const InstSeqNum & squashed_num )

Squashes all instructions younger than a specific sequence number.

Definition at line 930 of file lsq_unit.cc.

References cpu, DPRINTF, htmStarts, htmStops, isStalled(), lastRetiredHtmUid, loadQueue, lsqID, LSQUnit(), memDepViolator, panic, stalled, stallingLoadIdx, stallingStoreIsn, stats, and storeQueue.

◆ startStaleTranslationFlush()

void gem5::o3::LSQUnit::startStaleTranslationFlush ( )

Definition at line 1250 of file lsq_unit.cc.

References DPRINTF, loadQueue, LSQUnit(), and storeQueue.

◆ storePostSend()

void gem5::o3::LSQUnit::storePostSend ( )

private

Handles completing the send of a store to memory.

Definition at line 1052 of file lsq_unit.cc.

References cpu, DPRINTF, iewStage, isStalled(), loadQueue, LSQUnit(), needsTSO, stalled, stallingLoadIdx, stallingStoreIsn, storeInFlight, and storeWBIt.

Referenced by writebackBlockedStore(), and writebackStores().

◆ takeOverFrom()

void gem5::o3::LSQUnit::takeOverFrom ( )

Takes over from another CPU's thread.

Definition at line 299 of file lsq_unit.cc.

References resetState().

◆ trySendPacket()

bool gem5::o3::LSQUnit::trySendPacket	(	bool	isLoad,
		PacketPtr	data_pkt )

Attempts to send a packet to the cache.

Check if there are ports available. Return true if there are, false if there are not.

Definition at line 1208 of file lsq_unit.cc.

References dcachePort, DPRINTF, gem5::o3::LSQ::LSQRequest::instruction(), isStoreBlocked, lsq, LSQUnit(), gem5::o3::LSQ::LSQRequest::packetNotSent(), gem5::o3::LSQ::LSQRequest::packetSent(), gem5::Packet::print(), gem5::Packet::senderState, stats, and storeWBIt.

◆ violation()

bool gem5::o3::LSQUnit::violation ( )

inline

Returns if there is a memory ordering violation.

Value is reset upon call to getMemDepViolator().

Definition at line 290 of file lsq_unit.hh.

References memDepViolator.

◆ willWB()

bool gem5::o3::LSQUnit::willWB ( )

inline

Returns if the LSQ unit will writeback on this cycle.

Definition at line 352 of file lsq_unit.hh.

References isStoreBlocked, and storeWBIt.

◆ write()

Fault gem5::o3::LSQUnit::write	(	LSQRequest *	requst,
		uint8_t *	data,
		ssize_t	store_idx )

Executes the store at the given index.

Definition at line 1621 of file lsq_unit.cc.

References gem5::o3::LSQ::LSQRequest::_size, gem5::Request::CACHE_BLOCK_ZERO, data, gem5::o3::LSQUnit::SQEntry::DataSize, DPRINTF, LSQUnit(), gem5::o3::LSQ::LSQRequest::mainReq(), gem5::NoFault, gem5::o3::LSQ::LSQRequest::req(), gem5::Request::STORE_NO_DATA, and storeQueue.

◆ writeback()

void gem5::o3::LSQUnit::writeback	(	const DynInstPtr &	inst,
		PacketPtr	pkt )

private

Writes back the instruction, sending it to IEW.

Definition at line 1083 of file lsq_unit.cc.

References DPRINTF, gem5::RefCountingPtr< T >::get(), gem5::htmFailureToStr(), gem5::Packet::htmTransactionFailedInCache(), iewStage, LSQUnit(), gem5::NoFault, and stats.

◆ writebackBlockedStore()

void gem5::o3::LSQUnit::writebackBlockedStore ( )

private

Try to finish a previously blocked write back attempt.

Definition at line 788 of file lsq_unit.cc.

References isStoreBlocked, storePostSend(), and storeWBIt.

Referenced by recvRetry(), and writebackStores().

◆ writebackStores()

void gem5::o3::LSQUnit::writebackStores ( )

Member Data Documentation

◆ cacheBlockMask

Addr gem5::o3::LSQUnit::cacheBlockMask

private

Address Mask for a cache block (e.g.

~(cache_block_size-1))

Definition at line 479 of file lsq_unit.hh.

Referenced by checkSnoop(), LSQUnit(), resetState(), and writebackStores().

◆ checkLoads

bool gem5::o3::LSQUnit::checkLoads

private

Should loads be checked for dependency issues.

Definition at line 461 of file lsq_unit.hh.

Referenced by executeLoad(), and init().

◆ cpu

CPU* gem5::o3::LSQUnit::cpu

private

Pointer to the CPU.

Definition at line 399 of file lsq_unit.hh.

Referenced by cacheLineSize(), checkSnoop(), commitLoad(), completeDataAccess(), completeStore(), getLatestHtmUid(), getMMUPtr(), init(), insertLoad(), read(), resetState(), schedule(), squash(), storePostSend(), and writebackStores().

◆ dcachePort

RequestPort* gem5::o3::LSQUnit::dcachePort

private

Pointer to the dcache port.

Used only for sending.

Definition at line 408 of file lsq_unit.hh.

Referenced by setDcachePort(), and trySendPacket().

◆ depCheckShift

unsigned gem5::o3::LSQUnit::depCheckShift

private

The number of places to shift addresses in the LSQ before checking for dependency violations.

Definition at line 458 of file lsq_unit.hh.

Referenced by checkViolations(), and init().

◆ fromIssue

TimeBuffer<IssueStruct>::wire gem5::o3::LSQUnit::fromIssue

private

Wire to read information from the issue stage time queue.

Definition at line 482 of file lsq_unit.hh.

◆ htmStarts

int gem5::o3::LSQUnit::htmStarts

private

Definition at line 468 of file lsq_unit.hh.

Referenced by insertLoad(), LSQUnit(), numHtmStarts(), resetHtmStartsStops(), resetState(), and squash().

◆ htmStops

int gem5::o3::LSQUnit::htmStops

private

Definition at line 469 of file lsq_unit.hh.

Referenced by insertLoad(), LSQUnit(), numHtmStops(), resetHtmStartsStops(), resetState(), and squash().

◆ iewStage

IEW* gem5::o3::LSQUnit::iewStage

private

Pointer to the IEW stage.

Definition at line 402 of file lsq_unit.hh.

Referenced by completeStore(), executeLoad(), executeStore(), init(), name(), read(), storePostSend(), and writeback().

◆ isStoreBlocked

bool gem5::o3::LSQUnit::isStoreBlocked

private

Whehter or not a store is blocked due to the memory system.

Definition at line 497 of file lsq_unit.hh.

Referenced by LSQUnit(), recvRetry(), trySendPacket(), willWB(), writebackBlockedStore(), and writebackStores().

◆ lastRetiredHtmUid

uint64_t gem5::o3::LSQUnit::lastRetiredHtmUid

private

Definition at line 471 of file lsq_unit.hh.

Referenced by LSQUnit(), setLastRetiredHtmUid(), and squash().

◆ loadQueue

LoadQueue gem5::o3::LSQUnit::loadQueue

The load queue.

Definition at line 452 of file lsq_unit.hh.

Referenced by checkSnoop(), checkStaleTranslations(), checkViolations(), commitLoad(), commitLoads(), completeStore(), drainSanityCheck(), dumpInsts(), getCount(), getLoadHead(), getLoadHeadSeqNum(), insertLoad(), insertStore(), lqEmpty(), lqFull(), LSQUnit(), numFreeLoadEntries(), numLoads(), read(), squash(), startStaleTranslationFlush(), and storePostSend().

◆ lsq

LSQ* gem5::o3::LSQUnit::lsq

private

Pointer to the LSQ.

Definition at line 405 of file lsq_unit.hh.

Referenced by init(), read(), trySendPacket(), and writebackStores().

◆ lsqID

ThreadID gem5::o3::LSQUnit::lsqID

private

The LSQUnit thread id.

Definition at line 446 of file lsq_unit.hh.

Referenced by getLatestHtmUid(), init(), insertLoad(), LSQUnit(), name(), read(), squash(), and writebackStores().

◆ MaxDataBytes

auto gem5::o3::LSQUnit::MaxDataBytes = MaxVecRegLenInBytes

staticconstexpr

Definition at line 91 of file lsq_unit.hh.

Referenced by read().

◆ memDepViolator

DynInstPtr gem5::o3::LSQUnit::memDepViolator

private

The oldest load that caused a memory ordering violation.

Definition at line 503 of file lsq_unit.hh.

Referenced by checkViolations(), getMemDepViolator(), resetState(), squash(), and violation().

◆ needsTSO

bool gem5::o3::LSQUnit::needsTSO

private

Flag for memory model.

Definition at line 506 of file lsq_unit.hh.

Referenced by checkSnoop(), completeStore(), init(), storePostSend(), and writebackStores().

◆ retryPkt

PacketPtr gem5::o3::LSQUnit::retryPkt

private

The packet that needs to be retried.

Definition at line 494 of file lsq_unit.hh.

Referenced by drainSanityCheck(), and resetState().

◆ stalled

bool gem5::o3::LSQUnit::stalled

private

Whether or not the LSQ is stalled.

Definition at line 485 of file lsq_unit.hh.

Referenced by completeStore(), isStalled(), LSQUnit(), read(), resetState(), squash(), and storePostSend().

◆ stallingLoadIdx

ssize_t gem5::o3::LSQUnit::stallingLoadIdx

private

The index of the above store.

Definition at line 491 of file lsq_unit.hh.

Referenced by completeStore(), read(), squash(), and storePostSend().

◆ stallingStoreIsn

InstSeqNum gem5::o3::LSQUnit::stallingStoreIsn

private

The store that causes the stall due to partial store to load forwarding.

Definition at line 489 of file lsq_unit.hh.

Referenced by completeStore(), read(), squash(), and storePostSend().

◆ stats

gem5::o3::LSQUnit::LSQUnitStats gem5::o3::LSQUnit::stats

protected

Referenced by checkViolations(), commitLoad(), init(), insertLoad(), insertStore(), LSQUnit(), LSQUnit(), read(), squash(), trySendPacket(), and writeback().

◆ storeInFlight

bool gem5::o3::LSQUnit::storeInFlight

private

Whether or not a store is in flight.

Definition at line 500 of file lsq_unit.hh.

Referenced by completeStore(), LSQUnit(), storePostSend(), and writebackStores().

◆ storeQueue

StoreQueue gem5::o3::LSQUnit::storeQueue

The store queue.

Definition at line 449 of file lsq_unit.hh.

Referenced by checkStaleTranslations(), commitStores(), completeStore(), dumpInsts(), executeStore(), getCount(), getStoreHead(), getStoreHeadSeqNum(), insertLoad(), insertStore(), LSQUnit(), numFreeStoreEntries(), numStores(), read(), resetState(), sqEmpty(), sqFull(), squash(), startStaleTranslationFlush(), write(), and writebackStores().

◆ storesToWB

int gem5::o3::LSQUnit::storesToWB

private

The number of store instructions in the SQ waiting to writeback.

Definition at line 464 of file lsq_unit.hh.

Referenced by commitStores(), completeStore(), drainSanityCheck(), executeStore(), hasStoresToWB(), LSQUnit(), numStoresToWB(), resetState(), and writebackStores().

◆ storeWBIt

StoreQueue::iterator gem5::o3::LSQUnit::storeWBIt

private

The index of the first instruction that may be ready to be written back, and has not yet been written back.

Definition at line 476 of file lsq_unit.hh.

Referenced by read(), resetState(), storePostSend(), trySendPacket(), willWB(), writebackBlockedStore(), and writebackStores().

The documentation for this class was generated from the following files:

cpu/o3/lsq_unit.hh
cpu/o3/lsq_unit.cc

Classes

Public Types

Public Member Functions

Public Attributes

Static Public Attributes

Protected Attributes

Private Types

Private Member Functions

Private Attributes

Detailed Description

Member Typedef Documentation

◆ LoadQueue

◆ LQEntry

◆ LQIterator

◆ LSQRequest

◆ SQIterator

◆ StoreQueue

Member Enumeration Documentation

◆ AddrRangeCoverage

Constructor & Destructor Documentation

◆ LSQUnit() [1/2]

◆ LSQUnit() [2/2]

Member Function Documentation

◆ cacheLineSize()

◆ checkSnoop()

◆ checkStaleTranslations()

◆ checkViolations()

◆ commitLoad()

◆ commitLoads()

◆ commitStores()

◆ completeDataAccess()

◆ completeStore()

◆ drainSanityCheck()

◆ dumpInsts()

◆ executeLoad() [1/2]

◆ executeLoad() [2/2]

◆ executeStore()

◆ getCount()

◆ getLatestHtmUid()

◆ getLoadHead()

◆ getLoadHeadSeqNum()

◆ getMemDepViolator()

◆ getMMUPtr()

◆ getStoreHead()

◆ getStoreHeadSeqNum()

◆ hasStoresToWB()

◆ init()

◆ insert()

◆ insertLoad()

◆ insertStore()

◆ isEmpty()

◆ isFull()

◆ isStalled()

◆ lqEmpty()

◆ lqFull()

◆ name()

◆ numFreeLoadEntries()

◆ numFreeStoreEntries()

◆ numHtmStarts()

◆ numHtmStops()

◆ numLoads()

◆ numStores()

◆ numStoresToWB()

◆ read()

◆ recvRetry()

◆ recvTimingResp()

◆ resetHtmStartsStops()

◆ resetState()

◆ schedule()

◆ setDcachePort()

◆ setLastRetiredHtmUid()

◆ sqEmpty()

◆ sqFull()

◆ squash()

◆ startStaleTranslationFlush()

◆ storePostSend()

◆ takeOverFrom()

◆ trySendPacket()

◆ violation()

◆ willWB()