gem5
v24.0.0.0
Loading...
Searching...
No Matches
arch
riscv
process.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2006 The Regents of The University of Michigan
3
* Copyright (c) 2017 The University of Virginia
4
* All rights reserved.
5
*
6
* Redistribution and use in source and binary forms, with or without
7
* modification, are permitted provided that the following conditions are
8
* met: redistributions of source code must retain the above copyright
9
* notice, this list of conditions and the following disclaimer;
10
* redistributions in binary form must reproduce the above copyright
11
* notice, this list of conditions and the following disclaimer in the
12
* documentation and/or other materials provided with the distribution;
13
* neither the name of the copyright holders nor the names of its
14
* contributors may be used to endorse or promote products derived from
15
* this software without specific prior written permission.
16
*
17
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
*/
29
30
#ifndef __RISCV_PROCESS_HH__
31
#define __RISCV_PROCESS_HH__
32
33
#include <string>
34
#include <vector>
35
36
#include "
mem/page_table.hh
"
37
#include "
sim/process.hh
"
38
#include "
sim/syscall_abi.hh
"
39
40
namespace
gem5
41
{
42
43
namespace
loader
44
{
45
class
ObjectFile;
46
}
// namespace loader
47
48
class
System;
49
50
class
RiscvProcess
:
public
Process
51
{
52
protected
:
53
RiscvProcess
(
const
ProcessParams &
params
,
loader::ObjectFile
*
objFile
);
54
template
<
class
IntType>
55
void
argsInit
(
int
pageSize);
56
57
public
:
58
virtual
bool
mmapGrowsDown
()
const override
{
return
false
; }
59
};
60
61
class
RiscvProcess64
:
public
RiscvProcess
62
{
63
public
:
64
RiscvProcess64
(
const
ProcessParams &
params
,
loader::ObjectFile
*
objFile
);
65
66
protected
:
67
void
initState
()
override
;
68
};
69
70
class
RiscvProcess32
:
public
RiscvProcess
71
{
72
public
:
73
RiscvProcess32
(
const
ProcessParams &
params
,
loader::ObjectFile
*
objFile
);
74
75
protected
:
76
void
initState
()
override
;
77
};
78
79
}
// namespace gem5
80
81
#endif
// __RISCV_PROCESS_HH__
gem5::Process
Definition
process.hh:68
gem5::Process::objFile
loader::ObjectFile * objFile
Definition
process.hh:223
gem5::RiscvProcess32
Definition
process.hh:71
gem5::RiscvProcess32::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition
process.cc:117
gem5::RiscvProcess32::RiscvProcess32
RiscvProcess32(const ProcessParams ¶ms, loader::ObjectFile *objFile)
Definition
process.cc:85
gem5::RiscvProcess64
Definition
process.hh:62
gem5::RiscvProcess64::RiscvProcess64
RiscvProcess64(const ProcessParams ¶ms, loader::ObjectFile *objFile)
Definition
process.cc:72
gem5::RiscvProcess64::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition
process.cc:99
gem5::RiscvProcess
Definition
process.hh:51
gem5::RiscvProcess::RiscvProcess
RiscvProcess(const ProcessParams ¶ms, loader::ObjectFile *objFile)
Definition
process.cc:63
gem5::RiscvProcess::argsInit
void argsInit(int pageSize)
Definition
process.cc:135
gem5::RiscvProcess::mmapGrowsDown
virtual bool mmapGrowsDown() const override
Does mmap region grow upward or downward from mmapEnd? Most platforms grow downward,...
Definition
process.hh:58
gem5::loader::ObjectFile
Definition
object_file.hh:97
gem5::SimObject::params
const Params & params() const
Definition
sim_object.hh:176
gem5
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition
binary32.hh:36
page_table.hh
Declarations of a non-full system Page Table.
process.hh
syscall_abi.hh
Generated on Tue Jun 18 2024 16:24:06 for gem5 by
doxygen
1.11.0