gem5 v24.0.0.0
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#include <system.hh>
Classes | |
class | SystemPort |
Private class for the system port which is only used as a requestor for debug access and for non-structural entities that do not have a port of their own. More... | |
class | Threads |
Public Member Functions | |
RequestPort & | getSystemPort () |
Get a reference to the system port that can be used by non-structural simulation objects like processes or threads, or external entities like loaders and debuggers, etc, to access the memory system. | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Additional function to return the Port of a memory object. | |
Addr | cacheLineSize () const |
Get the cache line size of the system. | |
bool | schedule (PCEvent *event) override |
bool | remove (PCEvent *event) override |
KvmVM * | getKvmVM () const |
Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present. | |
void | setKvmVM (KvmVM *const vm) |
Set the pointer to the Kernel Virtual Machine (KVM) SimObject. | |
memory::PhysicalMemory & | getPhysMem () |
Get a pointer to access the physical memory of the system. | |
const memory::PhysicalMemory & | getPhysMem () const |
Addr | memSize () const |
Amount of physical memory that exists. | |
bool | isMemAddr (Addr addr) const |
Check if a physical address is within a range of a memory that is part of the global address map. | |
void | addDeviceMemory (RequestorID requestorId, memory::AbstractMemory *deviceMemory) |
Add a physical memory range for a device. | |
bool | isDeviceMemAddr (const PacketPtr &pkt) const |
Similar to isMemAddr but for devices. | |
memory::AbstractMemory * | getDeviceMemory (const PacketPtr &pkt) const |
Return a pointer to the device memory. | |
AddrRangeList | getShadowRomRanges () const |
ByteOrder | getGuestByteOrder () const |
Get the guest byte order. | |
ThermalModel * | getThermalModel () const |
The thermal model used for this system (if any). | |
RequestorID | getRequestorId (const SimObject *requestor, std::string subrequestor={}) |
Request an id used to create a request object in the system. | |
RequestorID | getGlobalRequestorId (const std::string &requestor_name) |
Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since no SimObject is passed, the requestor gets registered by providing the full requestor name. | |
std::string | getRequestorName (RequestorID requestor_id) |
Get the name of an object for a given request id. | |
RequestorID | lookupRequestorId (const SimObject *obj) const |
Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if not found. | |
RequestorID | lookupRequestorId (const std::string &name) const |
Looks up the RequestorID for a given object name string returns an invalid RequestorID (invldRequestorId) if not found. | |
RequestorID | maxRequestors () |
Get the number of requestors registered in the system. | |
void | regStats () override |
Callback to set stat parameters. | |
uint64_t | incWorkItemsBegin () |
Called by pseudo_inst to track the number of work items started by this system. | |
uint64_t | incWorkItemsEnd () |
Called by pseudo_inst to track the number of work items completed by this system. | |
int | markWorkItem (int index) |
Called by pseudo_inst to mark the cpus actively executing work items. | |
void | workItemBegin (uint32_t tid, uint32_t workid) |
void | workItemEnd (uint32_t tid, uint32_t workid) |
bool | trapToGdb (GDBSignal signal, ContextID ctx_id) const |
PARAMS (System) | |
System (const Params &p) | |
~System () | |
const AddrRange & | m5opRange () const |
Range used by memory-mapped m5 pseudo-ops if enabled. | |
void | registerThreadContext (ThreadContext *tc) |
void | replaceThreadContext (ThreadContext *tc, ContextID context_id) |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
bool | isAtomicMode () const |
Is the system in atomic mode? | |
bool | isTimingMode () const |
Is the system in timing mode? | |
bool | bypassCaches () const |
Should caches be bypassed? | |
enums::MemoryMode | getMemoryMode () const |
Get the memory mode of the system. | |
void | setMemoryMode (enums::MemoryMode mode) |
Change the memory mode of the system. | |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | init () |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
virtual void | regProbeListeners () |
Register probe listeners for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
virtual void | startup () |
startup() is the final initialization call before simulation. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | resetStats () |
Callback to reset stats. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Static Public Member Functions | |
static void | printSystems () |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Public Attributes | |
Threads | threads |
const bool | multiThread |
uint64_t | init_param |
PortProxy | physProxy |
Port to physical memory used for writing object files into ram at boot. | |
Workload * | workload = nullptr |
OS kernel. | |
std::map< std::pair< uint32_t, uint32_t >, Tick > | lastWorkItemStarted |
std::map< uint32_t, statistics::Histogram * > | workItemStats |
FutexMap | futexMap |
std::set< int > | PIDs |
Process set to track which PIDs have already been allocated. | |
std::list< BasicSignal > | signalList |
std::vector< RedirectPath * > | redirectPaths |
Static Public Attributes | |
static std::vector< System * > | systemList |
static int | numSystemsRunning = 0 |
static const int | maxPID = 32768 |
Protected Member Functions | |
std::string | stripSystemName (const std::string &requestor_name) const |
Strips off the system name from a requestor name. | |
RequestorID | _getRequestorId (const SimObject *requestor, const std::string &requestor_name) |
helper function for getRequestorId | |
std::string | leafRequestorName (const SimObject *requestor, const std::string &subrequestor) |
Helper function for constructing the full (sub)requestor name by providing the root requestor and the relative subrequestor name. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Attributes | |
KvmVM * | kvmVM = nullptr |
memory::PhysicalMemory | physmem |
AddrRangeList | ShadowRomRanges |
enums::MemoryMode | memoryMode |
const Addr | _cacheLineSize |
uint64_t | workItemsBegin = 0 |
uint64_t | workItemsEnd = 0 |
uint32_t | numWorkIds |
std::vector< RequestorInfo > | requestors |
This array is a per-system list of all devices capable of issuing a memory system request and an associated string for each requestor id. | |
ThermalModel * | thermalModel |
const AddrRange | _m5opRange |
Range for memory-mapped m5 pseudo ops. | |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Private Attributes | |
std::list< PCEvent * > | liveEvents |
SystemPort | _systemPort |
std::unordered_map< RequestorID, std::vector< memory::AbstractMemory * > > | deviceMemMap |
Additional Inherited Members | |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
gem5::System::System | ( | const Params & | p | ) |
Definition at line 167 of file system.cc.
References _cacheLineSize, gem5::Request::funcRequestorId, getRequestorId(), gem5::Request::intRequestorId, gem5::Named::name(), numSystemsRunning, panic_if, gem5::SimObject::params(), gem5::Workload::setSystem(), systemList, warn_once, gem5::Request::wbRequestorId, workload, and gem5::RiscvISA::x.
gem5::System::~System | ( | ) |
Definition at line 216 of file system.cc.
References numWorkIds, and workItemStats.
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helper function for getRequestorId
Definition at line 482 of file system.cc.
References gem5::statistics::enabled(), fatal, gem5::ArmISA::i, gem5::Named::name(), requestors, and stripSystemName().
Referenced by getGlobalRequestorId(), and getRequestorId().
void gem5::System::addDeviceMemory | ( | RequestorID | requestorId, |
memory::AbstractMemory * | deviceMemory ) |
Add a physical memory range for a device.
The ranges added here will be considered a non-PIO memory address if the requestorId of the packet and range match something in the device memory map.
Definition at line 294 of file system.cc.
References deviceMemMap.
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Should caches be bypassed?
Some CPUs need to bypass caches to allow direct memory accesses, which is required for hardware virtualization.
Definition at line 279 of file system.hh.
References memoryMode.
Referenced by gem5::HDLcd::cmdDisable(), gem5::HDLcd::cmdEnable(), gem5::HDLcd::drainResume(), gem5::CoherentXBar::forwardAtomic(), gem5::CoherentXBar::forwardFunctional(), gem5::CoherentXBar::forwardTiming(), gem5::HDLcd::pxlVSyncEnd(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvFunctional(), gem5::CoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::DmaReadFifo::resumeFill(), gem5::DmaPort::sendDma(), and gem5::BaseKvmCPU::verifyMemoryMode().
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Get the cache line size of the system.
Definition at line 308 of file system.hh.
References _cacheLineSize.
Referenced by gem5::DmaDevice::cacheBlockSize(), gem5::BaseTrafficGen::createDram(), gem5::BaseTrafficGen::createDramRot(), gem5::BaseTrafficGen::createHybrid(), gem5::BaseTrafficGen::createLinear(), gem5::BaseTrafficGen::createNvm(), gem5::BaseTrafficGen::createRandom(), gem5::BaseTrafficGen::createStrided(), gem5::memory::AbstractMemory::initState(), gem5::MemFootprintProbe::MemFootprintProbe(), and gem5::SparcISA::TLB::translateFunctional().
memory::AbstractMemory * gem5::System::getDeviceMemory | ( | const PacketPtr & | pkt | ) | const |
Return a pointer to the device memory.
Definition at line 311 of file system.cc.
References deviceMemMap, gem5::Packet::getAddrRange(), gem5::AddrRange::isSubset(), mem, panic_if, and gem5::Packet::requestorId().
Referenced by isDeviceMemAddr(), gem5::AMDGPUDevice::readFrame(), gem5::VegaISA::Walker::WalkerState::startFunctional(), gem5::GPUCommandProcessor::submitDispatchPkt(), and gem5::AMDGPUDevice::writeFrame().
RequestorID gem5::System::getGlobalRequestorId | ( | const std::string & | requestor_name | ) |
Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since no SimObject is passed, the requestor gets registered by providing the full requestor name.
requestorName | full name of the requestor |
Definition at line 469 of file system.cc.
References _getRequestorId().
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Get the guest byte order.
Definition at line 388 of file system.hh.
References gem5::Workload::byteOrder(), and workload.
Referenced by gem5::_llseekFunc(), and gem5::getcpuFunc().
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Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present.
Definition at line 333 of file system.hh.
References kvmVM.
Referenced by gem5::BaseKvmCPU::init(), gem5::MuxingKvmGic< Types >::MuxingKvmGic(), and gem5::ArchTimerKvm::scheduleEvents().
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Get the memory mode of the system.
\warn This should only be used by the Python world. The C++ world should use one of the query functions above (isAtomicMode(), isTimingMode(), bypassCaches()).
Definition at line 293 of file system.hh.
References memoryMode.
Referenced by gem5::MinorCPU::init().
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Get a pointer to access the physical memory of the system.
Definition at line 342 of file system.hh.
References physmem.
Referenced by gem5::KvmVM::delayedStartup(), gem5::BaseSemihosting::gatherHeapInfo(), and gem5::ArmISA::FsLinux::initState().
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Additional function to return the Port of a memory object.
Reimplemented from gem5::SimObject.
Definition at line 223 of file system.cc.
References _systemPort.
RequestorID gem5::System::getRequestorId | ( | const SimObject * | requestor, |
std::string | subrequestor = {} ) |
Request an id used to create a request object in the system.
All objects that intend to issues requests into the memory system must request an id in the init() phase of startup. All requestor ids must be fixed by the regStats() phase that immediately precedes it. This allows objects in the memory system to understand how many requestors may exist and appropriately name the bins of their per-requestor stats before the stats are finalized.
Registers a RequestorID: This method takes two parameters, one of which is optional. The first one is the requestor object, and it is compulsory; in case a object has multiple (sub)requestors, a second parameter must be provided and it contains the name of the subrequestor. The method will create a requestor's name by concatenating the SimObject name with the eventual subrequestor string, separated by a dot.
As an example: For a cpu having two requestors: a data requestor and an instruction requestor, the method must be called twice:
instRequestorId = getRequestorId(cpu, "inst"); dataRequestorId = getRequestorId(cpu, "data");
and the requestors' names will be:
requestor | SimObject related to the requestor |
subrequestor | String containing the subrequestor's name |
Definition at line 475 of file system.cc.
References _getRequestorId(), and leafRequestorName().
Referenced by gem5::CheckerCPU::init(), and System().
std::string gem5::System::getRequestorName | ( | RequestorID | requestor_id | ) |
Get the name of an object for a given request id.
Definition at line 526 of file system.cc.
References fatal, and requestors.
Referenced by gem5::memory::qos::MemCtrl::addRequestor(), gem5::memory::qos::MemSinkCtrl::processNextReqEvent(), gem5::memory::qos::MemCtrl::qosSchedule(), gem5::memory::qos::MemSinkCtrl::recvTimingReq(), gem5::BaseCache::CacheStats::regStats(), gem5::BaseTags::BaseTagStats::regStats(), gem5::memory::AbstractMemory::MemStats::regStats(), gem5::memory::qos::MemCtrl::MemCtrlStats::regStats(), gem5::BaseCache::CacheCmdStats::regStatsFromParent(), gem5::memory::qos::FixedPriorityPolicy::schedule(), and gem5::MemTraceProbe::startup().
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Definition at line 382 of file system.hh.
References ShadowRomRanges.
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Get a reference to the system port that can be used by non-structural simulation objects like processes or threads, or external entities like loaders and debuggers, etc, to access the memory system.
Definition at line 239 of file system.hh.
References _systemPort.
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The thermal model used for this system (if any).
Definition at line 396 of file system.hh.
References thermalModel.
Referenced by gem5::RealViewTemperatureSensor::read().
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Called by pseudo_inst to track the number of work items started by this system.
Definition at line 517 of file system.hh.
References workItemsBegin.
Referenced by gem5::pseudo_inst::workbegin().
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Called by pseudo_inst to track the number of work items completed by this system.
Definition at line 527 of file system.hh.
References workItemsEnd.
Referenced by gem5::pseudo_inst::workend().
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Is the system in atomic mode?
There are currently two different atomic memory modes: 'atomic', which supports caches; and 'atomic_noncaching', which bypasses caches. The latter is used by hardware virtualized CPUs. SimObjects are expected to use Port::sendAtomic() and Port::recvAtomic() when accessing memory in this mode.
Definition at line 258 of file system.hh.
References memoryMode.
Referenced by gem5::SMMUTranslationProcess::abortTransaction(), gem5::SMMUTranslationProcess::completeTransaction(), gem5::SMMUv3::processCommands(), gem5::Gicv3Its::runProcess(), gem5::SMMUv3::runProcess(), and gem5::DmaPort::sendDma().
bool gem5::System::isDeviceMemAddr | ( | const PacketPtr & | pkt | ) | const |
Similar to isMemAddr but for devices.
Checks if a physical address of the packet match an address range of a device corresponding to the RequestorId of the request.
Definition at line 301 of file system.cc.
References deviceMemMap, getDeviceMemory(), and gem5::Packet::requestorId().
Referenced by gem5::ruby::RubyPort::ruby_hit_callback(), and gem5::ruby::HTMSequencer::rubyHtmCallback().
bool gem5::System::isMemAddr | ( | Addr | addr | ) | const |
Check if a physical address is within a range of a memory that is part of the global address map.
addr | A physical address |
Definition at line 288 of file system.cc.
References gem5::X86ISA::addr, gem5::memory::PhysicalMemory::isMemAddr(), and physmem.
Referenced by gem5::o3::Fetch::finishTranslation(), gem5::MemFootprintProbe::handleRequest(), gem5::KernelWorkload::initState(), gem5::ruby::RubyPort::ruby_hit_callback(), gem5::ruby::HTMSequencer::rubyHtmCallback(), and gem5::BaseTrafficGen::update().
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Is the system in timing mode?
SimObjects are expected to use Port::sendTiming() and Port::recvTiming() when accessing memory in this mode.
Definition at line 270 of file system.hh.
References memoryMode.
Referenced by gem5::SMMUTranslationProcess::abortTransaction(), gem5::SMMUTranslationProcess::completeTransaction(), gem5::SMMUProcess::doDelay(), gem5::memory::HBMCtrl::drainResume(), gem5::memory::HeteroMemCtrl::drainResume(), gem5::memory::MemCtrl::drainResume(), gem5::MinorCPU::drainResume(), gem5::TrafficGen::initState(), gem5::SMMUTranslationProcess::issuePrefetch(), gem5::SMMUv3::processCommands(), gem5::SMMUTranslationProcess::resumeTransaction(), gem5::Gicv3Its::runProcess(), gem5::SMMUv3::runProcess(), gem5::DmaPort::sendDma(), gem5::RiscvISA::Walker::start(), gem5::X86ISA::Walker::start(), gem5::memory::HBMCtrl::startup(), gem5::memory::MemCtrl::startup(), and gem5::o3::CPU::verifyMemoryMode().
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Helper function for constructing the full (sub)requestor name by providing the root requestor and the relative subrequestor name.
Definition at line 513 of file system.cc.
References gem5::Named::name().
Referenced by getRequestorId().
RequestorID gem5::System::lookupRequestorId | ( | const SimObject * | obj | ) | const |
Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if not found.
Definition at line 432 of file system.cc.
References fatal_if, gem5::ArmISA::i, gem5::ArmISA::id, gem5::Request::invldRequestorId, and requestors.
Referenced by gem5::memory::qos::PropFairPolicy::initRequestor(), and gem5::memory::qos::Policy::pair().
RequestorID gem5::System::lookupRequestorId | ( | const std::string & | name | ) | const |
Looks up the RequestorID for a given object name string returns an invalid RequestorID (invldRequestorId) if not found.
Definition at line 455 of file system.cc.
References gem5::ArmISA::i, gem5::Request::invldRequestorId, gem5::Named::name(), requestors, and stripSystemName().
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Range used by memory-mapped m5 pseudo-ops if enabled.
Returns an invalid/empty range if disabled.
Definition at line 573 of file system.hh.
References _m5opRange.
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Called by pseudo_inst to mark the cpus actively executing work items.
Returns the total number of cpus that have executed work item begin or ends.
Definition at line 538 of file system.hh.
References gem5::MipsISA::index, gem5::System::Threads::markActive(), gem5::System::Threads::numActive(), and threads.
Referenced by gem5::pseudo_inst::workbegin(), and gem5::pseudo_inst::workend().
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Get the number of requestors registered in the system.
Definition at line 495 of file system.hh.
References requestors.
Referenced by gem5::BaseCache::getNextQueueEntry(), gem5::BaseCache::handleTimingReqMiss(), gem5::BaseCache::incHitCount(), gem5::BaseCache::incMissCount(), gem5::BaseCache::recvTimingResp(), gem5::BaseCache::CacheStats::regStats(), gem5::BaseTags::BaseTagStats::regStats(), gem5::memory::AbstractMemory::MemStats::regStats(), gem5::memory::qos::MemCtrl::MemCtrlStats::regStats(), gem5::BaseCache::CacheCmdStats::regStatsFromParent(), gem5::Cache::serviceMSHRTargets(), gem5::NoncoherentCache::serviceMSHRTargets(), and gem5::MemTraceProbe::startup().
Addr gem5::System::memSize | ( | ) | const |
Amount of physical memory that exists.
Definition at line 282 of file system.cc.
References physmem, and gem5::memory::PhysicalMemory::totalSize().
gem5::System::PARAMS | ( | System | ) |
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Definition at line 400 of file system.cc.
References flags, gem5::ArmISA::i, gem5::Named::name(), and systemList.
Referenced by gem5::printSystems().
void gem5::System::registerThreadContext | ( | ThreadContext * | tc | ) |
Definition at line 237 of file system.cc.
References gem5::ArmISA::e, gem5::System::Threads::insert(), liveEvents, gem5::Workload::registerThreadContext(), gem5::PCEventScope::schedule(), threads, and workload.
Referenced by gem5::BaseCPU::registerThreadContexts().
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Callback to set stat parameters.
This callback is typically used for complex stats (e.g., distributions) that need parameters in addition to a name and a description. Stat names and descriptions should typically be set from the constructor usingo from the constructor using the ADD_STAT macro.
Reimplemented from gem5::statistics::Group.
Definition at line 361 of file system.cc.
References gem5::ccprintf(), numWorkIds, gem5::statistics::Group::regStats(), and workItemStats.
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Implements gem5::PCEventScope.
Definition at line 258 of file system.cc.
References gem5::RiscvISA::all, gem5::MipsISA::event, liveEvents, and threads.
void gem5::System::replaceThreadContext | ( | ThreadContext * | tc, |
ContextID | context_id ) |
Definition at line 268 of file system.cc.
References gem5::ArmISA::e, liveEvents, gem5::System::Threads::replace(), gem5::Workload::replaceThreadContext(), gem5::PCEventScope::schedule(), threads, and workload.
Referenced by gem5::BaseCPU::takeOverFrom().
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Implements gem5::PCEventScope.
Definition at line 248 of file system.cc.
References gem5::RiscvISA::all, gem5::MipsISA::event, liveEvents, and threads.
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Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Reimplemented from gem5::SimObject.
Definition at line 328 of file system.cc.
References gem5::csprintf(), gem5::paramOut(), physmem, gem5::Serializable::serializeSection(), gem5::ArmISA::t, threads, and gem5::System::Threads::threads.
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Set the pointer to the Kernel Virtual Machine (KVM) SimObject.
For use by that object to declare itself to the system.
Definition at line 339 of file system.hh.
References kvmVM, and gem5::ArmISA::vm.
Referenced by gem5::KvmVM::KvmVM().
void gem5::System::setMemoryMode | ( | enums::MemoryMode | mode | ) |
Change the memory mode of the system.
\warn This should only be called by the Python!
mode | Mode to change to (atomic/timing/...) |
Definition at line 230 of file system.cc.
References gem5::Drained, gem5::Drainable::drainState(), memoryMode, and gem5::ArmISA::mode.
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Strips off the system name from a requestor name.
Definition at line 422 of file system.cc.
References gem5::Named::name(), and gem5::startswith().
Referenced by _getRequestorId(), and lookupRequestorId().
bool gem5::System::trapToGdb | ( | GDBSignal | signal, |
ContextID | ctx_id ) const |
Definition at line 394 of file system.cc.
References gem5::Workload::trapToGdb(), and workload.
Referenced by gem5::GenericAlignmentFault::invoke(), gem5::GenericPageTableFault::invoke(), gem5::PowerISA::AlignmentFault::invoke(), gem5::PowerISA::TrapFault::invoke(), gem5::PowerISA::UnimplementedOpcodeFault::invoke(), gem5::RiscvISA::BreakpointFault::invokeSE(), and gem5::RiscvISA::IllegalInstFault::invokeSE().
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Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Reimplemented from gem5::SimObject.
Definition at line 344 of file system.cc.
References gem5::csprintf(), gem5::optParamIn(), physmem, gem5::ArmISA::t, threads, gem5::System::Threads::threads, and gem5::Serializable::unserializeSection().
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Definition at line 545 of file system.hh.
References gem5::curTick(), lastWorkItemStarted, and gem5::MipsISA::p.
Referenced by gem5::pseudo_inst::workbegin().
void gem5::System::workItemEnd | ( | uint32_t | tid, |
uint32_t | workid ) |
Definition at line 377 of file system.cc.
References gem5::curTick(), DPRINTF, fatal, lastWorkItemStarted, numWorkIds, gem5::MipsISA::p, and workItemStats.
Referenced by gem5::pseudo_inst::workend().
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Definition at line 408 of file system.hh.
Referenced by cacheLineSize(), and System().
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Range for memory-mapped m5 pseudo ops.
The range will be invalid/empty if disabled.
Definition at line 561 of file system.hh.
Referenced by m5opRange().
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Definition at line 108 of file system.hh.
Referenced by getPort(), and getSystemPort().
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Definition at line 112 of file system.hh.
Referenced by addDeviceMemory(), getDeviceMemory(), and isDeviceMemAddr().
FutexMap gem5::System::futexMap |
Definition at line 598 of file system.hh.
Referenced by gem5::exitFutexWake(), gem5::futexFunc(), and gem5::BaseCPU::postInterrupt().
uint64_t gem5::System::init_param |
Definition at line 319 of file system.hh.
Referenced by gem5::pseudo_inst::initParam().
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Definition at line 400 of file system.hh.
Referenced by getKvmVM(), and setKvmVM().
Definition at line 584 of file system.hh.
Referenced by workItemBegin(), and workItemEnd().
Definition at line 107 of file system.hh.
Referenced by registerThreadContext(), remove(), replaceThreadContext(), and schedule().
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Definition at line 600 of file system.hh.
Referenced by gem5::doClone(), and gem5::Process::Process().
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Definition at line 406 of file system.hh.
Referenced by bypassCaches(), getMemoryMode(), isAtomicMode(), isTimingMode(), and setMemoryMode().
const bool gem5::System::multiThread |
Definition at line 312 of file system.hh.
Referenced by gem5::FVPBasePwrCtrl::FVPBasePwrCtrl(), gem5::ArmISA::getAff0(), gem5::ArmISA::getAff1(), gem5::ArmISA::getAff2(), gem5::ArmISA::getMPIDR(), and gem5::BaseCPU::registerThreadContexts().
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Definition at line 412 of file system.hh.
Referenced by regStats(), workItemEnd(), and ~System().
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Definition at line 402 of file system.hh.
Referenced by getPhysMem(), getPhysMem(), isMemAddr(), memSize(), serialize(), and unserialize().
PortProxy gem5::System::physProxy |
Port to physical memory used for writing object files into ram at boot.
Definition at line 323 of file system.hh.
Referenced by gem5::Gicv3Redistributor::init(), gem5::ArmISA::FsFreebsd::initState(), gem5::ArmISA::FsLinux::initState(), gem5::ArmISA::FsWorkload::initState(), gem5::KernelWorkload::initState(), gem5::RiscvISA::BareMetal::initState(), gem5::RiscvISA::FsLinux::initState(), gem5::RiscvISA::BootloaderKernelWorkload::loadBootloader(), gem5::RiscvISA::BootloaderKernelWorkload::loadDtb(), gem5::RiscvISA::BootloaderKernelWorkload::loadKernel(), gem5::MultiLevelPageTable< EntryTypes >::map(), gem5::SimpleDisk::read(), gem5::MultiLevelPageTable< EntryTypes >::remap(), and gem5::MultiLevelPageTable< EntryTypes >::unmap().
std::set<int> gem5::System::PIDs |
Process set to track which PIDs have already been allocated.
Definition at line 603 of file system.hh.
Referenced by gem5::Process::Process().
std::vector<RedirectPath*> gem5::System::redirectPaths |
Definition at line 612 of file system.hh.
Referenced by gem5::Process::checkPathRedirect().
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This array is a per-system list of all devices capable of issuing a memory system request and an associated string for each requestor id.
It's used to uniquely id any requestor in the system by name for things like cache statistics.
Definition at line 419 of file system.hh.
Referenced by _getRequestorId(), getRequestorName(), lookupRequestorId(), lookupRequestorId(), and maxRequestors().
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Definition at line 404 of file system.hh.
Referenced by getShadowRomRanges().
std::list<BasicSignal> gem5::System::signalList |
Definition at line 607 of file system.hh.
Referenced by gem5::exitImpl(), gem5::pollFunc(), gem5::selectFunc(), and gem5::wait4Func().
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Definition at line 593 of file system.hh.
Referenced by gem5::exitImpl(), printSystems(), and System().
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Definition at line 421 of file system.hh.
Referenced by getThermalModel().
Threads gem5::System::threads |
Definition at line 310 of file system.hh.
Referenced by gem5::ArmProcess::argsInit(), gem5::MipsProcess::argsInit(), gem5::PowerProcess::argsInit(), gem5::RiscvProcess::argsInit(), gem5::SparcProcess::argsInit(), gem5::X86ISA::X86Process::argsInit(), gem5::Gicv3CPUInterface::assertWakeRequest(), gem5::ArmISA::TLBIOp::broadcast(), gem5::memory::AbstractMemory::checkLockedAddrList(), gem5::GicV2Registers::clearBankedDistRange(), gem5::GicV2::clearInt(), gem5::MaltaCChip::clearIntr(), gem5::KvmVM::contextIdToVCpuId(), gem5::GicV2Registers::copyBankedDistRange(), gem5::GicV2::copyGicState(), gem5::Linux::cpuOnline(), gem5::GenericTimer::createTimers(), gem5::Gicv3::deassertAll(), gem5::Gicv3::deassertInt(), gem5::Gicv3CPUInterface::deassertWakeRequest(), gem5::doClone(), gem5::SparcISA::TLB::doMmuRegWrite(), gem5::ArmISA::FsLinux::dumpDmesg(), gem5::exitImpl(), gem5::MemState::fixupFault(), gem5::GPUCommandProcessor::functionalReadHsaSignal(), gem5::Iob::generateIpi(), gem5::GicV2::genSwiMask(), gem5::Gicv3Redistributor::getAffinity(), gem5::getrlimitFunc(), gem5::FVPBasePwrCtrl::getThreadContextByMPID(), gem5::Gicv3::haveAsserted(), gem5::CpuLocalTimer::init(), gem5::Gicv3::init(), gem5::ArmISA::FsFreebsd::initState(), gem5::ArmISA::FsLinux::initState(), gem5::ArmISA::FsWorkload::initState(), gem5::PowerProcess::initState(), gem5::Process::initState(), gem5::RiscvISA::BareMetal::initState(), gem5::RiscvISA::BootloaderKernelWorkload::initState(), gem5::RiscvISA::FsLinux::initState(), gem5::SparcISA::FsWorkload::initState(), gem5::SparcProcess::initState(), gem5::X86ISA::BareMetalWorkload::initState(), gem5::prefetch::Queued::insert(), gem5::o3::CPU::insertThread(), gem5::RiscvISA::BootloaderKernelWorkload::loadDtb(), gem5::LupioIPI::lupioIPIUpdateIRQ(), gem5::LupioPIC::lupioPicUpdateIRQ(), markWorkItem(), gem5::GicV2::postDelayedFiq(), gem5::GicV2::postDelayedInt(), gem5::Gicv3::postInt(), gem5::MaltaCChip::postIntr(), gem5::FVPBasePwrCtrl::powerCoreOn(), gem5::DistIface::SyncEvent::process(), gem5::ThreadContext::quiesce(), gem5::ThreadContext::quiesceTick(), gem5::Clint::raiseInterruptPin(), gem5::A9SCU::read(), gem5::Gicv3Redistributor::read(), gem5::GicV2::readCpu(), gem5::GicV2::readDistributor(), gem5::SparcISA::ISA::readFSReg(), gem5::ArmISA::ISA::readMiscReg(), gem5::Clint::readMSIP(), gem5::Iob::receiveDeviceInterrupt(), gem5::Iob::receiveJBusInterrupt(), registerThreadContext(), gem5::MemState::remapRegion(), remove(), replaceThreadContext(), gem5::schedGetaffinityFunc(), schedule(), gem5::HSAPacketProcessor::sendAgentDispatchCompletionSignal(), gem5::HSAPacketProcessor::sendCompletionSignal(), gem5::CpuLocalTimer::serialize(), serialize(), gem5::setpgidFunc(), gem5::GicV2::softInt(), gem5::ArmISA::FsLinux::startup(), gem5::FVPBasePwrCtrl::startup(), gem5::GPUCommandProcessor::submitDispatchPkt(), gem5::tgkillFunc(), gem5::DistIface::toggleSync(), gem5::GPUCommandProcessor::translate(), gem5::HSAPacketProcessor::translate(), gem5::MemState::unmapRegion(), gem5::CpuLocalTimer::unserialize(), gem5::GenericTimer::unserialize(), unserialize(), gem5::GPUCommandProcessor::updateHsaSignal(), gem5::Plic::updateInt(), gem5::GicV2::updateIntState(), gem5::VGic::updateIntState(), gem5::LupioTMR::updateIRQ(), gem5::GicV2::updateRunPri(), gem5::KvmVM::validEnvironment(), gem5::VGic::VGic(), gem5::pseudo_inst::wakeCPU(), gem5::FVPBasePwrCtrl::write(), and gem5::Clint::writeMSIP().
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Definition at line 410 of file system.hh.
Referenced by incWorkItemsBegin().
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Definition at line 411 of file system.hh.
Referenced by incWorkItemsEnd().
std::map<uint32_t, statistics::Histogram*> gem5::System::workItemStats |
Definition at line 585 of file system.hh.
Referenced by regStats(), workItemEnd(), and ~System().
Workload* gem5::System::workload = nullptr |
OS kernel.
Definition at line 326 of file system.hh.
Referenced by gem5::pseudo_inst::addsymbol(), gem5::pseudo_inst::arm(), gem5::ArmSystem::ArmSystem(), gem5::BaseStackTrace::dump(), gem5::linux::dumpDmesg(), gem5::RiscvISA::SystemOp::executeEBreakOrSemihosting(), gem5::linux::ThreadInfo::get_data(), getGuestByteOrder(), gem5::ArmISA::SupervisorCall::invoke(), gem5::RiscvISA::Reset::invoke(), gem5::SESyscallFault::invoke(), gem5::SparcISA::TrapInstruction::invoke(), gem5::RiscvISA::SyscallFault::invokeSE(), gem5::pseudo_inst::loadsymbol(), gem5::ArmISA::DumpStats::process(), registerThreadContext(), replaceThreadContext(), gem5::SparcISA::ISA::setFSReg(), System(), trapToGdb(), and gem5::pseudo_inst::triggerWorkloadEvent().