gem5  v21.2.0.0
system.hh
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41 
42 #ifndef __SYSTEM_HH__
43 #define __SYSTEM_HH__
44 
45 #include <set>
46 #include <string>
47 #include <unordered_map>
48 #include <utility>
49 #include <vector>
50 
52 #include "base/loader/symtab.hh"
53 #include "base/statistics.hh"
54 #include "config/the_isa.hh"
55 #include "cpu/pc_event.hh"
56 #include "enums/MemoryMode.hh"
57 #include "mem/mem_requestor.hh"
58 #include "mem/physical.hh"
59 #include "mem/port.hh"
60 #include "mem/port_proxy.hh"
61 #include "params/System.hh"
62 #include "sim/futex_map.hh"
63 #include "sim/redirect_path.hh"
64 #include "sim/se_signal.hh"
65 #include "sim/sim_object.hh"
66 #include "sim/workload.hh"
67 
68 namespace gem5
69 {
70 
71 class BaseRemoteGDB;
72 class KvmVM;
73 class ThreadContext;
74 
75 class System : public SimObject, public PCEventScope
76 {
77  private:
78 
84  class SystemPort : public RequestPort
85  {
86  public:
87 
91  SystemPort(const std::string &_name, SimObject *_owner)
92  : RequestPort(_name, _owner)
93  { }
94 
95  bool
96  recvTimingResp(PacketPtr pkt) override
97  {
98  panic("SystemPort does not receive timing!");
99  }
100 
101  void
102  recvReqRetry() override
103  {
104  panic("SystemPort does not expect retry!");
105  }
106  };
107 
110 
111  // Map of memory address ranges for devices with their own backing stores
112  std::unordered_map<RequestorID, std::vector<memory::AbstractMemory *>>
114 
115  public:
116 
117  class Threads
118  {
119  private:
120  struct Thread
121  {
122  ThreadContext *context = nullptr;
123  bool active = false;
124  Event *resumeEvent = nullptr;
125 
126  void resume();
127  std::string name() const;
128  void quiesce() const;
129  };
130 
132 
133  Thread &
135  {
136  assert(id < size());
137  return threads[id];
138  }
139 
140  const Thread &
141  thread(ContextID id) const
142  {
143  assert(id < size());
144  return threads[id];
145  }
146 
148  void replace(ThreadContext *tc, ContextID id);
149 
150  friend class System;
151 
152  public:
154  {
155  private:
156  const Threads &threads;
157  int pos;
158 
159  friend class Threads;
160 
161  const_iterator(const Threads &_threads, int _pos) :
162  threads(_threads), pos(_pos)
163  {}
164 
165  public:
166  const_iterator(const const_iterator &) = default;
167  const_iterator &operator = (const const_iterator &) = default;
168 
169  using iterator_category = std::forward_iterator_tag;
171  using difference_type = int;
172  using pointer = const value_type *;
173  using reference = const value_type &;
174 
177  {
178  pos++;
179  return *this;
180  }
181 
184  {
185  return const_iterator(threads, pos++);
186  }
187 
190 
191  bool
192  operator == (const const_iterator &other) const
193  {
194  return &threads == &other.threads && pos == other.pos;
195  }
196 
197  bool
198  operator != (const const_iterator &other) const
199  {
200  return !(*this == other);
201  }
202  };
203 
205 
206  ThreadContext *
208  {
209  return thread(id).context;
210  }
211 
212  void markActive(ContextID id) { thread(id).active = true; }
213 
214  int size() const { return threads.size(); }
215  bool empty() const { return threads.empty(); }
216  int numRunning() const;
217  int
218  numActive() const
219  {
220  int count = 0;
221  for (auto &thread: threads) {
222  if (thread.active)
223  count++;
224  }
225  return count;
226  }
227 
228  void quiesce(ContextID id);
229  void quiesceTick(ContextID id, Tick when);
230 
231  const_iterator begin() const { return const_iterator(*this, 0); }
232  const_iterator end() const { return const_iterator(*this, size()); }
233  };
234 
244 
248  Port &getPort(const std::string &if_name,
249  PortID idx=InvalidPortID) override;
250 
261  bool
262  isAtomicMode() const
263  {
264  return memoryMode == enums::atomic ||
265  memoryMode == enums::atomic_noncaching;
266  }
267 
274  bool isTimingMode() const { return memoryMode == enums::timing; }
275 
282  bool
283  bypassCaches() const
284  {
285  return memoryMode == enums::atomic_noncaching;
286  }
297  enums::MemoryMode getMemoryMode() const { return memoryMode; }
298 
306  void setMemoryMode(enums::MemoryMode mode);
312  unsigned int cacheLineSize() const { return _cacheLineSize; }
313 
315 
316  const bool multiThread;
317 
318  using SimObject::schedule;
319 
320  bool schedule(PCEvent *event) override;
321  bool remove(PCEvent *event) override;
322 
323  uint64_t init_param;
324 
328 
330  Workload *workload = nullptr;
331 
332  public:
337  KvmVM *getKvmVM() { return kvmVM; }
338 
340  bool validKvmEnvironment() const;
341 
344  const memory::PhysicalMemory& getPhysMem() const { return physmem; }
345 
347  Addr memSize() const;
348 
356  bool isMemAddr(Addr addr) const;
357 
363  void addDeviceMemory(RequestorID requestorId,
364  memory::AbstractMemory *deviceMemory);
365 
371  bool isDeviceMemAddr(const PacketPtr& pkt) const;
372 
377 
378  /*
379  * Return the list of address ranges backed by a shadowed ROM.
380  *
381  * @return List of address ranges backed by a shadowed ROM
382  */
384 
388  ByteOrder
390  {
391  return workload->byteOrder();
392  }
393 
398 
399  protected:
400 
401  KvmVM *const kvmVM = nullptr;
402 
404 
406 
407  enums::MemoryMode memoryMode;
408 
409  const unsigned int _cacheLineSize;
410 
411  uint64_t workItemsBegin = 0;
412  uint64_t workItemsEnd = 0;
413  uint32_t numWorkIds;
414 
421 
423 
424  protected:
428  std::string stripSystemName(const std::string& requestor_name) const;
429 
430  public:
431 
465  RequestorID getRequestorId(const SimObject* requestor,
466  std::string subrequestor={});
467 
476  RequestorID getGlobalRequestorId(const std::string& requestor_name);
477 
481  std::string getRequestorName(RequestorID requestor_id);
482 
487  RequestorID lookupRequestorId(const SimObject* obj) const;
488 
493  RequestorID lookupRequestorId(const std::string& name) const;
494 
496  RequestorID maxRequestors() { return requestors.size(); }
497 
498  protected:
500  RequestorID _getRequestorId(const SimObject* requestor,
501  const std::string& requestor_name);
502 
507  std::string leafRequestorName(const SimObject* requestor,
508  const std::string& subrequestor);
509 
510  public:
511 
512  void regStats() override;
517  uint64_t
519  {
520  return ++workItemsBegin;
521  }
522 
527  uint64_t
529  {
530  return ++workItemsEnd;
531  }
532 
538  int
540  {
542  return threads.numActive();
543  }
544 
545  void
546  workItemBegin(uint32_t tid, uint32_t workid)
547  {
548  std::pair<uint32_t, uint32_t> p(tid, workid);
550  }
551 
552  void workItemEnd(uint32_t tid, uint32_t workid);
553 
554  /* Returns whether we successfully trapped into GDB. */
555  bool trapToGdb(int signal, ContextID ctx_id) const;
556 
557  protected:
563 
564  public:
565  PARAMS(System);
566 
567  System(const Params &p);
568  ~System();
569 
574  const AddrRange &m5opRange() const { return _m5opRange; }
575 
576  public:
577 
580  void replaceThreadContext(ThreadContext *tc, ContextID context_id);
581 
582  void serialize(CheckpointOut &cp) const override;
583  void unserialize(CheckpointIn &cp) override;
584 
585  public:
586  std::map<std::pair<uint32_t, uint32_t>, Tick> lastWorkItemStarted;
587  std::map<uint32_t, statistics::Histogram*> workItemStats;
588 
590  //
591  // STATIC GLOBAL SYSTEM LIST
592  //
594 
596  static int numSystemsRunning;
597 
598  static void printSystems();
599 
601 
602  static const int maxPID = 32768;
603 
605  std::set<int> PIDs;
606 
607  // By convention, all signals are owned by the receiving process. The
608  // receiver will delete the signal upon reception.
610 
611  // Used by syscall-emulation mode. This member contains paths which need
612  // to be redirected to the faux-filesystem (a duplicate filesystem
613  // intended to replace certain files on the host filesystem).
615 };
616 
617 void printSystems();
618 
619 } // namespace gem5
620 
621 #endif // __SYSTEM_HH__
gem5::System::Threads::numActive
int numActive() const
Definition: system.hh:218
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::System::Threads::const_iterator::operator*
reference operator*()
Definition: system.hh:188
gem5::System::addDeviceMemory
void addDeviceMemory(RequestorID requestorId, memory::AbstractMemory *deviceMemory)
Add a physical memory range for a device.
Definition: system.cc:350
gem5::System::Threads::thread
const Thread & thread(ContextID id) const
Definition: system.hh:141
gem5::System::lastWorkItemStarted
std::map< std::pair< uint32_t, uint32_t >, Tick > lastWorkItemStarted
Definition: system.hh:586
gem5::System::SystemPort::recvTimingResp
bool recvTimingResp(PacketPtr pkt) override
Receive a timing response from the peer.
Definition: system.hh:96
gem5::System::PIDs
std::set< int > PIDs
Process set to track which PIDs have already been allocated.
Definition: system.hh:605
gem5::System::Threads::size
int size() const
Definition: system.hh:214
gem5::System::Threads::const_iterator::const_iterator
const_iterator(const Threads &_threads, int _pos)
Definition: system.hh:161
gem5::System::workItemEnd
void workItemEnd(uint32_t tid, uint32_t workid)
Definition: system.cc:435
gem5::System::Threads::const_iterator
Definition: system.hh:153
gem5::System::lookupRequestorId
RequestorID lookupRequestorId(const SimObject *obj) const
Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if n...
Definition: system.cc:490
gem5::System::numWorkIds
uint32_t numWorkIds
Definition: system.hh:413
gem5::System::Threads::Thread::resume
void resume()
Definition: system.cc:79
gem5::System::workItemsEnd
uint64_t workItemsEnd
Definition: system.hh:412
gem5::System::liveEvents
std::list< PCEvent * > liveEvents
Definition: system.hh:108
gem5::System::Threads::Thread::context
ThreadContext * context
Definition: system.hh:122
gem5::MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:47
gem5::System::getSystemPort
RequestPort & getSystemPort()
Get a reference to the system port that can be used by non-structural simulation objects like process...
Definition: system.hh:243
gem5::System::physProxy
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition: system.hh:327
gem5::memory::PhysicalMemory
The physical memory encapsulates all memories in the system and provides basic functionality for acce...
Definition: physical.hh:122
gem5::System::Threads::const_iterator::difference_type
int difference_type
Definition: system.hh:171
gem5::System::futexMap
FutexMap futexMap
Definition: system.hh:600
gem5::System::schedule
bool schedule(PCEvent *event) override
Definition: system.cc:286
gem5::InvalidContextID
const ContextID InvalidContextID
Definition: types.hh:247
gem5::System::Threads::quiesce
void quiesce(ContextID id)
Definition: system.cc:170
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::ThermalModel
Definition: thermal_model.hh:144
gem5::System::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Additional function to return the Port of a memory object.
Definition: system.cc:261
gem5::MipsISA::event
Bitfield< 10, 5 > event
Definition: pra_constants.hh:300
gem5::System::isAtomicMode
bool isAtomicMode() const
Is the system in atomic mode?
Definition: system.hh:262
gem5::System::incWorkItemsEnd
uint64_t incWorkItemsEnd()
Called by pseudo_inst to track the number of work items completed by this system.
Definition: system.hh:528
gem5::System::bypassCaches
bool bypassCaches() const
Should caches be bypassed?
Definition: system.hh:283
redirect_path.hh
gem5::System::workItemStats
std::map< uint32_t, statistics::Histogram * > workItemStats
Definition: system.hh:587
gem5::System::getShadowRomRanges
AddrRangeList getShadowRomRanges() const
Definition: system.hh:383
futex_map.hh
gem5::System::workload
Workload * workload
OS kernel.
Definition: system.hh:330
gem5::System::Threads::replace
void replace(ThreadContext *tc, ContextID id)
Definition: system.cc:131
gem5::System::Threads::end
const_iterator end() const
Definition: system.hh:232
gem5::System::setMemoryMode
void setMemoryMode(enums::MemoryMode mode)
Change the memory mode of the system.
Definition: system.cc:268
gem5::EventManager::schedule
void schedule(Event &event, Tick when)
Definition: eventq.hh:1019
gem5::System::Threads::const_iterator::iterator_category
std::forward_iterator_tag iterator_category
Definition: system.hh:169
gem5::System::numSystemsRunning
static int numSystemsRunning
Definition: system.hh:596
std::vector
STL vector class.
Definition: stl.hh:37
gem5::System::System
System(const Params &p)
Definition: system.cc:196
gem5::System::getThermalModel
ThermalModel * getThermalModel() const
The thermal model used for this system (if any).
Definition: system.hh:397
workload.hh
gem5::System::regStats
void regStats() override
Callback to set stat parameters.
Definition: system.cc:419
gem5::System::getDeviceMemory
memory::AbstractMemory * getDeviceMemory(const PacketPtr &pkt) const
Return a pointer to the device memory.
Definition: system.cc:367
gem5::System::getGuestByteOrder
ByteOrder getGuestByteOrder() const
Get the guest byte order.
Definition: system.hh:389
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::KvmVM
KVM VM container.
Definition: vm.hh:297
gem5::System::_getRequestorId
RequestorID _getRequestorId(const SimObject *requestor, const std::string &requestor_name)
helper function for getRequestorId
Definition: system.cc:540
gem5::System::cacheLineSize
unsigned int cacheLineSize() const
Get the cache line size of the system.
Definition: system.hh:312
gem5::RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:77
gem5::System::stripSystemName
std::string stripSystemName(const std::string &requestor_name) const
Strips off the system name from a requestor name.
Definition: system.cc:480
gem5::System::Threads::const_iterator::operator++
const_iterator & operator++()
Definition: system.hh:176
gem5::System::Threads::quiesceTick
void quiesceTick(ContextID id, Tick when)
Definition: system.cc:181
gem5::System::requestors
std::vector< RequestorInfo > requestors
This array is a per-system list of all devices capable of issuing a memory system request and an asso...
Definition: system.hh:420
gem5::System::getPhysMem
const memory::PhysicalMemory & getPhysMem() const
Definition: system.hh:344
gem5::System::Threads::empty
bool empty() const
Definition: system.hh:215
gem5::ArmISA::atomic
Bitfield< 23, 20 > atomic
Definition: misc_types.hh:100
gem5::SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:170
gem5::System::redirectPaths
std::vector< RedirectPath * > redirectPaths
Definition: system.hh:614
gem5::System::Threads::threads
std::vector< Thread > threads
Definition: system.hh:131
gem5::System::_systemPort
SystemPort _systemPort
Definition: system.hh:109
gem5::System::deviceMemMap
std::unordered_map< RequestorID, std::vector< memory::AbstractMemory * > > deviceMemMap
Definition: system.hh:113
gem5::System::workItemsBegin
uint64_t workItemsBegin
Definition: system.hh:411
gem5::System::Threads::Thread::resumeEvent
Event * resumeEvent
Definition: system.hh:124
gem5::System::incWorkItemsBegin
uint64_t incWorkItemsBegin()
Called by pseudo_inst to track the number of work items started by this system.
Definition: system.hh:518
gem5::FutexMap
FutexMap class holds a map of all futexes used in the system.
Definition: futex_map.hh:109
gem5::System::maxRequestors
RequestorID maxRequestors()
Get the number of requestors registered in the system.
Definition: system.hh:496
gem5::System
Definition: system.hh:75
gem5::System::signalList
std::list< BasicSignal > signalList
Definition: system.hh:609
gem5::System::kvmVM
KvmVM *const kvmVM
Definition: system.hh:401
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:94
gem5::System::isMemAddr
bool isMemAddr(Addr addr) const
Check if a physical address is within a range of a memory that is part of the global address map.
Definition: system.cc:344
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::System::physmem
memory::PhysicalMemory physmem
Definition: system.hh:403
sim_object.hh
gem5::System::getKvmVM
KvmVM * getKvmVM()
Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present.
Definition: system.hh:337
gem5::Event
Definition: eventq.hh:251
gem5::System::PARAMS
PARAMS(System)
gem5::System::systemList
static std::vector< System * > systemList
Definition: system.hh:595
gem5::X86ISA::count
count
Definition: misc.hh:709
gem5::System::Threads::operator[]
ThreadContext * operator[](ContextID id) const
Definition: system.hh:207
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
statistics.hh
gem5::memory::AbstractMemory
An abstract memory represents a contiguous block of physical memory, with an associated address range...
Definition: abstract_mem.hh:110
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::PCEvent
Definition: pc_event.hh:45
gem5::System::Threads::const_iterator::operator->
pointer operator->()
Definition: system.hh:189
gem5::System::getRequestorName
std::string getRequestorName(RequestorID requestor_id)
Get the name of an object for a given request id.
Definition: system.cc:584
port_proxy.hh
gem5::Workload
Definition: workload.hh:49
gem5::System::getGlobalRequestorId
RequestorID getGlobalRequestorId(const std::string &requestor_name)
Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since...
Definition: system.cc:527
gem5::System::Threads::const_iterator::operator==
bool operator==(const const_iterator &other) const
Definition: system.hh:192
gem5::PortProxy
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition: port_proxy.hh:86
port.hh
gem5::System::Threads::const_iterator::operator=
const_iterator & operator=(const const_iterator &)=default
gem5::System::getMemoryMode
enums::MemoryMode getMemoryMode() const
Get the memory mode of the system.
Definition: system.hh:297
gem5::System::getRequestorId
RequestorID getRequestorId(const SimObject *requestor, std::string subrequestor={})
Request an id used to create a request object in the system.
Definition: system.cc:533
gem5::System::SystemPort
Private class for the system port which is only used as a requestor for debug access and for non-stru...
Definition: system.hh:84
gem5::System::memSize
Addr memSize() const
Amount of physical memory that exists.
Definition: system.cc:338
gem5::System::SystemPort::recvReqRetry
void recvReqRetry() override
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
Definition: system.hh:102
gem5::System::memoryMode
enums::MemoryMode memoryMode
Definition: system.hh:407
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::System::isTimingMode
bool isTimingMode() const
Is the system in timing mode?
Definition: system.hh:274
gem5::System::Threads::Thread::quiesce
void quiesce() const
Definition: system.cc:96
std::pair
STL pair class.
Definition: stl.hh:58
gem5::System::SystemPort::SystemPort
SystemPort(const std::string &_name, SimObject *_owner)
Create a system port with a name and an owner.
Definition: system.hh:91
gem5::System::Threads::begin
const_iterator begin() const
Definition: system.hh:231
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::System::remove
bool remove(PCEvent *event) override
Definition: system.cc:296
gem5::System::maxPID
static const int maxPID
Definition: system.hh:602
gem5::System::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: system.cc:400
gem5::System::leafRequestorName
std::string leafRequestorName(const SimObject *requestor, const std::string &subrequestor)
Helper function for constructing the full (sub)requestor name by providing the root requestor and the...
Definition: system.cc:571
gem5::System::trapToGdb
bool trapToGdb(int signal, ContextID ctx_id) const
Definition: system.cc:452
gem5::System::multiThread
const bool multiThread
Definition: system.hh:316
gem5::System::isDeviceMemAddr
bool isDeviceMemAddr(const PacketPtr &pkt) const
Similar to isMemAddr but for devices.
Definition: system.cc:357
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::System::Threads::Thread::active
bool active
Definition: system.hh:123
pc_event.hh
gem5::System::threads
Threads threads
Definition: system.hh:314
gem5::System::ShadowRomRanges
AddrRangeList ShadowRomRanges
Definition: system.hh:405
se_signal.hh
gem5::System::init_param
uint64_t init_param
Definition: system.hh:323
gem5::System::Threads::const_iterator::pos
int pos
Definition: system.hh:157
gem5::System::Threads::thread
Thread & thread(ContextID id)
Definition: system.hh:134
gem5::System::m5opRange
const AddrRange & m5opRange() const
Range used by memory-mapped m5 pseudo-ops if enabled.
Definition: system.hh:574
physical.hh
gem5::System::Threads::Thread::name
std::string name() const
Definition: system.cc:88
gem5::ContextID
int ContextID
Globally unique thread context ID.
Definition: types.hh:246
gem5::System::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: system.cc:384
mem_requestor.hh
gem5::System::_m5opRange
const AddrRange _m5opRange
Range for memory-mapped m5 pseudo ops.
Definition: system.hh:562
gem5::System::printSystems
static void printSystems()
Definition: system.cc:458
gem5::System::markWorkItem
int markWorkItem(int index)
Called by pseudo_inst to mark the cpus actively executing work items.
Definition: system.hh:539
gem5::ArmISA::id
Bitfield< 33 > id
Definition: misc_types.hh:251
gem5::System::validKvmEnvironment
bool validKvmEnvironment() const
Verify gem5 configuration will support KVM emulation.
Definition: system.cc:320
gem5::System::Threads::const_iterator::operator!=
bool operator!=(const const_iterator &other) const
Definition: system.hh:198
gem5::System::registerThreadContext
void registerThreadContext(ThreadContext *tc, ContextID assigned=InvalidContextID)
Definition: system.cc:275
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::System::replaceThreadContext
void replaceThreadContext(ThreadContext *tc, ContextID context_id)
Definition: system.cc:306
gem5::printSystems
void printSystems()
Definition: system.cc:474
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
gem5::System::Threads::insert
void insert(ThreadContext *tc, ContextID id=InvalidContextID)
Definition: system.cc:103
symtab.hh
gem5::System::getPhysMem
memory::PhysicalMemory & getPhysMem()
Get a pointer to access the physical memory of the system.
Definition: system.hh:343
gem5::System::Threads
Definition: system.hh:117
gem5::AddrRange
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:81
std::list
STL list class.
Definition: stl.hh:51
gem5::System::~System
~System()
Definition: system.cc:254
gem5::System::Threads::findFree
ThreadContext * findFree()
Definition: system.cc:146
gem5::System::workItemBegin
void workItemBegin(uint32_t tid, uint32_t workid)
Definition: system.hh:546
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::System::Threads::markActive
void markActive(ContextID id)
Definition: system.hh:212
gem5::System::Threads::Thread
Definition: system.hh:120
memory_image.hh
gem5::System::Threads::numRunning
int numRunning() const
Definition: system.cc:156
gem5::System::Threads::const_iterator::threads
const Threads & threads
Definition: system.hh:156
gem5::PCEventScope
Definition: pc_event.hh:67
gem5::System::_cacheLineSize
const unsigned int _cacheLineSize
Definition: system.hh:409
gem5::Named::_name
const std::string _name
Definition: named.hh:41
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::System::thermalModel
ThermalModel * thermalModel
Definition: system.hh:422
gem5::Workload::byteOrder
virtual ByteOrder byteOrder() const =0

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