gem5  v21.1.0.2
system.hh
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41 
42 #ifndef __SYSTEM_HH__
43 #define __SYSTEM_HH__
44 
45 #include <set>
46 #include <string>
47 #include <unordered_map>
48 #include <utility>
49 #include <vector>
50 
51 #include "arch/page_size.hh"
53 #include "base/loader/symtab.hh"
54 #include "base/statistics.hh"
55 #include "config/the_isa.hh"
56 #include "cpu/pc_event.hh"
57 #include "enums/MemoryMode.hh"
58 #include "mem/mem_requestor.hh"
59 #include "mem/physical.hh"
60 #include "mem/port.hh"
61 #include "mem/port_proxy.hh"
62 #include "params/System.hh"
63 #include "sim/futex_map.hh"
64 #include "sim/mem_pool.hh"
65 #include "sim/redirect_path.hh"
66 #include "sim/se_signal.hh"
67 #include "sim/sim_object.hh"
68 #include "sim/workload.hh"
69 
70 namespace gem5
71 {
72 
73 class BaseRemoteGDB;
74 class KvmVM;
75 class ThreadContext;
76 
77 class System : public SimObject, public PCEventScope
78 {
79  private:
80 
86  class SystemPort : public RequestPort
87  {
88  public:
89 
93  SystemPort(const std::string &_name, SimObject *_owner)
94  : RequestPort(_name, _owner)
95  { }
96 
97  bool
98  recvTimingResp(PacketPtr pkt) override
99  {
100  panic("SystemPort does not receive timing!");
101  }
102 
103  void
104  recvReqRetry() override
105  {
106  panic("SystemPort does not expect retry!");
107  }
108  };
109 
112 
113  // Map of memory address ranges for devices with their own backing stores
114  std::unordered_map<RequestorID, std::vector<memory::AbstractMemory *>>
116 
117  public:
118 
119  class Threads
120  {
121  private:
122  struct Thread
123  {
124  ThreadContext *context = nullptr;
125  bool active = false;
126  Event *resumeEvent = nullptr;
127 
128  void resume();
129  std::string name() const;
130  void quiesce() const;
131  };
132 
134 
135  Thread &
137  {
138  assert(id < size());
139  return threads[id];
140  }
141 
142  const Thread &
143  thread(ContextID id) const
144  {
145  assert(id < size());
146  return threads[id];
147  }
148 
150  void replace(ThreadContext *tc, ContextID id);
151 
152  friend class System;
153 
154  public:
156  {
157  private:
158  const Threads &threads;
159  int pos;
160 
161  friend class Threads;
162 
163  const_iterator(const Threads &_threads, int _pos) :
164  threads(_threads), pos(_pos)
165  {}
166 
167  public:
168  const_iterator(const const_iterator &) = default;
169  const_iterator &operator = (const const_iterator &) = default;
170 
171  using iterator_category = std::forward_iterator_tag;
173  using difference_type = int;
174  using pointer = const value_type *;
175  using reference = const value_type &;
176 
179  {
180  pos++;
181  return *this;
182  }
183 
186  {
187  return const_iterator(threads, pos++);
188  }
189 
192 
193  bool
194  operator == (const const_iterator &other) const
195  {
196  return &threads == &other.threads && pos == other.pos;
197  }
198 
199  bool
200  operator != (const const_iterator &other) const
201  {
202  return !(*this == other);
203  }
204  };
205 
207 
208  ThreadContext *
210  {
211  return thread(id).context;
212  }
213 
214  void markActive(ContextID id) { thread(id).active = true; }
215 
216  int size() const { return threads.size(); }
217  bool empty() const { return threads.empty(); }
218  int numRunning() const;
219  int
220  numActive() const
221  {
222  int count = 0;
223  for (auto &thread: threads) {
224  if (thread.active)
225  count++;
226  }
227  return count;
228  }
229 
230  void quiesce(ContextID id);
231  void quiesceTick(ContextID id, Tick when);
232 
233  const_iterator begin() const { return const_iterator(*this, 0); }
234  const_iterator end() const { return const_iterator(*this, size()); }
235  };
236 
246 
250  Port &getPort(const std::string &if_name,
251  PortID idx=InvalidPortID) override;
252 
263  bool
264  isAtomicMode() const
265  {
266  return memoryMode == enums::atomic ||
267  memoryMode == enums::atomic_noncaching;
268  }
269 
276  bool isTimingMode() const { return memoryMode == enums::timing; }
277 
284  bool
285  bypassCaches() const
286  {
287  return memoryMode == enums::atomic_noncaching;
288  }
299  enums::MemoryMode getMemoryMode() const { return memoryMode; }
300 
308  void setMemoryMode(enums::MemoryMode mode);
314  unsigned int cacheLineSize() const { return _cacheLineSize; }
315 
317 
318  const bool multiThread;
319 
320  using SimObject::schedule;
321 
322  bool schedule(PCEvent *event) override;
323  bool remove(PCEvent *event) override;
324 
327 
328  uint64_t init_param;
329 
333 
335  Workload *workload = nullptr;
336 
337  public:
342  KvmVM *getKvmVM() { return kvmVM; }
343 
345  bool validKvmEnvironment() const;
346 
349 
351  Addr freeMemSize(int poolID = 0) const;
352 
354  Addr memSize(int poolID = 0) const;
355 
363  bool isMemAddr(Addr addr) const;
364 
370  void addDeviceMemory(RequestorID requestorId,
371  memory::AbstractMemory *deviceMemory);
372 
378  bool isDeviceMemAddr(const PacketPtr& pkt) const;
379 
384 
385  /*
386  * Return the list of address ranges backed by a shadowed ROM.
387  *
388  * @return List of address ranges backed by a shadowed ROM
389  */
391 
395  Arch getArch() const { return Arch::TheISA; }
396 
400  ByteOrder
402  {
403  return params().byte_order;
404  }
405 
409  Addr getPageBytes() const { return TheISA::PageBytes; }
410 
414  Addr getPageShift() const { return TheISA::PageShift; }
415 
420 
421  protected:
422 
423  KvmVM *const kvmVM = nullptr;
424 
426 
428 
429  enums::MemoryMode memoryMode;
430 
431  const unsigned int _cacheLineSize;
432 
433  uint64_t workItemsBegin = 0;
434  uint64_t workItemsEnd = 0;
435  uint32_t numWorkIds;
436 
443 
445 
446  protected:
450  std::string stripSystemName(const std::string& requestor_name) const;
451 
452  public:
453 
487  RequestorID getRequestorId(const SimObject* requestor,
488  std::string subrequestor={});
489 
498  RequestorID getGlobalRequestorId(const std::string& requestor_name);
499 
503  std::string getRequestorName(RequestorID requestor_id);
504 
509  RequestorID lookupRequestorId(const SimObject* obj) const;
510 
515  RequestorID lookupRequestorId(const std::string& name) const;
516 
518  RequestorID maxRequestors() { return requestors.size(); }
519 
520  protected:
522  RequestorID _getRequestorId(const SimObject* requestor,
523  const std::string& requestor_name);
524 
529  std::string leafRequestorName(const SimObject* requestor,
530  const std::string& subrequestor);
531 
532  public:
533 
534  void regStats() override;
539  uint64_t
541  {
542  return ++workItemsBegin;
543  }
544 
549  uint64_t
551  {
552  return ++workItemsEnd;
553  }
554 
560  int
562  {
564  return threads.numActive();
565  }
566 
567  void
568  workItemBegin(uint32_t tid, uint32_t workid)
569  {
570  std::pair<uint32_t, uint32_t> p(tid, workid);
572  }
573 
574  void workItemEnd(uint32_t tid, uint32_t workid);
575 
576  /* Returns whether we successfully trapped into GDB. */
577  bool trapToGdb(int signal, ContextID ctx_id) const;
578 
579  protected:
585 
586  public:
587  PARAMS(System);
588 
589  System(const Params &p);
590  ~System();
591 
596  const AddrRange &m5opRange() const { return _m5opRange; }
597 
598  public:
599 
602  Addr allocPhysPages(int npages, int poolID = 0);
603 
606  void replaceThreadContext(ThreadContext *tc, ContextID context_id);
607 
608  void serialize(CheckpointOut &cp) const override;
609  void unserialize(CheckpointIn &cp) override;
610 
611  public:
612  std::map<std::pair<uint32_t, uint32_t>, Tick> lastWorkItemStarted;
613  std::map<uint32_t, statistics::Histogram*> workItemStats;
614 
616  //
617  // STATIC GLOBAL SYSTEM LIST
618  //
620 
622  static int numSystemsRunning;
623 
624  static void printSystems();
625 
627 
628  static const int maxPID = 32768;
629 
631  std::set<int> PIDs;
632 
633  // By convention, all signals are owned by the receiving process. The
634  // receiver will delete the signal upon reception.
636 
637  // Used by syscall-emulation mode. This member contains paths which need
638  // to be redirected to the faux-filesystem (a duplicate filesystem
639  // intended to replace certain files on the host filesystem).
641 };
642 
643 void printSystems();
644 
645 } // namespace gem5
646 
647 #endif // __SYSTEM_HH__
gem5::System::Threads::numActive
int numActive() const
Definition: system.hh:220
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::System::Threads::const_iterator::operator*
reference operator*()
Definition: system.hh:190
gem5::System::addDeviceMemory
void addDeviceMemory(RequestorID requestorId, memory::AbstractMemory *deviceMemory)
Add a physical memory range for a device.
Definition: system.cc:382
gem5::System::Threads::thread
const Thread & thread(ContextID id) const
Definition: system.hh:143
gem5::System::lastWorkItemStarted
std::map< std::pair< uint32_t, uint32_t >, Tick > lastWorkItemStarted
Definition: system.hh:612
gem5::System::SystemPort::recvTimingResp
bool recvTimingResp(PacketPtr pkt) override
Receive a timing response from the peer.
Definition: system.hh:98
gem5::ArmISA::PageShift
const Addr PageShift
Definition: page_size.hh:52
gem5::System::PIDs
std::set< int > PIDs
Process set to track which PIDs have already been allocated.
Definition: system.hh:631
gem5::System::Threads::size
int size() const
Definition: system.hh:216
gem5::System::Threads::const_iterator::const_iterator
const_iterator(const Threads &_threads, int _pos)
Definition: system.hh:163
gem5::System::workItemEnd
void workItemEnd(uint32_t tid, uint32_t workid)
Definition: system.cc:488
gem5::System::Threads::const_iterator
Definition: system.hh:155
gem5::System::lookupRequestorId
RequestorID lookupRequestorId(const SimObject *obj) const
Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if n...
Definition: system.cc:543
gem5::System::numWorkIds
uint32_t numWorkIds
Definition: system.hh:435
gem5::System::Threads::Thread::resume
void resume()
Definition: system.cc:78
gem5::System::workItemsEnd
uint64_t workItemsEnd
Definition: system.hh:434
gem5::System::liveEvents
std::list< PCEvent * > liveEvents
Definition: system.hh:110
gem5::System::Threads::Thread::context
ThreadContext * context
Definition: system.hh:124
gem5::MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:47
gem5::System::getSystemPort
RequestPort & getSystemPort()
Get a reference to the system port that can be used by non-structural simulation objects like process...
Definition: system.hh:245
gem5::System::physProxy
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition: system.hh:332
gem5::memory::PhysicalMemory
The physical memory encapsulates all memories in the system and provides basic functionality for acce...
Definition: physical.hh:122
gem5::System::Threads::const_iterator::difference_type
int difference_type
Definition: system.hh:173
gem5::System::futexMap
FutexMap futexMap
Definition: system.hh:626
gem5::System::memPools
std::vector< MemPool > memPools
Memory allocation objects for all physical memories in the system.
Definition: system.hh:326
gem5::System::schedule
bool schedule(PCEvent *event) override
Definition: system.cc:302
gem5::InvalidContextID
const ContextID InvalidContextID
Definition: types.hh:247
gem5::System::Threads::quiesce
void quiesce(ContextID id)
Definition: system.cc:171
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::ThermalModel
Definition: thermal_model.hh:144
gem5::System::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Additional function to return the Port of a memory object.
Definition: system.cc:276
gem5::MipsISA::event
Bitfield< 10, 5 > event
Definition: pra_constants.hh:300
gem5::System::isAtomicMode
bool isAtomicMode() const
Is the system in atomic mode?
Definition: system.hh:264
gem5::System::incWorkItemsEnd
uint64_t incWorkItemsEnd()
Called by pseudo_inst to track the number of work items completed by this system.
Definition: system.hh:550
gem5::System::bypassCaches
bool bypassCaches() const
Should caches be bypassed?
Definition: system.hh:285
redirect_path.hh
gem5::System::workItemStats
std::map< uint32_t, statistics::Histogram * > workItemStats
Definition: system.hh:613
gem5::System::getShadowRomRanges
AddrRangeList getShadowRomRanges() const
Definition: system.hh:390
futex_map.hh
gem5::System::workload
Workload * workload
OS kernel.
Definition: system.hh:335
gem5::System::Threads::replace
void replace(ThreadContext *tc, ContextID id)
Definition: system.cc:132
gem5::System::Threads::end
const_iterator end() const
Definition: system.hh:234
gem5::System::setMemoryMode
void setMemoryMode(enums::MemoryMode mode)
Change the memory mode of the system.
Definition: system.cc:283
gem5::EventManager::schedule
void schedule(Event &event, Tick when)
Definition: eventq.hh:1019
gem5::System::Threads::const_iterator::iterator_category
std::forward_iterator_tag iterator_category
Definition: system.hh:171
gem5::System::numSystemsRunning
static int numSystemsRunning
Definition: system.hh:622
std::vector
STL vector class.
Definition: stl.hh:37
gem5::System::System
System(const Params &p)
Definition: system.cc:197
gem5::System::getThermalModel
ThermalModel * getThermalModel() const
The thermal model used for this system (if any).
Definition: system.hh:419
workload.hh
gem5::System::regStats
void regStats() override
Callback to set stat parameters.
Definition: system.cc:472
gem5::System::getDeviceMemory
memory::AbstractMemory * getDeviceMemory(const PacketPtr &pkt) const
Return a pointer to the device memory.
Definition: system.cc:399
gem5::System::getGuestByteOrder
ByteOrder getGuestByteOrder() const
Get the guest byte order.
Definition: system.hh:401
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::System::getPageBytes
Addr getPageBytes() const
Get the page bytes for the ISA.
Definition: system.hh:409
gem5::KvmVM
KVM VM container.
Definition: vm.hh:297
gem5::System::_getRequestorId
RequestorID _getRequestorId(const SimObject *requestor, const std::string &requestor_name)
helper function for getRequestorId
Definition: system.cc:593
gem5::System::cacheLineSize
unsigned int cacheLineSize() const
Get the cache line size of the system.
Definition: system.hh:314
gem5::RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:77
gem5::System::stripSystemName
std::string stripSystemName(const std::string &requestor_name) const
Strips off the system name from a requestor name.
Definition: system.cc:533
gem5::System::Threads::const_iterator::operator++
const_iterator & operator++()
Definition: system.hh:178
gem5::System::Threads::quiesceTick
void quiesceTick(ContextID id, Tick when)
Definition: system.cc:182
gem5::System::requestors
std::vector< RequestorInfo > requestors
This array is a per-system list of all devices capable of issuing a memory system request and an asso...
Definition: system.hh:442
gem5::System::Threads::empty
bool empty() const
Definition: system.hh:217
gem5::ArmISA::atomic
Bitfield< 23, 20 > atomic
Definition: misc_types.hh:99
gem5::SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:170
gem5::System::redirectPaths
std::vector< RedirectPath * > redirectPaths
Definition: system.hh:640
gem5::System::Threads::threads
std::vector< Thread > threads
Definition: system.hh:133
gem5::System::_systemPort
SystemPort _systemPort
Definition: system.hh:111
gem5::System::deviceMemMap
std::unordered_map< RequestorID, std::vector< memory::AbstractMemory * > > deviceMemMap
Definition: system.hh:115
gem5::System::workItemsBegin
uint64_t workItemsBegin
Definition: system.hh:433
gem5::System::Threads::Thread::resumeEvent
Event * resumeEvent
Definition: system.hh:126
gem5::System::incWorkItemsBegin
uint64_t incWorkItemsBegin()
Called by pseudo_inst to track the number of work items started by this system.
Definition: system.hh:540
gem5::FutexMap
FutexMap class holds a map of all futexes used in the system.
Definition: futex_map.hh:109
gem5::System::maxRequestors
RequestorID maxRequestors()
Get the number of requestors registered in the system.
Definition: system.hh:518
gem5::System
Definition: system.hh:77
gem5::System::signalList
std::list< BasicSignal > signalList
Definition: system.hh:635
gem5::System::kvmVM
KvmVM *const kvmVM
Definition: system.hh:423
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::System::isMemAddr
bool isMemAddr(Addr addr) const
Check if a physical address is within a range of a memory that is part of the global address map.
Definition: system.cc:376
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::System::physmem
memory::PhysicalMemory physmem
Definition: system.hh:425
gem5::SimObject::params
const Params & params() const
Definition: sim_object.hh:176
sim_object.hh
gem5::System::getKvmVM
KvmVM * getKvmVM()
Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present.
Definition: system.hh:342
gem5::Event
Definition: eventq.hh:251
gem5::System::PARAMS
PARAMS(System)
gem5::System::systemList
static std::vector< System * > systemList
Definition: system.hh:621
gem5::X86ISA::count
count
Definition: misc.hh:709
gem5::System::Threads::operator[]
ThreadContext * operator[](ContextID id) const
Definition: system.hh:209
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::System::getPageShift
Addr getPageShift() const
Get the number of bits worth of in-page address for the ISA.
Definition: system.hh:414
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
statistics.hh
gem5::memory::AbstractMemory
An abstract memory represents a contiguous block of physical memory, with an associated address range...
Definition: abstract_mem.hh:110
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::PCEvent
Definition: pc_event.hh:45
gem5::System::Threads::const_iterator::operator->
pointer operator->()
Definition: system.hh:191
gem5::System::getRequestorName
std::string getRequestorName(RequestorID requestor_id)
Get the name of an object for a given request id.
Definition: system.cc:637
port_proxy.hh
gem5::Workload
Definition: workload.hh:47
gem5::System::getGlobalRequestorId
RequestorID getGlobalRequestorId(const std::string &requestor_name)
Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since...
Definition: system.cc:580
gem5::System::Threads::const_iterator::operator==
bool operator==(const const_iterator &other) const
Definition: system.hh:194
gem5::PortProxy
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition: port_proxy.hh:86
port.hh
gem5::System::Threads::const_iterator::operator=
const_iterator & operator=(const const_iterator &)=default
gem5::System::getMemoryMode
enums::MemoryMode getMemoryMode() const
Get the memory mode of the system.
Definition: system.hh:299
gem5::System::getRequestorId
RequestorID getRequestorId(const SimObject *requestor, std::string subrequestor={})
Request an id used to create a request object in the system.
Definition: system.cc:586
gem5::System::SystemPort
Private class for the system port which is only used as a requestor for debug access and for non-stru...
Definition: system.hh:86
gem5::loader::Arch
Arch
Definition: object_file.hh:50
gem5::System::SystemPort::recvReqRetry
void recvReqRetry() override
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
Definition: system.hh:104
gem5::System::memoryMode
enums::MemoryMode memoryMode
Definition: system.hh:429
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::System::isTimingMode
bool isTimingMode() const
Is the system in timing mode?
Definition: system.hh:276
gem5::System::Threads::Thread::quiesce
void quiesce() const
Definition: system.cc:95
std::pair
STL pair class.
Definition: stl.hh:58
gem5::System::SystemPort::SystemPort
SystemPort(const std::string &_name, SimObject *_owner)
Create a system port with a name and an owner.
Definition: system.hh:93
gem5::System::allocPhysPages
Addr allocPhysPages(int npages, int poolID=0)
Allocate npages contiguous unused physical pages.
Definition: system.cc:355
gem5::System::Threads::begin
const_iterator begin() const
Definition: system.hh:233
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::System::freeMemSize
Addr freeMemSize(int poolID=0) const
Amount of physical memory that is still free.
Definition: system.cc:369
gem5::System::remove
bool remove(PCEvent *event) override
Definition: system.cc:312
gem5::System::maxPID
static const int maxPID
Definition: system.hh:628
gem5::System::memSize
Addr memSize(int poolID=0) const
Amount of physical memory that exists.
Definition: system.cc:362
gem5::System::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: system.cc:443
gem5::System::leafRequestorName
std::string leafRequestorName(const SimObject *requestor, const std::string &subrequestor)
Helper function for constructing the full (sub)requestor name by providing the root requestor and the...
Definition: system.cc:624
gem5::System::trapToGdb
bool trapToGdb(int signal, ContextID ctx_id) const
Definition: system.cc:505
gem5::System::multiThread
const bool multiThread
Definition: system.hh:318
gem5::System::isDeviceMemAddr
bool isDeviceMemAddr(const PacketPtr &pkt) const
Similar to isMemAddr but for devices.
Definition: system.cc:389
mem_pool.hh
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::System::Threads::Thread::active
bool active
Definition: system.hh:125
pc_event.hh
gem5::System::threads
Threads threads
Definition: system.hh:316
gem5::System::ShadowRomRanges
AddrRangeList ShadowRomRanges
Definition: system.hh:427
se_signal.hh
gem5::System::init_param
uint64_t init_param
Definition: system.hh:328
gem5::System::Threads::const_iterator::pos
int pos
Definition: system.hh:159
gem5::System::Threads::thread
Thread & thread(ContextID id)
Definition: system.hh:136
gem5::System::m5opRange
const AddrRange & m5opRange() const
Range used by memory-mapped m5 pseudo-ops if enabled.
Definition: system.hh:596
physical.hh
gem5::System::Threads::Thread::name
std::string name() const
Definition: system.cc:87
gem5::ContextID
int ContextID
Globally unique thread context ID.
Definition: types.hh:246
gem5::System::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: system.cc:416
gem5::ArmISA::PageBytes
const Addr PageBytes
Definition: page_size.hh:53
mem_requestor.hh
gem5::System::_m5opRange
const AddrRange _m5opRange
Range for memory-mapped m5 pseudo ops.
Definition: system.hh:584
gem5::System::printSystems
static void printSystems()
Definition: system.cc:511
gem5::System::markWorkItem
int markWorkItem(int index)
Called by pseudo_inst to mark the cpus actively executing work items.
Definition: system.hh:561
gem5::ArmISA::id
Bitfield< 33 > id
Definition: misc_types.hh:250
gem5::System::validKvmEnvironment
bool validKvmEnvironment() const
Verify gem5 configuration will support KVM emulation.
Definition: system.cc:337
gem5::System::Threads::const_iterator::operator!=
bool operator!=(const const_iterator &other) const
Definition: system.hh:200
gem5::System::getArch
Arch getArch() const
Get the architecture.
Definition: system.hh:395
gem5::System::registerThreadContext
void registerThreadContext(ThreadContext *tc, ContextID assigned=InvalidContextID)
Definition: system.cc:290
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::System::replaceThreadContext
void replaceThreadContext(ThreadContext *tc, ContextID context_id)
Definition: system.cc:322
gem5::printSystems
void printSystems()
Definition: system.cc:527
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
gem5::System::Threads::insert
void insert(ThreadContext *tc, ContextID id=InvalidContextID)
Definition: system.cc:104
symtab.hh
gem5::System::getPhysMem
memory::PhysicalMemory & getPhysMem()
Get a pointer to access the physical memory of the system.
Definition: system.hh:348
gem5::System::Threads
Definition: system.hh:119
gem5::AddrRange
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:71
std::list
STL list class.
Definition: stl.hh:51
gem5::System::~System
~System()
Definition: system.cc:269
gem5::System::Threads::findFree
ThreadContext * findFree()
Definition: system.cc:147
gem5::System::workItemBegin
void workItemBegin(uint32_t tid, uint32_t workid)
Definition: system.hh:568
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::System::Threads::markActive
void markActive(ContextID id)
Definition: system.hh:214
gem5::System::Threads::Thread
Definition: system.hh:122
memory_image.hh
gem5::System::Threads::numRunning
int numRunning() const
Definition: system.cc:157
gem5::System::Threads::const_iterator::threads
const Threads & threads
Definition: system.hh:158
gem5::PCEventScope
Definition: pc_event.hh:67
gem5::System::_cacheLineSize
const unsigned int _cacheLineSize
Definition: system.hh:431
gem5::Named::_name
const std::string _name
Definition: named.hh:41
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:73
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::System::thermalModel
ThermalModel * thermalModel
Definition: system.hh:444

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