| _drainManager | gem5::Drainable | private |
| _drainState | gem5::Drainable | mutableprivate |
| _haveLargeAsid64 | gem5::ArmISA::TableWalker | protected |
| _name | gem5::Named | private |
| _objNameResolver | gem5::SimObject | privatestatic |
| _params | gem5::SimObject | protected |
| _physAddrRange | gem5::ArmISA::TableWalker | protected |
| addStat(statistics::Info *info) | gem5::statistics::Group | |
| addStatGroup(const char *name, Group *block) | gem5::statistics::Group | |
| checkAddrSizeFaultAArch64(Addr addr, int pa_range) | gem5::ArmISA::TableWalker | private |
| checkVAddrSizeFaultAArch64(Addr addr, int top_bit, GrainSize granule, int tsz, bool low_range) | gem5::ArmISA::TableWalker | private |
| clockDomain | gem5::Clocked | private |
| Clocked(ClockDomain &clk_domain) | gem5::Clocked | inlineprotected |
| Clocked(Clocked &)=delete | gem5::Clocked | protected |
| clockEdge(Cycles cycles=Cycles(0)) const | gem5::Clocked | inline |
| ClockedObject(const ClockedObjectParams &p) | gem5::ClockedObject | |
| clockPeriod() const | gem5::Clocked | inline |
| clockPeriodUpdated() | gem5::Clocked | inlineprotectedvirtual |
| COMPLETED | gem5::ArmISA::TableWalker | protectedstatic |
| completeDrain() | gem5::ArmISA::TableWalker | |
| curCycle() const | gem5::Clocked | inline |
| currentSection() | gem5::Serializable | static |
| currState | gem5::ArmISA::TableWalker | protected |
| cycle | gem5::Clocked | mutableprivate |
| cyclesToTicks(Cycles c) const | gem5::Clocked | inline |
| deschedule(Event &event) | gem5::EventManager | inline |
| deschedule(Event *event) | gem5::EventManager | inline |
| dmDrain() | gem5::Drainable | private |
| dmDrainResume() | gem5::Drainable | private |
| doL0LongDescEvent | gem5::ArmISA::TableWalker | private |
| doL0LongDescriptorWrapper() | gem5::ArmISA::TableWalker | private |
| doL1DescEvent | gem5::ArmISA::TableWalker | private |
| doL1Descriptor() | gem5::ArmISA::TableWalker | private |
| doL1DescriptorWrapper() | gem5::ArmISA::TableWalker | private |
| doL1LongDescEvent | gem5::ArmISA::TableWalker | private |
| doL1LongDescriptorWrapper() | gem5::ArmISA::TableWalker | private |
| doL2DescEvent | gem5::ArmISA::TableWalker | private |
| doL2Descriptor() | gem5::ArmISA::TableWalker | private |
| doL2DescriptorWrapper() | gem5::ArmISA::TableWalker | private |
| doL2LongDescEvent | gem5::ArmISA::TableWalker | private |
| doL2LongDescriptorWrapper() | gem5::ArmISA::TableWalker | private |
| doL3LongDescEvent | gem5::ArmISA::TableWalker | private |
| doL3LongDescriptorWrapper() | gem5::ArmISA::TableWalker | private |
| doLongDescriptor() | gem5::ArmISA::TableWalker | private |
| doLongDescriptorWrapper(LookupLevel curr_lookup_level) | gem5::ArmISA::TableWalker | private |
| doProcessEvent | gem5::ArmISA::TableWalker | private |
| drain() override | gem5::ArmISA::TableWalker | virtual |
| Drainable() | gem5::Drainable | protected |
| drainResume() override | gem5::ArmISA::TableWalker | virtual |
| drainState() const | gem5::Drainable | inline |
| EventManager(EventManager &em) | gem5::EventManager | inline |
| EventManager(EventManager *em) | gem5::EventManager | inline |
| EventManager(EventQueue *eq) | gem5::EventManager | inline |
| eventq | gem5::EventManager | protected |
| eventQueue() const | gem5::EventManager | inline |
| fetchDescriptor(Addr descAddr, uint8_t *data, int numBytes, Request::Flags flags, int queueIndex, Event *event, void(TableWalker::*doDescriptor)()) | gem5::ArmISA::TableWalker | private |
| find(const char *name) | gem5::SimObject | static |
| frequency() const | gem5::Clocked | inline |
| generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream) | gem5::Serializable | static |
| generateLongDescFault(ArmFault::FaultSource src) | gem5::ArmISA::TableWalker | private |
| getPort(const std::string &if_name, PortID idx=InvalidPortID) override | gem5::ArmISA::TableWalker | virtual |
| getProbeManager() | gem5::SimObject | |
| getSimObjectResolver() | gem5::SimObject | static |
| getStatGroups() const | gem5::statistics::Group | |
| getStats() const | gem5::statistics::Group | |
| getTableWalkerPort() | gem5::ArmISA::TableWalker | |
| getTlb() | gem5::ArmISA::TableWalker | inline |
| Group()=delete | gem5::statistics::Group | |
| Group(const Group &)=delete | gem5::statistics::Group | |
| Group(Group *parent, const char *name=nullptr) | gem5::statistics::Group | |
| haveLargeAsid64() const | gem5::ArmISA::TableWalker | inline |
| init() | gem5::SimObject | virtual |
| initState() | gem5::SimObject | virtual |
| insertPartialTableEntry(LongDescriptor &descriptor) | gem5::ArmISA::TableWalker | private |
| insertTableEntry(DescriptorBase &descriptor, bool longDescriptor) | gem5::ArmISA::TableWalker | private |
| isStage2 | gem5::ArmISA::TableWalker | protected |
| loadState(CheckpointIn &cp) | gem5::SimObject | virtual |
| LongDescEventByLevel | gem5::ArmISA::TableWalker | private |
| LookupLevel typedef | gem5::ArmISA::TableWalker | private |
| memAttrs(ThreadContext *tc, TlbEntry &te, SCTLR sctlr, uint8_t texcb, bool s) | gem5::ArmISA::TableWalker | |
| memAttrsAArch64(ThreadContext *tc, TlbEntry &te, LongDescriptor &lDescriptor) | gem5::ArmISA::TableWalker | |
| memAttrsLPAE(ThreadContext *tc, TlbEntry &te, LongDescriptor &lDescriptor) | gem5::ArmISA::TableWalker | |
| memInvalidate() | gem5::SimObject | inlinevirtual |
| memWriteback() | gem5::SimObject | inlinevirtual |
| mergedParent | gem5::statistics::Group | private |
| mergedStatGroups | gem5::statistics::Group | private |
| mergeStatGroup(Group *block) | gem5::statistics::Group | |
| mmu | gem5::ArmISA::TableWalker | protected |
| name() const | gem5::Named | inlinevirtual |
| Named(const std::string &name_) | gem5::Named | inline |
| nextCycle() const | gem5::Clocked | inline |
| nextWalk(ThreadContext *tc) | gem5::ArmISA::TableWalker | private |
| notifyFork() | gem5::Drainable | inlinevirtual |
| numSquashable | gem5::ArmISA::TableWalker | protected |
| gem5::operator=(const Group &)=delete | gem5::statistics::Group | |
| gem5::Clocked::operator=(Clocked &)=delete | gem5::Clocked | protected |
| pageSizeNtoStatBin(uint8_t N) | gem5::ArmISA::TableWalker | privatestatic |
| Params typedef | gem5::ClockedObject | |
| PARAMS(ArmTableWalker) | gem5::ArmISA::TableWalker | |
| params() const | gem5::SimObject | inline |
| path | gem5::Serializable | privatestatic |
| pending | gem5::ArmISA::TableWalker | protected |
| pendingChange() | gem5::ArmISA::TableWalker | private |
| pendingChangeTick | gem5::ArmISA::TableWalker | mutableprotected |
| pendingQueue | gem5::ArmISA::TableWalker | protected |
| pendingReqs | gem5::ArmISA::TableWalker | mutableprotected |
| physAddrRange() const | gem5::ArmISA::TableWalker | inline |
| port | gem5::ArmISA::TableWalker | protected |
| powerState | gem5::ClockedObject | |
| preDumpStats() | gem5::statistics::Group | virtual |
| probeManager | gem5::SimObject | private |
| processWalk() | gem5::ArmISA::TableWalker | private |
| processWalkAArch64() | gem5::ArmISA::TableWalker | private |
| processWalkLPAE() | gem5::ArmISA::TableWalker | private |
| processWalkWrapper() | gem5::ArmISA::TableWalker | private |
| readDataTimed(ThreadContext *tc, Addr desc_addr, Stage2Walk *translation, int num_bytes, Request::Flags flags) | gem5::ArmISA::TableWalker | |
| readDataUntimed(ThreadContext *tc, Addr vaddr, Addr desc_addr, uint8_t *data, int num_bytes, Request::Flags flags, BaseMMU::Mode mode, MMU::ArmTranslationType tran_type, bool functional) | gem5::ArmISA::TableWalker | |
| regProbeListeners() | gem5::SimObject | virtual |
| regProbePoints() | gem5::SimObject | virtual |
| regStats() | gem5::statistics::Group | virtual |
| release | gem5::ArmISA::TableWalker | protected |
| REQUESTED | gem5::ArmISA::TableWalker | protectedstatic |
| requestorId | gem5::ArmISA::TableWalker | protected |
| reschedule(Event &event, Tick when, bool always=false) | gem5::EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | gem5::EventManager | inline |
| resetClock() const | gem5::Clocked | inlineprotected |
| resetStats() | gem5::statistics::Group | virtual |
| resolveStat(std::string name) const | gem5::statistics::Group | |
| schedule(Event &event, Tick when) | gem5::EventManager | inline |
| schedule(Event *event, Tick when) | gem5::EventManager | inline |
| sctlr | gem5::ArmISA::TableWalker | protected |
| Serializable() | gem5::Serializable | |
| serialize(CheckpointOut &cp) const override | gem5::ClockedObject | virtual |
| serializeAll(const std::string &cpt_dir) | gem5::SimObject | static |
| serializeSection(CheckpointOut &cp, const char *name) const | gem5::Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | gem5::Serializable | inline |
| setCurTick(Tick newVal) | gem5::EventManager | inline |
| setMmu(MMU *_mmu) | gem5::ArmISA::TableWalker | |
| setSimObjectResolver(SimObjectResolver *resolver) | gem5::SimObject | static |
| setTlb(TLB *_tlb) | gem5::ArmISA::TableWalker | inline |
| signalDrainDone() const | gem5::Drainable | inlineprotected |
| SimObject(const Params &p) | gem5::SimObject | |
| SimObjectList typedef | gem5::SimObject | private |
| simObjectList | gem5::SimObject | privatestatic |
| startup() | gem5::SimObject | virtual |
| stateQueues | gem5::ArmISA::TableWalker | protected |
| statGroups | gem5::statistics::Group | private |
| stats | gem5::ArmISA::TableWalker | protected |
| TableWalker(const Params &p) | gem5::ArmISA::TableWalker | |
| testWalk(Addr pa, Addr size, TlbEntry::DomainType domain, LookupLevel lookup_level, bool stage2) | gem5::ArmISA::TableWalker | private |
| tick | gem5::Clocked | mutableprivate |
| ticksToCycles(Tick t) const | gem5::Clocked | inline |
| tlb | gem5::ArmISA::TableWalker | protected |
| toLookupLevel(uint8_t lookup_level_as_int) | gem5::ArmISA::TableWalker | static |
| unserialize(CheckpointIn &cp) override | gem5::ClockedObject | virtual |
| unserializeSection(CheckpointIn &cp, const char *name) | gem5::Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | gem5::Serializable | inline |
| update() const | gem5::Clocked | inlineprivate |
| updateClockPeriod() | gem5::Clocked | inline |
| voltage() const | gem5::Clocked | inline |
| wakeupEventQueue(Tick when=(Tick) -1) | gem5::EventManager | inline |
| walk(const RequestPtr &req, ThreadContext *tc, uint16_t asid, vmid_t _vmid, bool hyp, BaseMMU::Mode mode, BaseMMU::Translation *_trans, bool timing, bool functional, bool secure, MMU::ArmTranslationType tran_type, bool stage2, const TlbEntry *walk_entry) | gem5::ArmISA::TableWalker | |
| walkAddresses(Addr ttbr, GrainSize tg, int tsz, int pa_range) | gem5::ArmISA::TableWalker | private |
| ~Clocked() | gem5::Clocked | inlineprotectedvirtual |
| ~Drainable() | gem5::Drainable | protectedvirtual |
| ~Group() | gem5::statistics::Group | virtual |
| ~Named()=default | gem5::Named | virtual |
| ~Serializable() | gem5::Serializable | virtual |
| ~SimObject() | gem5::SimObject | virtual |
| ~TableWalker() | gem5::ArmISA::TableWalker | virtual |