#include <table_walker.hh>

Inheritance diagram for gem5::ArmISA::TableWalker::L1Descriptor:

Public Types
enum	EntryType { Ignore , PageTable , Section , Reserved }
	Type of page table entry ARM DDI 0406B: B3-8. More...

Public Member Functions
	L1Descriptor ()
	Default ctor.

uint8_t *	getRawPtr () override

uint64_t	getRawData () const override

std::string	dbgHeader () const override

uint8_t	offsetBits () const override

EntryType	type () const

bool	supersection () const
	Is the page a Supersection (16 MiB)?

Addr	paddr () const
	Return the physcal address of the entry, bits in position.

Addr	paddr (Addr va) const
	Return the physcal address of the entry, bits in position.

Addr	pfn () const override
	Return the physical frame, bits shifted right.

bool	global (WalkerState *currState) const override
	Is the translation global (no asid used)?

bool	xn () const override
	Is the translation not allow execution?

uint8_t	ap () const override
	Three bit access protection flags.

TlbEntry::DomainType	domain () const override
	Domain Client/Manager: ARM DDI 0406B: B3-31.

Addr	l2Addr () const
	Address of L2 descriptor if it exists.

uint8_t	texcb () const override
	Memory region attributes: ARM DDI 0406B: B3-32.

bool	shareable () const override
	If the section is shareable.

void	setAp0 ()
	Set access flag that this entry has been touched.

bool	dirty () const
	This entry needs to be written back to memory.

bool	secure (bool have_security, WalkerState *currState) const override
	Returns true if this entry targets the secure physical address map.

Public Member Functions inherited from gem5::ArmISA::TableWalker::DescriptorBase
	DescriptorBase ()

Public Attributes
uint32_t	data
	The raw bits of the entry.

bool	_dirty
	This entry has been modified (access flag set) and needs to be written back to memory.

Public Attributes inherited from gem5::ArmISA::TableWalker::DescriptorBase
LookupLevel	lookupLevel
	Current lookup level for this descriptor.

Detailed Description

Definition at line 101 of file table_walker.hh.

Member Enumeration Documentation

◆ EntryType

enum gem5::ArmISA::TableWalker::L1Descriptor::EntryType

Type of page table entry ARM DDI 0406B: B3-8.

Enumerator
Ignore
PageTable
Section
Reserved

Definition at line 105 of file table_walker.hh.

Constructor & Destructor Documentation

◆ L1Descriptor()

gem5::ArmISA::TableWalker::L1Descriptor::L1Descriptor ( )

inline

Default ctor.

Definition at line 121 of file table_walker.hh.

References gem5::ArmISA::TableWalker::DescriptorBase::lookupLevel.

Member Function Documentation

◆ ap()

uint8_t gem5::ArmISA::TableWalker::L1Descriptor::ap ( ) const

inlineoverridevirtual

Three bit access protection flags.

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 206 of file table_walker.hh.

References gem5::bits(), and data.

Referenced by gem5::ArmISA::TableWalker::doL1Descriptor().

◆ dbgHeader()

std::string gem5::ArmISA::TableWalker::L1Descriptor::dbgHeader ( ) const

inlineoverridevirtual

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 139 of file table_walker.hh.

◆ dirty()

bool gem5::ArmISA::TableWalker::L1Descriptor::dirty ( ) const

inline

This entry needs to be written back to memory.

Definition at line 255 of file table_walker.hh.

References _dirty.

◆ domain()

TlbEntry::DomainType gem5::ArmISA::TableWalker::L1Descriptor::domain ( ) const

inlineoverridevirtual

Domain Client/Manager: ARM DDI 0406B: B3-31.

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 213 of file table_walker.hh.

References gem5::bits(), and data.

Referenced by gem5::ArmISA::TableWalker::doL1Descriptor(), gem5::ArmISA::TableWalker::doL2Descriptor(), and gem5::ArmISA::TableWalker::L2Descriptor::domain().

◆ getRawData()

uint64_t gem5::ArmISA::TableWalker::L1Descriptor::getRawData ( ) const

inlineoverridevirtual

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 133 of file table_walker.hh.

References data.

◆ getRawPtr()

uint8_t * gem5::ArmISA::TableWalker::L1Descriptor::getRawPtr ( )

inlineoverridevirtual

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 127 of file table_walker.hh.

References data.

◆ global()

bool gem5::ArmISA::TableWalker::L1Descriptor::global ( WalkerState * currState ) const

inlineoverridevirtual

Is the translation global (no asid used)?

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 192 of file table_walker.hh.

References gem5::bits(), and data.

◆ l2Addr()

Addr gem5::ArmISA::TableWalker::L1Descriptor::l2Addr ( ) const

inline

Address of L2 descriptor if it exists.

Definition at line 220 of file table_walker.hh.

References data, and gem5::mbits().

Referenced by gem5::ArmISA::TableWalker::doL1Descriptor().

◆ offsetBits()

uint8_t gem5::ArmISA::TableWalker::L1Descriptor::offsetBits ( ) const

inlineoverridevirtual

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 145 of file table_walker.hh.

◆ paddr() [1/2]

Addr gem5::ArmISA::TableWalker::L1Descriptor::paddr ( ) const

inline

Return the physcal address of the entry, bits in position.

Definition at line 165 of file table_walker.hh.

References data, gem5::mbits(), panic, and supersection().

◆ paddr() [2/2]

Addr gem5::ArmISA::TableWalker::L1Descriptor::paddr ( Addr va ) const

inline

Return the physcal address of the entry, bits in position.

Definition at line 174 of file table_walker.hh.

References data, gem5::mbits(), panic, supersection(), and gem5::ArmISA::va.

◆ pfn()

Addr gem5::ArmISA::TableWalker::L1Descriptor::pfn ( ) const

inlineoverridevirtual

Return the physical frame, bits shifted right.

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 183 of file table_walker.hh.

References gem5::bits(), data, panic, and supersection().

◆ secure()

bool gem5::ArmISA::TableWalker::L1Descriptor::secure	(	bool	have_security,
		WalkerState *	currState ) const

inlineoverridevirtual

Returns true if this entry targets the secure physical address map.

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 265 of file table_walker.hh.

References gem5::bits(), gem5::ArmISA::TableWalker::currState, data, PageTable, gem5::ArmISA::TableWalker::WalkerState::secureLookup, and type().

Referenced by gem5::ArmISA::TableWalker::L2Descriptor::secure().

◆ setAp0()

void gem5::ArmISA::TableWalker::L1Descriptor::setAp0 ( )

inline

Set access flag that this entry has been touched.

Mark the entry as requiring a writeback, in the future.

Definition at line 247 of file table_walker.hh.

References _dirty, and data.

◆ shareable()

bool gem5::ArmISA::TableWalker::L1Descriptor::shareable ( ) const

inlineoverridevirtual

If the section is shareable.

See texcb() comment.

Reimplemented from gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 238 of file table_walker.hh.

References gem5::bits(), and data.

◆ supersection()

bool gem5::ArmISA::TableWalker::L1Descriptor::supersection ( ) const

inline

Is the page a Supersection (16 MiB)?

Definition at line 158 of file table_walker.hh.

References gem5::bits(), and data.

Referenced by gem5::ArmISA::TableWalker::doL1Descriptor(), paddr(), paddr(), and pfn().

◆ texcb()

uint8_t gem5::ArmISA::TableWalker::L1Descriptor::texcb ( ) const

inlineoverridevirtual

Memory region attributes: ARM DDI 0406B: B3-32.

These bits are largly ignored by M5 and only used to provide the illusion that the memory system cares about anything but cachable vs. uncachable.

Reimplemented from gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 231 of file table_walker.hh.

References gem5::bits(), and data.

◆ type()

EntryType gem5::ArmISA::TableWalker::L1Descriptor::type ( ) const

inline

Definition at line 151 of file table_walker.hh.

References data.

Referenced by gem5::ArmISA::TableWalker::doL1Descriptor(), and secure().

◆ xn()

bool gem5::ArmISA::TableWalker::L1Descriptor::xn ( ) const

inlineoverridevirtual

Is the translation not allow execution?

Implements gem5::ArmISA::TableWalker::DescriptorBase.

Definition at line 199 of file table_walker.hh.

References gem5::bits(), and data.

Member Data Documentation

◆ _dirty

bool gem5::ArmISA::TableWalker::L1Descriptor::_dirty

This entry has been modified (access flag set) and needs to be written back to memory.

Definition at line 118 of file table_walker.hh.

Referenced by dirty(), and setAp0().

◆ data

uint32_t gem5::ArmISA::TableWalker::L1Descriptor::data

The raw bits of the entry.

Definition at line 114 of file table_walker.hh.

Referenced by ap(), gem5::ArmISA::TableWalker::doL1Descriptor(), domain(), getRawData(), getRawPtr(), global(), l2Addr(), paddr(), paddr(), pfn(), secure(), setAp0(), shareable(), supersection(), texcb(), type(), and xn().

The documentation for this class was generated from the following file:

arch/arm/table_walker.hh

Public Types

Public Member Functions

Public Attributes

Detailed Description

Member Enumeration Documentation

◆ EntryType

Constructor & Destructor Documentation

◆ L1Descriptor()

Member Function Documentation

◆ ap()

◆ dbgHeader()

◆ dirty()

◆ domain()

◆ getRawData()

◆ getRawPtr()

◆ global()

◆ l2Addr()

◆ offsetBits()

◆ paddr() [1/2]

◆ paddr() [2/2]

◆ pfn()

◆ secure()

◆ setAp0()

◆ shareable()

◆ supersection()

◆ texcb()

◆ type()

◆ xn()

Member Data Documentation

◆ _dirty

◆ data