gem5 v24.0.0.0
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gem5::ArmISA::TableWalker::WalkerState Class Reference

#include <table_walker.hh>

Classes

struct  LongDescData
 Helper variables used to implement hierarchical access permissions when the long-desc. More...
 

Public Member Functions

void doL1Descriptor ()
 
void doL2Descriptor ()
 
void doLongDescriptor ()
 
 WalkerState ()
 
std::string name () const
 

Public Attributes

ThreadContexttc
 Thread context that we're doing the walk for.
 
bool aarch64
 If the access is performed in AArch64 state.
 
ExceptionLevel el
 Current exception level.
 
TranslationRegime regime
 Current translation regime.
 
int physAddrRange
 Current physical address range in bits.
 
RequestPtr req
 Request that is currently being serviced.
 
TlbEntry walkEntry
 Initial walk entry allowing to skip lookup levels.
 
uint16_t asid
 ASID that we're servicing the request under.
 
vmid_t vmid
 
BaseMMU::TranslationtransState
 Translation state for delayed requests.
 
Fault fault
 The fault that we are going to return.
 
Addr vaddr
 The virtual address that is being translated with tagging removed.
 
Addr vaddr_tainted
 The virtual address that is being translated.
 
SCTLR sctlr
 Cached copy of the sctlr as it existed when translation began.
 
SCR scr
 Cached copy of the scr as it existed when translation began.
 
CPSR cpsr
 Cached copy of the cpsr as it existed when translation began.
 
union { 
 
   TTBCR   ttbcr 
 
   TCR   tcr 
 
};  
 Cached copy of ttbcr/tcr as it existed when translation began.
 
HTCR htcr
 Cached copy of the htcr as it existed when translation began.
 
HCR hcr
 Cached copy of the htcr as it existed when translation began.
 
VTCR_t vtcr
 Cached copy of the vtcr as it existed when translation began.
 
bool isWrite
 If the access is a write.
 
bool isFetch
 If the access is a fetch (for execution, and no-exec) must be checked?
 
bool isSecure
 If the access comes from the secure state.
 
bool secureLookup = false
 Whether lookups should be treated as using the secure state.
 
bool isUncacheable
 True if table walks are uncacheable (for table descriptors)
 
std::optional< LongDescDatalongDescData
 
bool hpd
 Hierarchical access permission disable.
 
uint8_t sh
 
uint8_t irgn
 
uint8_t orgn
 
bool stage2Req
 Flag indicating if a second stage of lookup is required.
 
BaseMMU::Translationstage2Tran
 A pointer to the stage 2 translation that's in progress.
 
bool timing
 If the mode is timing or atomic.
 
bool functional
 If the atomic mode should be functional.
 
BaseMMU::Mode mode
 Save mode for use in delayed response.
 
MMU::ArmTranslationType tranType
 The translation type that has been requested.
 
L1Descriptor l1Desc
 Short-format descriptors.
 
L2Descriptor l2Desc
 
LongDescriptor longDesc
 Long-format descriptor (LPAE and AArch64)
 
bool delayed
 Whether the response is delayed in timing mode due to additional lookups.
 
TableWalkertableWalker
 
Tick startTime
 Timestamp for calculating elapsed time in service (for stats)
 
unsigned levels
 Page entries walked during service (for stats)
 

Detailed Description

Definition at line 820 of file table_walker.hh.

Constructor & Destructor Documentation

◆ WalkerState()

gem5::TableWalker::WalkerState::WalkerState ( )

Definition at line 127 of file table_walker.cc.

Member Function Documentation

◆ doL1Descriptor()

void gem5::ArmISA::TableWalker::WalkerState::doL1Descriptor ( )

◆ doL2Descriptor()

void gem5::ArmISA::TableWalker::WalkerState::doL2Descriptor ( )

◆ doLongDescriptor()

void gem5::ArmISA::TableWalker::WalkerState::doLongDescriptor ( )

◆ name()

std::string gem5::ArmISA::TableWalker::WalkerState::name ( ) const
inline

Definition at line 963 of file table_walker.hh.

References gem5::Named::name(), and tableWalker.

Member Data Documentation

◆ [union]

Cached copy of ttbcr/tcr as it existed when translation began.

◆ aarch64

◆ asid

uint16_t gem5::ArmISA::TableWalker::WalkerState::asid

ASID that we're servicing the request under.

Definition at line 845 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::insertPartialTableEntry(), gem5::ArmISA::TableWalker::insertTableEntry(), and gem5::ArmISA::TableWalker::walk().

◆ cpsr

CPSR gem5::ArmISA::TableWalker::WalkerState::cpsr

Cached copy of the cpsr as it existed when translation began.

Definition at line 867 of file table_walker.hh.

◆ delayed

bool gem5::ArmISA::TableWalker::WalkerState::delayed

◆ el

◆ fault

◆ functional

bool gem5::ArmISA::TableWalker::WalkerState::functional

If the atomic mode should be functional.

Definition at line 929 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::fetchDescriptor(), and gem5::ArmISA::TableWalker::walk().

◆ hcr

HCR gem5::ArmISA::TableWalker::WalkerState::hcr

Cached copy of the htcr as it existed when translation began.

Definition at line 880 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::processWalkAArch64(), gem5::ArmISA::TableWalker::uncacheableWalk(), and gem5::ArmISA::TableWalker::walk().

◆ hpd

bool gem5::ArmISA::TableWalker::WalkerState::hpd

Hierarchical access permission disable.

Definition at line 913 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::doLongDescriptor(), and gem5::ArmISA::TableWalker::processWalkAArch64().

◆ htcr

HTCR gem5::ArmISA::TableWalker::WalkerState::htcr

Cached copy of the htcr as it existed when translation began.

Definition at line 877 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::processWalkLPAE(), and gem5::ArmISA::TableWalker::walk().

◆ irgn

uint8_t gem5::ArmISA::TableWalker::WalkerState::irgn

◆ isFetch

◆ isSecure

◆ isUncacheable

◆ isWrite

◆ l1Desc

L1Descriptor gem5::ArmISA::TableWalker::WalkerState::l1Desc

◆ l2Desc

L2Descriptor gem5::ArmISA::TableWalker::WalkerState::l2Desc

◆ levels

unsigned gem5::ArmISA::TableWalker::WalkerState::levels

Page entries walked during service (for stats)

Definition at line 954 of file table_walker.hh.

◆ longDesc

◆ longDescData

◆ mode

◆ orgn

uint8_t gem5::ArmISA::TableWalker::WalkerState::orgn

◆ physAddrRange

int gem5::ArmISA::TableWalker::WalkerState::physAddrRange

◆ regime

◆ req

◆ scr

SCR gem5::ArmISA::TableWalker::WalkerState::scr

Cached copy of the scr as it existed when translation began.

Definition at line 864 of file table_walker.hh.

◆ sctlr

◆ secureLookup

bool gem5::ArmISA::TableWalker::WalkerState::secureLookup = false

◆ sh

uint8_t gem5::ArmISA::TableWalker::WalkerState::sh

◆ stage2Req

bool gem5::ArmISA::TableWalker::WalkerState::stage2Req

Flag indicating if a second stage of lookup is required.

Definition at line 920 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::fetchDescriptor(), and gem5::ArmISA::TableWalker::walk().

◆ stage2Tran

BaseMMU::Translation* gem5::ArmISA::TableWalker::WalkerState::stage2Tran

A pointer to the stage 2 translation that's in progress.

Definition at line 923 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::doL2DescriptorWrapper(), gem5::ArmISA::TableWalker::doLongDescriptorWrapper(), and gem5::ArmISA::TableWalker::fetchDescriptor().

◆ startTime

◆ tableWalker

TableWalker* gem5::ArmISA::TableWalker::WalkerState::tableWalker

Definition at line 948 of file table_walker.hh.

Referenced by name(), and gem5::ArmISA::TableWalker::walk().

◆ tc

◆ tcr

TCR gem5::ArmISA::TableWalker::WalkerState::tcr

◆ timing

◆ transState

BaseMMU::Translation* gem5::ArmISA::TableWalker::WalkerState::transState

◆ tranType

MMU::ArmTranslationType gem5::ArmISA::TableWalker::WalkerState::tranType

◆ ttbcr

TTBCR gem5::ArmISA::TableWalker::WalkerState::ttbcr

◆ vaddr

◆ vaddr_tainted

◆ vmid

◆ vtcr

VTCR_t gem5::ArmISA::TableWalker::WalkerState::vtcr

◆ walkEntry

TlbEntry gem5::ArmISA::TableWalker::WalkerState::walkEntry

Initial walk entry allowing to skip lookup levels.

Definition at line 842 of file table_walker.hh.

Referenced by gem5::ArmISA::TableWalker::walk(), and gem5::ArmISA::TableWalker::walkAddresses().


The documentation for this class was generated from the following files:

Generated on Tue Jun 18 2024 16:24:17 for gem5 by doxygen 1.11.0