| _drainManager | gem5::Drainable | private |
| _drainState | gem5::Drainable | mutableprivate |
| _name | gem5::Named | private |
| _objNameResolver | gem5::SimObject | privatestatic |
| _params | gem5::SimObject | protected |
| addrRanges | gem5::Gicv3 | protected |
| addStat(statistics::Info *info) | gem5::statistics::Group | |
| addStatGroup(const char *name, Group *block) | gem5::statistics::Group | |
| BaseGic(const Params &p) | gem5::BaseGic | |
| blockIntUpdate() const | gem5::BaseGic | inlineprotectedvirtual |
| clearDistRange(Gicv3Registers *to, Addr daddr, size_t size) | gem5::Gicv3Registers | protectedstatic |
| clearInt(uint32_t int_id) override | gem5::Gicv3 | protectedvirtual |
| clearPPInt(uint32_t int_id, uint32_t cpu) override | gem5::Gicv3 | protectedvirtual |
| clearRedistRegister(Gicv3Registers *to, const ArmISA::Affinity &aff, Addr daddr) | gem5::Gicv3Registers | protectedstatic |
| clockDomain | gem5::Clocked | private |
| Clocked(ClockDomain &clk_domain) | gem5::Clocked | inlineprotected |
| Clocked(Clocked &)=delete | gem5::Clocked | protected |
| clockEdge(Cycles cycles=Cycles(0)) const | gem5::Clocked | inline |
| ClockedObject(const ClockedObjectParams &p) | gem5::ClockedObject | |
| clockPeriod() const | gem5::Clocked | inline |
| clockPeriodUpdated() | gem5::Clocked | inlineprotectedvirtual |
| copyCpuRegister(Gicv3Registers *from, Gicv3Registers *to, const ArmISA::Affinity &aff, ArmISA::MiscRegIndex misc_reg) | gem5::Gicv3Registers | protectedstatic |
| copyDistRange(Gicv3Registers *from, Gicv3Registers *to, Addr daddr, size_t size) | gem5::Gicv3Registers | protectedstatic |
| copyDistRegister(Gicv3Registers *from, Gicv3Registers *to, Addr daddr) | gem5::Gicv3Registers | protectedstatic |
| copyGicState(Gicv3Registers *from, Gicv3Registers *to) | gem5::Gicv3 | protected |
| copyRedistRange(Gicv3Registers *from, Gicv3Registers *to, const ArmISA::Affinity &aff, Addr daddr, size_t size) | gem5::Gicv3Registers | protectedstatic |
| copyRedistRegister(Gicv3Registers *from, Gicv3Registers *to, const ArmISA::Affinity &aff, Addr daddr) | gem5::Gicv3Registers | protectedstatic |
| cpuInterfaces | gem5::Gicv3 | protected |
| curCycle() const | gem5::Clocked | inline |
| currentSection() | gem5::Serializable | static |
| cycle | gem5::Clocked | mutableprivate |
| cyclesToTicks(Cycles c) const | gem5::Clocked | inline |
| deassertAll(uint32_t cpu) | gem5::Gicv3 | |
| deassertInt(uint32_t cpu, ArmISA::InterruptTypes int_type) | gem5::Gicv3 | |
| deschedule(Event &event) | gem5::EventManager | inline |
| deschedule(Event *event) | gem5::EventManager | inline |
| distRange | gem5::Gicv3 | protected |
| distributor | gem5::Gicv3 | protected |
| dmDrain() | gem5::Drainable | private |
| dmDrainResume() | gem5::Drainable | private |
| drain() override | gem5::SimObject | inlinevirtual |
| Drainable() | gem5::Drainable | protected |
| drainResume() | gem5::Drainable | inlineprotectedvirtual |
| drainState() const | gem5::Drainable | inline |
| EventManager(EventManager &em) | gem5::EventManager | inline |
| EventManager(EventManager *em) | gem5::EventManager | inline |
| EventManager(EventQueue *eq) | gem5::EventManager | inline |
| eventq | gem5::EventManager | protected |
| eventQueue() const | gem5::EventManager | inline |
| find(const char *name) | gem5::SimObject | static |
| frequency() const | gem5::Clocked | inline |
| G0S enum value | gem5::Gicv3 | |
| G1NS enum value | gem5::Gicv3 | |
| G1S enum value | gem5::Gicv3 | |
| generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream) | gem5::Serializable | static |
| getAddrRanges() const override | gem5::Gicv3 | inlineprotectedvirtual |
| getCPUInterface(int cpu_id) const | gem5::Gicv3 | inline |
| getCPUInterfaceByAffinity(const ArmISA::Affinity &aff) const | gem5::Gicv3 | |
| getDistributor() const | gem5::Gicv3 | inline |
| getPort(const std::string &if_name, PortID idx=InvalidPortID) override | gem5::PioDevice | virtual |
| getProbeManager() | gem5::SimObject | |
| getRedistributor(ContextID context_id) const | gem5::Gicv3 | inline |
| getRedistributorByAddr(Addr address) const | gem5::Gicv3 | |
| getRedistributorByAffinity(const ArmISA::Affinity &aff) const | gem5::Gicv3 | |
| getSimObjectResolver() | gem5::SimObject | static |
| getStatGroups() const | gem5::statistics::Group | |
| getStats() const | gem5::statistics::Group | |
| getSystem() const | gem5::BaseGic | inline |
| Gicv3(const Params &p) | gem5::Gicv3 | |
| Gicv3CPUInterface class | gem5::Gicv3 | friend |
| Gicv3Distributor class | gem5::Gicv3 | friend |
| Gicv3Redistributor class | gem5::Gicv3 | friend |
| GicVersion enum name | gem5::BaseGic | |
| Group()=delete | gem5::statistics::Group | |
| Group(const Group &)=delete | gem5::statistics::Group | |
| Group(Group *parent, const char *name=nullptr) | gem5::statistics::Group | |
| GroupId enum name | gem5::Gicv3 | |
| haveAsserted(uint32_t cpu) const | gem5::Gicv3 | |
| init() override | gem5::Gicv3 | protectedvirtual |
| initState() | gem5::SimObject | virtual |
| INT_ACTIVE enum value | gem5::Gicv3 | |
| INT_ACTIVE_PENDING enum value | gem5::Gicv3 | |
| INT_EDGE_TRIGGERED enum value | gem5::Gicv3 | |
| INT_INACTIVE enum value | gem5::Gicv3 | |
| INT_LEVEL_SENSITIVE enum value | gem5::Gicv3 | |
| INT_PENDING enum value | gem5::Gicv3 | |
| INTID_NONSECURE | gem5::Gicv3 | static |
| INTID_SECURE | gem5::Gicv3 | static |
| INTID_SPURIOUS | gem5::Gicv3 | static |
| IntStatus enum name | gem5::Gicv3 | |
| IntTriggerType enum name | gem5::Gicv3 | |
| its | gem5::Gicv3 | protected |
| loadState(CheckpointIn &cp) | gem5::SimObject | virtual |
| memInvalidate() | gem5::SimObject | inlinevirtual |
| memWriteback() | gem5::SimObject | inlinevirtual |
| mergedParent | gem5::statistics::Group | private |
| mergedStatGroups | gem5::statistics::Group | private |
| mergeStatGroup(Group *block) | gem5::statistics::Group | |
| name() const | gem5::Named | inlinevirtual |
| Named(const std::string &name_) | gem5::Named | inline |
| nextCycle() const | gem5::Clocked | inline |
| notifyFork() | gem5::Drainable | inlinevirtual |
| gem5::operator=(const Group &)=delete | gem5::statistics::Group | |
| gem5::Clocked::operator=(Clocked &)=delete | gem5::Clocked | protected |
| PARAMS(Gicv3) | gem5::Gicv3 | protected |
| Params typedef | gem5::BaseGic | |
| params() const | gem5::BaseGic | |
| path | gem5::Serializable | privatestatic |
| PioDevice(const Params &p) | gem5::PioDevice | |
| pioPort | gem5::PioDevice | protected |
| platform | gem5::BaseGic | protected |
| postInt(uint32_t cpu, ArmISA::InterruptTypes int_type) | gem5::Gicv3 | |
| powerState | gem5::ClockedObject | |
| PPI_MAX | gem5::Gicv3 | static |
| preDumpStats() | gem5::statistics::Group | virtual |
| probeManager | gem5::SimObject | private |
| read(PacketPtr pkt) override | gem5::Gicv3 | protectedvirtual |
| readCpu(const ArmISA::Affinity &aff, ArmISA::MiscRegIndex misc_reg) override | gem5::Gicv3 | virtual |
| readDistributor(Addr daddr) override | gem5::Gicv3 | virtual |
| readRedistributor(const ArmISA::Affinity &aff, Addr daddr) override | gem5::Gicv3 | virtual |
| redistRange | gem5::Gicv3 | protected |
| redistributors | gem5::Gicv3 | protected |
| redistSize | gem5::Gicv3 | protected |
| regProbeListeners() | gem5::SimObject | virtual |
| regProbePoints() | gem5::SimObject | virtual |
| regStats() | gem5::statistics::Group | virtual |
| reschedule(Event &event, Tick when, bool always=false) | gem5::EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | gem5::EventManager | inline |
| reserved(const char *fmt, Args... args) const | gem5::Gicv3 | inlineprotected |
| reset() | gem5::Gicv3 | protected |
| resetClock() const | gem5::Clocked | inlineprotected |
| resetStats() | gem5::statistics::Group | virtual |
| resolveStat(std::string name) const | gem5::statistics::Group | |
| schedule(Event &event, Tick when) | gem5::EventManager | inline |
| schedule(Event *event, Tick when) | gem5::EventManager | inline |
| sendInt(uint32_t int_id) override | gem5::Gicv3 | protectedvirtual |
| sendPPInt(uint32_t int_id, uint32_t cpu) override | gem5::Gicv3 | protectedvirtual |
| Serializable() | gem5::Serializable | |
| serialize(CheckpointOut &cp) const override | gem5::Gicv3 | protectedvirtual |
| serializeAll(const std::string &cpt_dir) | gem5::SimObject | static |
| serializeSection(CheckpointOut &cp, const char *name) const | gem5::Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | gem5::Serializable | inline |
| setCurTick(Tick newVal) | gem5::EventManager | inline |
| setSimObjectResolver(SimObjectResolver *resolver) | gem5::SimObject | static |
| SGI_MAX | gem5::Gicv3 | static |
| signalDrainDone() const | gem5::Drainable | inlineprotected |
| SimObject(const Params &p) | gem5::SimObject | |
| SimObjectList typedef | gem5::SimObject | private |
| simObjectList | gem5::SimObject | privatestatic |
| startup() | gem5::SimObject | virtual |
| statGroups | gem5::statistics::Group | private |
| stats | gem5::statistics::Group | private |
| supportsVersion(GicVersion version) override | gem5::Gicv3 | protectedvirtual |
| sys | gem5::PioDevice | protected |
| tick | gem5::Clocked | mutableprivate |
| ticksToCycles(Tick t) const | gem5::Clocked | inline |
| unserialize(CheckpointIn &cp) override | gem5::Gicv3 | protectedvirtual |
| unserializeSection(CheckpointIn &cp, const char *name) | gem5::Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | gem5::Serializable | inline |
| update() | gem5::Gicv3 | |
| updateClockPeriod() | gem5::Clocked | inline |
| voltage() const | gem5::Clocked | inline |
| wakeupEventQueue(Tick when=(Tick) -1) | gem5::EventManager | inline |
| write(PacketPtr pkt) override | gem5::Gicv3 | protectedvirtual |
| writeCpu(const ArmISA::Affinity &aff, ArmISA::MiscRegIndex misc_reg, RegVal data) override | gem5::Gicv3 | virtual |
| writeDistributor(Addr daddr, uint32_t data) override | gem5::Gicv3 | virtual |
| writeRedistributor(const ArmISA::Affinity &aff, Addr daddr, uint32_t data) override | gem5::Gicv3 | virtual |
| ~BaseGic() | gem5::BaseGic | virtual |
| ~Clocked() | gem5::Clocked | inlineprotectedvirtual |
| ~Drainable() | gem5::Drainable | protectedvirtual |
| ~Group() | gem5::statistics::Group | virtual |
| ~Named()=default | gem5::Named | virtual |
| ~PioDevice() | gem5::PioDevice | virtual |
| ~Serializable() | gem5::Serializable | virtual |
| ~SimObject() | gem5::SimObject | virtual |