| _drainManager | gem5::Drainable | private |
| _drainState | gem5::Drainable | mutableprivate |
| _name | gem5::Named | private |
| _objNameResolver | gem5::SimObject | privatestatic |
| _params | gem5::SimObject | protected |
| activeDoorbells | gem5::UFSHostDevice | private |
| addStat(statistics::Info *info) | gem5::statistics::Group | |
| addStatGroup(const char *name, Group *block) | gem5::statistics::Group | |
| cacheBlockSize() const | gem5::DmaDevice | inline |
| checkDrain() | gem5::UFSHostDevice | |
| clearInterrupt() | gem5::UFSHostDevice | private |
| clockDomain | gem5::Clocked | private |
| Clocked(ClockDomain &clk_domain) | gem5::Clocked | inlineprotected |
| Clocked(Clocked &)=delete | gem5::Clocked | protected |
| clockEdge(Cycles cycles=Cycles(0)) const | gem5::Clocked | inline |
| ClockedObject(const ClockedObjectParams &p) | gem5::ClockedObject | |
| clockPeriod() const | gem5::Clocked | inline |
| clockPeriodUpdated() | gem5::Clocked | inlineprotectedvirtual |
| commandHandler() | gem5::UFSHostDevice | private |
| countInt | gem5::UFSHostDevice | private |
| curCycle() const | gem5::Clocked | inline |
| currentSection() | gem5::Serializable | static |
| cycle | gem5::Clocked | mutableprivate |
| cyclesToTicks(Cycles c) const | gem5::Clocked | inline |
| deschedule(Event &event) | gem5::EventManager | inline |
| deschedule(Event *event) | gem5::EventManager | inline |
| DmaDevice(const Params &p) | gem5::DmaDevice | |
| dmaPending() const | gem5::DmaDevice | inline |
| dmaPort | gem5::DmaDevice | protected |
| dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) | gem5::DmaDevice | inline |
| dmaRead(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) | gem5::DmaDevice | inline |
| dmaWrite(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) | gem5::DmaDevice | inline |
| dmaWrite(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) | gem5::DmaDevice | inline |
| dmaWriteInfo | gem5::UFSHostDevice | private |
| dmDrain() | gem5::Drainable | private |
| dmDrainResume() | gem5::Drainable | private |
| drain() override | gem5::UFSHostDevice | virtual |
| Drainable() | gem5::Drainable | protected |
| drainResume() | gem5::Drainable | inlineprotectedvirtual |
| drainState() const | gem5::Drainable | inline |
| EventManager(EventManager &em) | gem5::EventManager | inline |
| EventManager(EventManager *em) | gem5::EventManager | inline |
| EventManager(EventQueue *eq) | gem5::EventManager | inline |
| eventq | gem5::EventManager | protected |
| eventQueue() const | gem5::EventManager | inline |
| finalUTP() | gem5::UFSHostDevice | private |
| find(const char *name) | gem5::SimObject | static |
| frequency() const | gem5::Clocked | inline |
| garbage | gem5::UFSHostDevice | private |
| generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream) | gem5::Serializable | static |
| generateInterrupt() | gem5::UFSHostDevice | private |
| getAddrRanges() const override | gem5::UFSHostDevice | privatevirtual |
| getPort(const std::string &if_name, PortID idx=InvalidPortID) override | gem5::DmaDevice | virtual |
| getProbeManager() | gem5::SimObject | |
| getSimObjectResolver() | gem5::SimObject | static |
| getStatGroups() const | gem5::statistics::Group | |
| getStats() const | gem5::statistics::Group | |
| gic | gem5::UFSHostDevice | private |
| Group()=delete | gem5::statistics::Group | |
| Group(const Group &)=delete | gem5::statistics::Group | |
| Group(Group *parent, const char *name=nullptr) | gem5::statistics::Group | |
| idlePhaseStart | gem5::UFSHostDevice | private |
| init() override | gem5::DmaDevice | virtual |
| initState() | gem5::SimObject | virtual |
| intNum | gem5::UFSHostDevice | private |
| loadState(CheckpointIn &cp) | gem5::SimObject | virtual |
| lunAvail | gem5::UFSHostDevice | private |
| LUNSignal() | gem5::UFSHostDevice | private |
| manageReadTransfer(uint32_t size, uint32_t LUN, uint64_t offset, uint32_t sg_table_length, struct UFSHCDSGEntry *sglist) | gem5::UFSHostDevice | private |
| manageWriteTransfer(uint8_t LUN, uint64_t offset, uint32_t sg_table_length, struct UFSHCDSGEntry *sglist) | gem5::UFSHostDevice | private |
| memInvalidate() | gem5::SimObject | inlinevirtual |
| memWriteback() | gem5::SimObject | inlinevirtual |
| mergedParent | gem5::statistics::Group | private |
| mergedStatGroups | gem5::statistics::Group | private |
| mergeStatGroup(Group *block) | gem5::statistics::Group | |
| name() const | gem5::Named | inlinevirtual |
| Named(const std::string &name_) | gem5::Named | inline |
| nextCycle() const | gem5::Clocked | inline |
| notifyFork() | gem5::Drainable | inlinevirtual |
| gem5::operator=(const Group &)=delete | gem5::statistics::Group | |
| gem5::Clocked::operator=(Clocked &)=delete | gem5::Clocked | protected |
| params() const | gem5::SimObject | inline |
| Params typedef | gem5::DmaDevice | |
| path | gem5::Serializable | privatestatic |
| pendingDoorbells | gem5::UFSHostDevice | private |
| pioAddr | gem5::UFSHostDevice | private |
| pioDelay | gem5::UFSHostDevice | private |
| PioDevice(const Params &p) | gem5::PioDevice | |
| pioPort | gem5::PioDevice | protected |
| pioSize | gem5::UFSHostDevice | private |
| powerState | gem5::ClockedObject | |
| preDumpStats() | gem5::statistics::Group | virtual |
| probeManager | gem5::SimObject | private |
| read(PacketPtr pkt) override | gem5::UFSHostDevice | privatevirtual |
| readCallback() | gem5::UFSHostDevice | private |
| readDevice(bool lastTransfer, Addr SCSIStart, uint32_t SCSISize, uint8_t *SCSIDestination, bool no_cache, Event *additional_action) | gem5::UFSHostDevice | private |
| readDone() | gem5::UFSHostDevice | private |
| readDoneEvent | gem5::UFSHostDevice | private |
| readGarbage() | gem5::UFSHostDevice | private |
| readGarbageEventQueue | gem5::UFSHostDevice | private |
| readPendingNum | gem5::UFSHostDevice | private |
| regControllerCapabilities enum value | gem5::UFSHostDevice | private |
| regControllerDEVID enum value | gem5::UFSHostDevice | private |
| regControllerEnable enum value | gem5::UFSHostDevice | private |
| regControllerPRODID enum value | gem5::UFSHostDevice | private |
| regControllerStatus enum value | gem5::UFSHostDevice | private |
| regInterruptEnable enum value | gem5::UFSHostDevice | private |
| regInterruptStatus enum value | gem5::UFSHostDevice | private |
| regProbeListeners() | gem5::SimObject | virtual |
| regProbePoints() | gem5::SimObject | virtual |
| regStats() | gem5::statistics::Group | virtual |
| regUFSVersion enum value | gem5::UFSHostDevice | private |
| regUICCommand enum value | gem5::UFSHostDevice | private |
| regUICCommandArg1 enum value | gem5::UFSHostDevice | private |
| regUICCommandArg2 enum value | gem5::UFSHostDevice | private |
| regUICCommandArg3 enum value | gem5::UFSHostDevice | private |
| regUICErrorCodeDataLinkLayer enum value | gem5::UFSHostDevice | private |
| regUICErrorCodeDME enum value | gem5::UFSHostDevice | private |
| regUICErrorCodeNetworkLayer enum value | gem5::UFSHostDevice | private |
| regUICErrorCodePHYAdapterLayer enum value | gem5::UFSHostDevice | private |
| regUICErrorCodeTransportLayer enum value | gem5::UFSHostDevice | private |
| regUTPTaskREQDoorbell enum value | gem5::UFSHostDevice | private |
| regUTPTaskREQListBaseH enum value | gem5::UFSHostDevice | private |
| regUTPTaskREQListBaseL enum value | gem5::UFSHostDevice | private |
| regUTPTaskREQListClear enum value | gem5::UFSHostDevice | private |
| regUTPTaskREQListRunStop enum value | gem5::UFSHostDevice | private |
| regUTPTransferREQDoorbell enum value | gem5::UFSHostDevice | private |
| regUTPTransferREQINTAGGControl enum value | gem5::UFSHostDevice | private |
| regUTPTransferREQListBaseH enum value | gem5::UFSHostDevice | private |
| regUTPTransferREQListBaseL enum value | gem5::UFSHostDevice | private |
| regUTPTransferREQListClear enum value | gem5::UFSHostDevice | private |
| regUTPTransferREQListRunStop enum value | gem5::UFSHostDevice | private |
| request_out_datain | gem5::UFSHostDevice | private |
| requestHandler() | gem5::UFSHostDevice | private |
| reschedule(Event &event, Tick when, bool always=false) | gem5::EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | gem5::EventManager | inline |
| resetClock() const | gem5::Clocked | inlineprotected |
| resetStats() | gem5::statistics::Group | virtual |
| resolveStat(std::string name) const | gem5::statistics::Group | |
| schedule(Event &event, Tick when) | gem5::EventManager | inline |
| schedule(Event *event, Tick when) | gem5::EventManager | inline |
| SCSIInfo | gem5::UFSHostDevice | private |
| SCSIResume(uint32_t lun_id) | gem5::UFSHostDevice | private |
| SCSIResumeEvent | gem5::UFSHostDevice | private |
| SCSIStart() | gem5::UFSHostDevice | private |
| Serializable() | gem5::Serializable | |
| serialize(CheckpointOut &cp) const override | gem5::UFSHostDevice | virtual |
| serializeAll(const std::string &cpt_dir) | gem5::SimObject | static |
| serializeSection(CheckpointOut &cp, const char *name) const | gem5::Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | gem5::Serializable | inline |
| setCurTick(Tick newVal) | gem5::EventManager | inline |
| setSimObjectResolver(SimObjectResolver *resolver) | gem5::SimObject | static |
| setValues() | gem5::UFSHostDevice | private |
| signalDrainDone() const | gem5::Drainable | inlineprotected |
| SimObject(const Params &p) | gem5::SimObject | |
| simObjectList | gem5::SimObject | privatestatic |
| SimObjectList typedef | gem5::SimObject | private |
| SSDReadPending | gem5::UFSHostDevice | private |
| SSDWriteinfo | gem5::UFSHostDevice | private |
| startup() | gem5::SimObject | virtual |
| statGroups | gem5::statistics::Group | private |
| stats | gem5::UFSHostDevice | private |
| sys | gem5::PioDevice | protected |
| taskCommandTrack | gem5::UFSHostDevice | private |
| taskEventQueue | gem5::UFSHostDevice | private |
| taskHandler(struct UTPUPIUTaskReq *request_in, uint32_t req_pos, Addr finaladdress, uint32_t finalsize) | gem5::UFSHostDevice | private |
| taskInfo | gem5::UFSHostDevice | private |
| taskStart() | gem5::UFSHostDevice | private |
| tick | gem5::Clocked | mutableprivate |
| ticksToCycles(Tick t) const | gem5::Clocked | inline |
| transactionStart | gem5::UFSHostDevice | private |
| transferDone(Addr responseStartAddr, uint32_t req_pos, struct UTPUPIURSP request_out, uint32_t size, Addr address, uint8_t *destination, bool finished, uint32_t lun_id) | gem5::UFSHostDevice | private |
| transferEnd | gem5::UFSHostDevice | private |
| transferEventQueue | gem5::UFSHostDevice | private |
| transferHandler(struct UTPTransferReqDesc *request_in, int req_pos, Addr finaladdress, uint32_t finalsize, uint32_t done) | gem5::UFSHostDevice | private |
| transferStart() | gem5::UFSHostDevice | private |
| transferStartInfo | gem5::UFSHostDevice | private |
| transferTrack | gem5::UFSHostDevice | private |
| UFSDevice | gem5::UFSHostDevice | private |
| UFSHCIMem | gem5::UFSHostDevice | private |
| UFSHCIRegisters enum name | gem5::UFSHostDevice | private |
| UFSHostDevice(const UFSHostDeviceParams &p) | gem5::UFSHostDevice | |
| UFSSlots | gem5::UFSHostDevice | private |
| UICCommandCOMPL | gem5::UFSHostDevice | privatestatic |
| UICCommandReady | gem5::UFSHostDevice | privatestatic |
| unserialize(CheckpointIn &cp) override | gem5::UFSHostDevice | virtual |
| unserializeSection(CheckpointIn &cp, const char *name) | gem5::Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | gem5::Serializable | inline |
| update() const | gem5::Clocked | inlineprivate |
| updateClockPeriod() | gem5::Clocked | inline |
| UTPEvent | gem5::UFSHostDevice | private |
| UTPTaskREQCOMPL | gem5::UFSHostDevice | privatestatic |
| UTPTransferREQCOMPL | gem5::UFSHostDevice | privatestatic |
| voltage() const | gem5::Clocked | inline |
| wakeupEventQueue(Tick when=(Tick) -1) | gem5::EventManager | inline |
| write(PacketPtr pkt) override | gem5::UFSHostDevice | privatevirtual |
| writeDevice(Event *additional_action, bool toDisk, Addr start, int size, uint8_t *destination, uint64_t SCSIDiskOffset, uint32_t lun_id) | gem5::UFSHostDevice | private |
| writeDone() | gem5::UFSHostDevice | private |
| writeDoneEvent | gem5::UFSHostDevice | private |
| writePendingNum | gem5::UFSHostDevice | private |
| ~Clocked() | gem5::Clocked | inlineprotectedvirtual |
| ~DmaDevice()=default | gem5::DmaDevice | virtual |
| ~Drainable() | gem5::Drainable | protectedvirtual |
| ~Group() | gem5::statistics::Group | virtual |
| ~Named()=default | gem5::Named | virtual |
| ~PioDevice() | gem5::PioDevice | virtual |
| ~Serializable() | gem5::Serializable | virtual |
| ~SimObject() | gem5::SimObject | virtual |