gem5  v21.1.0.2
gem5::ruby::Sequencer Member List

This is the complete list of members for gem5::ruby::Sequencer, including all inherited members.

_drainManagergem5::Drainableprivate
_drainStategem5::Drainablemutableprivate
_namegem5::Namedprivate
_objNameResolvergem5::SimObjectprivatestatic
_paramsgem5::SimObjectprotected
addStat(statistics::Info *info)gem5::statistics::Group
addStatGroup(const char *name, Group *block)gem5::statistics::Group
addToRetryList(MemResponsePort *port)gem5::ruby::RubyPortinlineprivate
clockDomaingem5::Clockedprivate
Clocked(ClockDomain &clk_domain)gem5::Clockedinlineprotected
Clocked(Clocked &)=deletegem5::Clockedprotected
clockEdge(Cycles cycles=Cycles(0)) constgem5::Clockedinline
ClockedObject(const ClockedObjectParams &p)gem5::ClockedObject
clockPeriod() constgem5::Clockedinline
clockPeriodUpdated()gem5::Clockedinlineprotectedvirtual
collateStats()gem5::ruby::Sequencer
coreId() constgem5::ruby::Sequencerinline
CpuPortIter typedefgem5::ruby::RubyPortprivate
curCycle() constgem5::Clockedinline
currentSection()gem5::Serializablestatic
cyclegem5::Clockedmutableprivate
cyclesToTicks(Cycles c) constgem5::Clockedinline
deadlockCheckEventgem5::ruby::Sequencerprivate
deschedule(Event &event)gem5::EventManagerinline
deschedule(Event *event)gem5::EventManagerinline
descheduleDeadlockEvent() overridegem5::ruby::Sequencerinlinevirtual
dmDrain()gem5::Drainableprivate
dmDrainResume()gem5::Drainableprivate
drain() overridegem5::ruby::RubyPortvirtual
Drainable()gem5::Drainableprotected
drainResume()gem5::Drainableinlineprotectedvirtual
drainState() constgem5::Drainableinline
empty() constgem5::ruby::Sequencervirtual
EventManager(EventManager &em)gem5::EventManagerinline
EventManager(EventManager *em)gem5::EventManagerinline
EventManager(EventQueue *eq)gem5::EventManagerinline
eventqgem5::EventManagerprotected
eventQueue() constgem5::EventManagerinline
evictionCallback(Addr address)gem5::ruby::Sequencer
find(const char *name)gem5::SimObjectstatic
frequency() constgem5::Clockedinline
functionalWrite(Packet *func_pkt) overridegem5::ruby::Sequencervirtual
generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream)gem5::Serializablestatic
getFirstResponseToCompletionDelayHist(const MachineType t) constgem5::ruby::Sequencerinline
getForwardRequestToFirstResponseHist(const MachineType t) constgem5::ruby::Sequencerinline
getHitLatencyHist()gem5::ruby::Sequencerinline
getHitMachLatencyHist(uint32_t t)gem5::ruby::Sequencerinline
getHitTypeLatencyHist(uint32_t t)gem5::ruby::Sequencerinline
getHitTypeMachLatencyHist(uint32_t r, uint32_t t)gem5::ruby::Sequencerinline
getId()gem5::ruby::RubyPortinline
getIncompleteTimes(const MachineType t) constgem5::ruby::Sequencerinline
getInitialToForwardDelayHist(const MachineType t) constgem5::ruby::Sequencerinline
getIssueToInitialDelayHist(uint32_t t) constgem5::ruby::Sequencerinline
getLatencyHist()gem5::ruby::Sequencerinline
getMissLatencyHist()gem5::ruby::Sequencerinline
getMissMachLatencyHist(uint32_t t) constgem5::ruby::Sequencerinline
getMissTypeLatencyHist(uint32_t t)gem5::ruby::Sequencerinline
getMissTypeMachLatencyHist(uint32_t r, uint32_t t) constgem5::ruby::Sequencerinline
getOutstandReqHist()gem5::ruby::Sequencerinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overridegem5::ruby::RubyPortvirtual
getProbeManager()gem5::SimObject
getSimObjectResolver()gem5::SimObjectstatic
getStatGroups() constgem5::statistics::Group
getStats() constgem5::statistics::Group
getTypeLatencyHist(uint32_t t)gem5::ruby::Sequencerinline
gotAddrRangesgem5::ruby::RubyPortprivate
Group()=deletegem5::statistics::Group
Group(const Group &)=deletegem5::statistics::Group
Group(Group *parent, const char *name=nullptr)gem5::statistics::Group
hitCallback(SequencerRequest *srequest, DataBlock &data, bool llscSuccess, const MachineType mach, const bool externalHit, const Cycles initialRequestTime, const Cycles forwardRequestTime, const Cycles firstResponseTime, const bool was_coalesced)gem5::ruby::Sequencerprivate
init() overridegem5::ruby::RubyPortvirtual
initState()gem5::SimObjectvirtual
insertRequest(PacketPtr pkt, RubyRequestType primary_type, RubyRequestType secondary_type)gem5::ruby::Sequencerprotectedvirtual
isCPUSequencer()gem5::ruby::RubyPortinline
isDeadlockEventScheduled() const overridegem5::ruby::Sequencerinlinevirtual
issueRequest(PacketPtr pkt, RubyRequestType type)gem5::ruby::Sequencerprivate
llscCheckMonitor(const Addr)gem5::ruby::Sequencer
llscClearLocalMonitor()gem5::ruby::Sequencer
llscClearMonitor(const Addr)gem5::ruby::Sequencerprivate
llscLoadLinked(const Addr)gem5::ruby::Sequencerprivate
llscStoreConditional(const Addr)gem5::ruby::Sequencerprivate
loadState(CheckpointIn &cp)gem5::SimObjectvirtual
m_controllergem5::ruby::RubyPortprotected
m_coreIdgem5::ruby::Sequencerprivate
m_data_cache_hit_latencygem5::ruby::Sequencerprivate
m_dataCache_ptrgem5::ruby::Sequencerprivate
m_deadlock_check_scheduledgem5::ruby::Sequencerprivate
m_deadlock_thresholdgem5::ruby::Sequencerprotected
m_FirstResponseToCompletionDelayHistgem5::ruby::Sequencerprivate
m_ForwardToFirstResponseDelayHistgem5::ruby::Sequencerprivate
m_hitLatencyHistgem5::ruby::Sequencerprivate
m_hitMachLatencyHistgem5::ruby::Sequencerprivate
m_hitTypeLatencyHistgem5::ruby::Sequencerprivate
m_hitTypeMachLatencyHistgem5::ruby::Sequencerprivate
m_IncompleteTimesgem5::ruby::Sequencerprivate
m_InitialToForwardDelayHistgem5::ruby::Sequencerprivate
m_inst_cache_hit_latencygem5::ruby::Sequencerprivate
m_isCPUSequencergem5::ruby::RubyPortprivate
m_IssueToInitialDelayHistgem5::ruby::Sequencerprivate
m_latencyHistgem5::ruby::Sequencerprivate
m_mandatory_q_ptrgem5::ruby::RubyPortprotected
m_max_outstanding_requestsgem5::ruby::Sequencerprivate
m_missLatencyHistgem5::ruby::Sequencerprivate
m_missMachLatencyHistgem5::ruby::Sequencerprivate
m_missTypeLatencyHistgem5::ruby::Sequencerprivate
m_missTypeMachLatencyHistgem5::ruby::Sequencerprivate
m_outstanding_countgem5::ruby::Sequencerprivate
m_outstandReqHistgem5::ruby::Sequencerprivate
m_RequestTablegem5::ruby::Sequencerprotected
m_ruby_systemgem5::ruby::RubyPortprotected
m_runningGarnetStandalonegem5::ruby::Sequencerprivate
m_typeLatencyHistgem5::ruby::Sequencerprivate
m_usingRubyTestergem5::ruby::RubyPortprotected
m_versiongem5::ruby::RubyPortprotected
makeRequest(PacketPtr pkt) overridegem5::ruby::Sequencervirtual
markRemoved()gem5::ruby::Sequencer
memInvalidate()gem5::SimObjectinlinevirtual
memRequestPortgem5::ruby::RubyPortprivate
memResponsePortgem5::ruby::RubyPortprivate
memWriteback()gem5::SimObjectinlinevirtual
mergedParentgem5::statistics::Groupprivate
mergedStatGroupsgem5::statistics::Groupprivate
mergeStatGroup(Group *block)gem5::statistics::Group
name() constgem5::Namedinlinevirtual
Named(const std::string &name_)gem5::Namedinline
nextCycle() constgem5::Clockedinline
notifyFork()gem5::Drainableinlinevirtual
onRetryList(MemResponsePort *port)gem5::ruby::RubyPortinlineprivate
operator=(const Sequencer &obj)gem5::ruby::Sequencerprivate
gem5::ruby::RubyPort::operator=(const Group &)=deletegem5::statistics::Group
gem5::ruby::RubyPort::operator=(Clocked &)=deletegem5::Clockedprotected
outstandingCount() const overridegem5::ruby::Sequencerinlinevirtual
params() constgem5::SimObjectinline
Params typedefgem5::ruby::Sequencer
pathgem5::Serializableprivatestatic
pioRequestPortgem5::ruby::RubyPortprivate
pioResponsePortgem5::ruby::RubyPortprivate
powerStategem5::ClockedObject
preDumpStats()gem5::statistics::Groupvirtual
print(std::ostream &out) constgem5::ruby::Sequencervirtual
probeManagergem5::SimObjectprivate
readCallback(Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0))gem5::ruby::Sequencer
recordMissLatency(SequencerRequest *srequest, bool llscSuccess, const MachineType respondingMach, bool isExternalHit, Cycles initialRequestTime, Cycles forwardRequestTime, Cycles firstResponseTime)gem5::ruby::Sequencerprivate
recordRequestType(SequencerRequestType requestType)gem5::ruby::Sequencer
recvTimingResp(PacketPtr pkt, PortID request_port_id)gem5::ruby::RubyPortprotected
regProbeListeners()gem5::SimObjectvirtual
regProbePoints()gem5::SimObjectvirtual
regStats()gem5::statistics::Groupvirtual
request_portsgem5::ruby::RubyPortprivate
reschedule(Event &event, Tick when, bool always=false)gem5::EventManagerinline
reschedule(Event *event, Tick when, bool always=false)gem5::EventManagerinline
resetClock() constgem5::Clockedinlineprotected
resetStats() overridegem5::ruby::Sequencervirtual
resolveStat(std::string name) constgem5::statistics::Group
response_portsgem5::ruby::RubyPortprotected
retryListgem5::ruby::RubyPortprivate
ruby_eviction_callback(Addr address)gem5::ruby::RubyPortprotected
ruby_hit_callback(PacketPtr pkt)gem5::ruby::RubyPortprotected
RubyPort(const Params &p)gem5::ruby::RubyPort
schedule(Event &event, Tick when)gem5::EventManagerinline
schedule(Event *event, Tick when)gem5::EventManagerinline
Sequencer(const Params &)gem5::ruby::Sequencer
Sequencer(const Sequencer &obj)gem5::ruby::Sequencerprivate
Serializable()gem5::Serializable
serialize(CheckpointOut &cp) const overridegem5::ClockedObjectvirtual
serializeAll(const std::string &cpt_dir)gem5::SimObjectstatic
serializeSection(CheckpointOut &cp, const char *name) constgem5::Serializable
serializeSection(CheckpointOut &cp, const std::string &name) constgem5::Serializableinline
setController(AbstractController *_cntrl)gem5::ruby::RubyPortinline
setCurTick(Tick newVal)gem5::EventManagerinline
setSimObjectResolver(SimObjectResolver *resolver)gem5::SimObjectstatic
signalDrainDone() constgem5::Drainableinlineprotected
SimObject(const Params &p)gem5::SimObject
simObjectListgem5::SimObjectprivatestatic
SimObjectList typedefgem5::SimObjectprivate
startup()gem5::SimObjectvirtual
statGroupsgem5::statistics::Groupprivate
statsgem5::statistics::Groupprivate
systemgem5::ruby::RubyPortprotected
testDrainComplete()gem5::ruby::RubyPortprotected
tickgem5::Clockedmutableprivate
ticksToCycles(Tick t) constgem5::Clockedinline
trySendRetries()gem5::ruby::RubyPortprotected
unserialize(CheckpointIn &cp) overridegem5::ClockedObjectvirtual
unserializeSection(CheckpointIn &cp, const char *name)gem5::Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)gem5::Serializableinline
update() constgem5::Clockedinlineprivate
updateClockPeriod()gem5::Clockedinline
voltage() constgem5::Clockedinline
wakeup()gem5::ruby::Sequencervirtual
wakeupEventQueue(Tick when=(Tick) -1)gem5::EventManagerinline
writeCallback(Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0), const bool noCoales=false)gem5::ruby::Sequencer
writeCallbackScFail(Addr address, DataBlock &data)gem5::ruby::Sequencer
writeUniqueCallback(Addr address, DataBlock &data)gem5::ruby::Sequencerinline
~Clocked()gem5::Clockedinlineprotectedvirtual
~Drainable()gem5::Drainableprotectedvirtual
~Group()gem5::statistics::Groupvirtual
~Named()=defaultgem5::Namedvirtual
~RubyPort()gem5::ruby::RubyPortinlinevirtual
~Sequencer()gem5::ruby::Sequencer
~Serializable()gem5::Serializablevirtual
~SimObject()gem5::SimObjectvirtual

Generated on Tue Sep 21 2021 12:32:09 for gem5 by doxygen 1.8.17