gem5 v24.0.0.0
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increment.h
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1/*****************************************************************************
2
3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4 more contributor license agreements. See the NOTICE file distributed
5 with this work for additional information regarding copyright ownership.
6 Accellera licenses this file to you under the Apache License, Version 2.0
7 (the "License"); you may not use this file except in compliance with the
8 License. You may obtain a copy of the License at
9
10 http://www.apache.org/licenses/LICENSE-2.0
11
12 Unless required by applicable law or agreed to in writing, software
13 distributed under the License is distributed on an "AS IS" BASIS,
14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15 implied. See the License for the specific language governing
16 permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22 increment.h --
23
24 Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31 changes you are making here.
32
33 Name, Affiliation, Date:
34 Description of Modification:
35
36 *****************************************************************************/
37
38#include "common.h"
39
40SC_MODULE( increment )
41{
42 SC_HAS_PROCESS( increment );
43
44 sc_in_clk clk;
45
46 //====================================================================
47 // [C] Always Needed Member Function
48 // -- constructor
49 // -- entry
50 //====================================================================
51
52 const sc_signal<bool>& reset ;
53 const sc_signal<int>& in_value1; // Input port
54 const sc_signal_bool_vector& in_value2; // Input port
55 const sc_signal<bool>& in_valid; // Input port
56 sc_signal<int>& out_value1; // Output port
57 sc_signal_bool_vector& out_value2; // Output port
58 sc_signal<bool>& out_valid; // Output port
59
60 //
61 // Constructor
62 //
63
64 increment (
65 sc_module_name NAME, // referense name
66 sc_clock& CLK, // clock
67 const sc_signal<bool>& RESET,
68 const sc_signal<int>& IN_VALUE1,
69 const sc_signal_bool_vector& IN_VALUE2,
70 const sc_signal<bool>& IN_VALID, // Input port
71 sc_signal<int>& OUT_VALUE1,
72 sc_signal_bool_vector& OUT_VALUE2,
73 sc_signal<bool>& OUT_VALID // Output port
74 )
75 :
76 reset (RESET),
77 in_value1 (IN_VALUE1),
78 in_value2 (IN_VALUE2),
79 in_valid (IN_VALID),
80 out_value1 (OUT_VALUE1),
81 out_value2 (OUT_VALUE2),
82 out_valid (OUT_VALID)
83
84 {
85 clk (CLK);
86 SC_CTHREAD( entry, clk.pos() );
87 reset_signal_is(reset,true);
88 };
89
90 //
91
92 void entry ();
93
94};
95
96// EOF
sc_signal< sc_bv< 8 > > sc_signal_bool_vector
Definition common.h:43
#define SC_CTHREAD(name, clk)
Definition sc_module.hh:323
#define SC_MODULE(name)
Definition sc_module.hh:295
#define SC_HAS_PROCESS(name)
Definition sc_module.hh:301

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