Here is a list of all variables with links to the classes they belong to:

- o -

• oacMask : gem5::GEM5_PACKED
• obj : gem5::RequestorInfo
• object : gem5::ProbeListenerArg< T, Arg >, gem5::ProbeManager, gem5::statistics::MethodProxy< T, V >, gem5::Ticked
• objectParamsByName : gem5::CxxConfigManager
• objectsByName : gem5::CxxConfigManager
• objectsInOrder : gem5::CxxConfigManager
• objFile : gem5::Process
• objName : gem5::DistEtherLink::Link, gem5::EtherLink::Link, gem5::EtherSwitch::Interface::PortFifo, gem5::EventQueue
• objs : sc_core::sc_vector_base
• occupancies : gem5::BaseTags::BaseTagStats
• occupanciesTaskId : gem5::BaseTags::BaseTagStats
• occupancy : gem5::BaseXBar::Layer< SrcType, DstType >, gem5::branch_prediction::MultiperspectivePerceptron::ThreadData, gem5::minor::SelfStallingPipeline< ElemType, ReportTraits, BubbleTraits >
• oe : gem5::PowerISA::IntOp
• oemID : gem5::X86ISA::ACPI::RSDP::MemR0, gem5::X86ISA::ACPI::SysDescTable::Mem, gem5::X86ISA::intelmp::ConfigTable
• oemRevision : gem5::X86ISA::ACPI::SysDescTable::Mem
• oemTableAddr : gem5::X86ISA::intelmp::ConfigTable
• oemTableID : gem5::X86ISA::ACPI::SysDescTable::Mem
• oemTableSize : gem5::X86ISA::intelmp::ConfigTable
• OFF_DEVICE_FEATURES : gem5::PciVirtIO
• OFF_DEVICE_STATUS : gem5::PciVirtIO
• OFF_GUEST_FEATURES : gem5::PciVirtIO
• OFF_ISR_STATUS : gem5::PciVirtIO
• OFF_QUEUE_ADDRESS : gem5::PciVirtIO
• OFF_QUEUE_NOTIFY : gem5::PciVirtIO
• OFF_QUEUE_SELECT : gem5::PciVirtIO
• OFF_QUEUE_SIZE : gem5::PciVirtIO
• OFF_VIO_DEVICE : gem5::PciVirtIO
• offChipMemoryLatency : gem5::prefetch::AccessMapPatternMatching
• OFFEN : gem5::VegaISA::InFmt_MTBUF, gem5::VegaISA::InFmt_MUBUF
• offleadPolling : gem5::GEM5_PACKED
• offlg : gem5::networking::ip6_opt_fragment
• OFFSET : gem5::VegaISA::InFmt_FLAT, gem5::VegaISA::InFmt_MTBUF, gem5::VegaISA::InFmt_MUBUF, gem5::VegaISA::InFmt_SMEM_1
• offset : gem5::ArmISA::ArmFault::FaultVals, gem5::ArmISA::Decoder, gem5::ArmISA::MemoryReg64, gem5::ArmISA::SveContigMemSS, gem5::ArmISA::SveIndexedMemSV< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType >, gem5::ArmISA::SveLdStructSS< Element, MicroopLdMemType, MicroopDeIntrlvType >, gem5::ArmISA::SveStStructSS< Element, MicroopStMemType, MicroopIntrlvType >, gem5::BmpWriter::FileHeader, gem5::GEM5_PACKED, gem5::GenericWatchdog, gem5::Gicv3Its, gem5::HDLcd, gem5::Intel8254Timer::Counter, gem5::MC146818::RTCEvent, gem5::MC146818::RTCTickEvent, gem5::MipsISA::MipsFaultBase::FaultVals, gem5::PixelConverter::Channel, gem5::prefetch::STeMS::ActiveGenerationTableEntry::SequenceEntry, gem5::qemu::FwCfg, gem5::RegisterBank< BankByteOrder >::RegisterAdder, gem5::RiscvISA::MemInst, gem5::RiscvISA::VectorMemMicroInst, gem5::SparcISA::BlockMemMicro, gem5::statistics::VectorProxy< Stat >, gem5::StridedGen, gem5::UFSHostDevice::SCSIReply, gem5::UFSHostDevice::transferInfo, gem5::X86ISA::Decoder
• OFFSET0 : gem5::VegaISA::InFmt_DS
• OFFSET1 : gem5::VegaISA::InFmt_DS
• offsetBits : gem5::bloom_filter::Base, gem5::o3::StoreSet
• offsetFormat : gem5::ArmISA::SveAdrOp
• offsetIs32 : gem5::ArmISA::SveIndexedMemSV< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType >
• offsetIsScaled : gem5::ArmISA::SveIndexedMemSV< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType >
• offsetIsSigned : gem5::ArmISA::SveIndexedMemSV< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType >
• OffsetMask : gem5::MipsISA::PTE, gem5::PowerISA::PTE
• offsetMask : gem5::EmulationPageTable
• offsets : gem5::WalkCache
• offsetsList : gem5::prefetch::BOP
• offsetsListIterator : gem5::prefetch::BOP
• old : LoggingFixture
• old_eq : gem5::EventQueue::ScopedMigration
• oldData : gem5::CacheDataUpdateProbeArg
• oldDgpr : gem5::Wavefront
• oldDgprId : gem5::Wavefront
• oldDgprTcnt : gem5::Wavefront
• oldestInFlightRobNum : gem5::TraceCPU::ElasticDataGen::HardwareResource
• oldestInst : gem5::o3::InstructionQueue::ListOrderEntry
• oldR11Val : gem5::trace::X86NativeTrace
• oldRcxVal : gem5::trace::X86NativeTrace
• oldRealR11Val : gem5::trace::X86NativeTrace
• oldRealRcxVal : gem5::trace::X86NativeTrace
• oldStamp : sc_gem5::TraceVal<::sc_core::sc_event, Base >
• oldState : gem5::trace::ArmNativeTrace::ThreadState
• oldVal : sc_gem5::TraceVal< T, Base >, sc_gem5::TraceVal<::sc_core::sc_signal_in_if< T >, Base >, sc_gem5::TraceValFxnumBase< T, Base >
• oldVgpr : gem5::Wavefront
• oldVgprId : gem5::Wavefront
• oldVgprTcnt : gem5::Wavefront
• OMOD : gem5::VegaISA::InFmt_VOP3_1, gem5::VegaISA::InFmt_VOP_SDWA
• once : gem5::GenericISA::M5DebugOnceFault< Flavor >
• onData : gem5::prefetch::Base
• oneTraceComplete : gem5::TraceCPU
• ongoingTranslation : gem5::prefetch::Queued::DeferredPacket
• onInst : gem5::prefetch::Base
• onMiss : gem5::prefetch::Base
• onRead : gem5::prefetch::Base
• onTheFlyRequests : gem5::GUPSGen
• onUse : gem5::ArmISA::BrkPoint
• onWrite : gem5::prefetch::Base
• oobMask : gem5::VegaISA::Inst_MUBUF
• OP : gem5::VegaISA::InFmt_DS, gem5::VegaISA::InFmt_FLAT, gem5::VegaISA::InFmt_MIMG, gem5::VegaISA::InFmt_MTBUF, gem5::VegaISA::InFmt_MUBUF, gem5::VegaISA::InFmt_SMEM, gem5::VegaISA::InFmt_SOP1, gem5::VegaISA::InFmt_SOP2, gem5::VegaISA::InFmt_SOPC, gem5::VegaISA::InFmt_SOPK, gem5::VegaISA::InFmt_SOPP, gem5::VegaISA::InFmt_VINTRP, gem5::VegaISA::InFmt_VOP1, gem5::VegaISA::InFmt_VOP2, gem5::VegaISA::InFmt_VOP3A, gem5::VegaISA::InFmt_VOP3B, gem5::VegaISA::InFmt_VOP3P, gem5::VegaISA::InFmt_VOP3P_MAI, gem5::VegaISA::InFmt_VOPC
• op : gem5::AtomicGeneric2Op< T >, gem5::AtomicGeneric3Op< T >, gem5::AtomicGenericPair3Op< T >, gem5::GEM5_PACKED, gem5::MathExpr::Node, gem5::MathExpr::OpSearch, gem5::RiscvISA::AtomicGenericOp< T >, gem5::TimingExprBin, gem5::TimingExprUn, gem5::X86ISA::ExtMachInst, Gem5SystemC::AtomicExtension
• op0 : gem5::ArmISA::MiscRegNum64
• op1 : gem5::ArmISA::BranchEretA64, gem5::ArmISA::BranchImmImmReg64, gem5::ArmISA::BranchImmReg64, gem5::ArmISA::BranchImmReg, gem5::ArmISA::BranchReg64, gem5::ArmISA::BranchReg, gem5::ArmISA::BranchRegReg64, gem5::ArmISA::BranchRegReg, gem5::ArmISA::DataImmOp, gem5::ArmISA::DataRegOp, gem5::ArmISA::DataRegRegOp, gem5::ArmISA::DataX1Reg2ImmOp, gem5::ArmISA::DataX1RegImmOp, gem5::ArmISA::DataX1RegOp, gem5::ArmISA::DataX2RegImmOp, gem5::ArmISA::DataX2RegOp, gem5::ArmISA::DataX3RegOp, gem5::ArmISA::DataXCondCompImmOp, gem5::ArmISA::DataXCondCompRegOp, gem5::ArmISA::DataXCondSelOp, gem5::ArmISA::DataXERegOp, gem5::ArmISA::DataXImmOp, gem5::ArmISA::DataXSRegOp, gem5::ArmISA::FpCondCompRegOp, gem5::ArmISA::FpCondSelOp, gem5::ArmISA::FpRegRegImmOp, gem5::ArmISA::FpRegRegOp, gem5::ArmISA::FpRegRegRegCondOp, gem5::ArmISA::FpRegRegRegImmOp, gem5::ArmISA::FpRegRegRegOp, gem5::ArmISA::FpRegRegRegRegOp, gem5::ArmISA::MicroNeonMixLaneOp64, gem5::ArmISA::MicroNeonMixOp64, gem5::ArmISA::MicroNeonMixOp, gem5::ArmISA::MiscRegNum64, gem5::ArmISA::SmeAddOp, gem5::ArmISA::SmeAddVlOp, gem5::ArmISA::SmeLd1xSt1xOp, gem5::ArmISA::SmeLdrStrOp, gem5::ArmISA::SmeMovExtractOp, gem5::ArmISA::SmeMovInsertOp, gem5::ArmISA::SmeOPOp, gem5::ArmISA::SveAdrOp, gem5::ArmISA::SveBinConstrPredOp, gem5::ArmISA::SveBinIdxUnpredOp, gem5::ArmISA::SveBinImmIdxUnpredOp, gem5::ArmISA::SveBinImmUnpredConstrOp, gem5::ArmISA::SveBinImmUnpredDestrOp, gem5::ArmISA::SveBinUnpredOp, gem5::ArmISA::SveClampOp, gem5::ArmISA::SveCmpImmOp, gem5::ArmISA::SveCmpOp, gem5::ArmISA::SveComplexIdxOp, gem5::ArmISA::SveComplexOp, gem5::ArmISA::SveCompTermOp, gem5::ArmISA::SveDotProdIdxOp, gem5::ArmISA::SveDotProdOp, gem5::ArmISA::SveIndexRIOp, gem5::ArmISA::SveIndexRROp, gem5::ArmISA::SveIntCmpImmOp, gem5::ArmISA::SveIntCmpOp, gem5::ArmISA::SveOrdReducOp, gem5::ArmISA::SvePartBrkOp, gem5::ArmISA::SvePartBrkPropOp, gem5::ArmISA::SvePredBinPermOp, gem5::ArmISA::SvePredCountPredOp, gem5::ArmISA::SvePredLogicalOp, gem5::ArmISA::SvePredTestOp, gem5::ArmISA::SvePredUnaryWImplicitDstOp, gem5::ArmISA::SvePselOp, gem5::ArmISA::SveReducOp, gem5::ArmISA::SveSelectOp, gem5::ArmISA::SveTblOp, gem5::ArmISA::SveTerPredOp, gem5::ArmISA::SveTerUnpredOp, gem5::ArmISA::SveUnaryPredOp, gem5::ArmISA::SveUnaryPredPredOp, gem5::ArmISA::SveUnarySca2VecUnpredOp, gem5::ArmISA::SveUnaryUnpredOp, gem5::ArmISA::SveUnpackOp, gem5::ArmISA::SveWhileOp, gem5::McrrOp, gem5::MiscRegRegImmOp64, gem5::MiscRegRegImmOp, gem5::MrrcOp, gem5::MsrRegOp, gem5::RegImmImmOp64, gem5::RegImmRegOp, gem5::RegImmRegShiftOp, gem5::RegMiscRegImmOp64, gem5::RegMiscRegImmOp, gem5::RegOp64, gem5::RegRegImmImmOp64, gem5::RegRegImmImmOp, gem5::RegRegImmOp, gem5::RegRegOp, gem5::RegRegRegImmOp64, gem5::RegRegRegImmOp, gem5::RegRegRegOp, gem5::RegRegRegRegOp
• op2 : gem5::ArmISA::BranchRegReg64, gem5::ArmISA::BranchRegReg, gem5::ArmISA::DataRegOp, gem5::ArmISA::DataRegRegOp, gem5::ArmISA::DataX2RegImmOp, gem5::ArmISA::DataX2RegOp, gem5::ArmISA::DataX3RegOp, gem5::ArmISA::DataXCondCompRegOp, gem5::ArmISA::DataXCondSelOp, gem5::ArmISA::DataXERegOp, gem5::ArmISA::DataXSRegOp, gem5::ArmISA::FpCondCompRegOp, gem5::ArmISA::FpCondSelOp, gem5::ArmISA::FpRegRegRegCondOp, gem5::ArmISA::FpRegRegRegImmOp, gem5::ArmISA::FpRegRegRegOp, gem5::ArmISA::FpRegRegRegRegOp, gem5::ArmISA::MiscRegNum64, gem5::ArmISA::SmeLd1xSt1xOp, gem5::ArmISA::SmeLdrStrOp, gem5::ArmISA::SmeMovExtractOp, gem5::ArmISA::SmeMovInsertOp, gem5::ArmISA::SmeOPOp, gem5::ArmISA::SveAdrOp, gem5::ArmISA::SveBinConstrPredOp, gem5::ArmISA::SveBinDestrPredOp, gem5::ArmISA::SveBinIdxUnpredOp, gem5::ArmISA::SveBinUnpredOp, gem5::ArmISA::SveClampOp, gem5::ArmISA::SveCmpOp, gem5::ArmISA::SveComplexIdxOp, gem5::ArmISA::SveComplexOp, gem5::ArmISA::SveCompTermOp, gem5::ArmISA::SveDotProdIdxOp, gem5::ArmISA::SveDotProdOp, gem5::ArmISA::SveIndexIROp, gem5::ArmISA::SveIndexRROp, gem5::ArmISA::SveIntCmpOp, gem5::ArmISA::SvePartBrkPropOp, gem5::ArmISA::SvePredBinPermOp, gem5::ArmISA::SvePredLogicalOp, gem5::ArmISA::SvePselOp, gem5::ArmISA::SveTblOp, gem5::ArmISA::SveTerImmUnpredOp, gem5::ArmISA::SveTerPredOp, gem5::ArmISA::SveTerUnpredOp, gem5::ArmISA::SveWhileOp, gem5::McrrOp, gem5::RegRegRegImmOp64, gem5::RegRegRegImmOp, gem5::RegRegRegOp, gem5::RegRegRegRegOp
• op2IsWide : gem5::ArmISA::SveIntCmpOp
• op3 : gem5::ArmISA::DataX3RegOp, gem5::ArmISA::FpRegRegRegRegOp, gem5::ArmISA::SmeLd1xSt1xOp, gem5::RegRegRegRegOp
• opc1 : gem5::ArmISA::MiscRegNum32
• opc2 : gem5::ArmISA::MiscRegNum32
• opClass : gem5::MinorOpClass, gem5::OpDesc
• opClasses : gem5::MinorFU, gem5::MinorFUTiming, gem5::MinorOpClassSet
• opcode : gem5::GEM5_PACKED, gem5::trace::TarmacBaseRecord::InstEntry, gem5::X86ISA::ExtMachInst
• opDescList : gem5::FUDesc
• opdNrdyStalls : gem5::ScheduleStage::ScheduleStageStats
• openFlagTable : gem5::OpenFlagTable< Target >
• openRow : gem5::memory::MemInterface::Bank
• operandNetworkLength : gem5::ComputeUnit
• operation : gem5::GEM5_PACKED
• opIdx : gem5::RegisterOperandInfo
• opLat : gem5::MinorFU, gem5::OpDesc
• opLatencies : gem5::FuncUnit
• OPM : gem5::VegaISA::InFmt_MIMG
• ops : gem5::MathExpr
• OPSEL : gem5::VegaISA::InFmt_VOP3A, gem5::VegaISA::InFmt_VOP3P
• OPSEL_HI : gem5::VegaISA::InFmt_VOP3P_1
• OPSEL_HI2 : gem5::VegaISA::InFmt_VOP3P
• opSize : gem5::X86ISA::ExtMachInst, gem5::X86ISA::X86MicroopBase
• opSys : gem5::loader::ObjectFile
• optionalAgeReset : gem5::branch_prediction::LoopPredictor
• or0 : gem5::ContextDescriptor
• or1 : gem5::ContextDescriptor
• or_table : sc_dt::sc_logic
• order : gem5::BaseCache, gem5::QueueEntry, gem5::QueueEntry::Target
• ordinal : gem5::GEM5_PACKED
• ordinal14 : gem5::GEM5_PACKED
• orgn : gem5::ArmISA::TableWalker::WalkerState
• ORHostControllerEnable : gem5::UFSHostDevice::HCIMem
• ORHostControllerStatus : gem5::UFSHostDevice::HCIMem
• origAddr : gem5::AddrMapper::AddrMapperSenderState
• originalPacket : gem5::SimpleCache
• originalPort : gem5::ruby::PendingWriteInst
• originalRanges : gem5::BackdoorManager, gem5::RangeAddrMapper
• origLength : gem5::branch_prediction::TAGEBase::FoldedHistory
• origLoc : gem5::TesterThread::OutstandingReq
• origPC : gem5::X86ISA::Decoder
• ORInterruptEnable : gem5::UFSHostDevice::HCIMem
• ORInterruptStatus : gem5::UFSHostDevice::HCIMem
• ORUECDL : gem5::UFSHostDevice::HCIMem
• ORUECDME : gem5::UFSHostDevice::HCIMem
• ORUECN : gem5::UFSHostDevice::HCIMem
• ORUECPA : gem5::UFSHostDevice::HCIMem
• ORUECT : gem5::UFSHostDevice::HCIMem
• ORUTRIACR : gem5::UFSHostDevice::HCIMem
• os : gem5::Packet::PrintReqState
• oslk : gem5::ArmISA::SelfDebug
• out : gem5::minor::Decode, gem5::minor::Execute, gem5::minor::Fetch1, gem5::minor::Fetch2, tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >::delta_list, writer< T >
• out_a0 : fun
• out_a1 : fun
• out_clk2_neg : testbench
• out_clk2_pos : testbench
• out_clk_neg : testbench
• out_clk_pos : testbench
• out_port_ : gem5::ThreadBridge
• out_valid1 : memory
• out_value1 : b_new_struct
• out_value2 : b_new_struct
• outBuffer : gem5::ps2::Device, gem5::ruby::garnet::OutputUnit
• outcome : gem5::replacement_policy::SHiP::SHiPReplData, gem5::VegaISA::GpuTLB::TLBEvent, gem5::X86ISA::GpuTLB::TLBEvent
• outerAttrs : gem5::ArmISA::TlbEntry
• outerCache : gem5::Gicv3Its
• outerShareable : gem5::ArmISA::TlbEntry
• outfile : gem5::Terminal
• outgoingPort : gem5::OutgoingRequestBridge
• outNode_ptr : gem5::ruby::garnet::NetworkInterface
• outOfBytes : gem5::InstDecoder
• outpoint : gem5::branch_prediction::TAGEBase::FoldedHistory
• outPorts : gem5::ruby::garnet::NetworkInterface
• output : gem5::Plic, gem5::X86ISA::I8259
• output_high : gem5::Intel8254Timer::Counter
• outputChar : MipsAccess
• outputFifo : gem5::EtherSwitch::Interface
• outputFull : gem5::X86ISA::I8042
• outputQueue : gem5::Plic
• outputWidth : gem5::minor::Decode, gem5::minor::Fetch2
• outputWire : gem5::minor::Latch< Data >::Output
• outstanding : gem5::TimingSimpleCPU::SplitMainSenderState, gem5::WholeTranslationState
• outstandingAddrs : gem5::MemTest
• outstandingAtomics : gem5::TesterThread
• outstandingChunks : gem5::AMDGPUMemoryManager::RequestStatus
• outstandingCMO : gem5::CoherentXBar
• outstandingEvents : gem5::memory::DRAMInterface::Rank
• outstandingLoads : gem5::TesterThread
• outstandingReadReqs : gem5::CommMonitor::MonitorStats
• outstandingReads : gem5::MemChecker::ByteTracker, gem5::memory::DRAMSim2, gem5::memory::DRAMsim3
• outstandingReadsHist : gem5::CommMonitor::MonitorStats
• outstandingReqs : gem5::AMDGPUSystemHub, gem5::VegaISA::GpuTLB, gem5::Wavefront, gem5::X86ISA::GpuTLB
• outstandingReqsMax : gem5::VegaISA::GpuTLB::VegaTLBStats
• outstandingReqsRdGm : gem5::Wavefront
• outstandingReqsRdLm : gem5::Wavefront
• outstandingReqsWrGm : gem5::Wavefront
• outstandingReqsWrLm : gem5::Wavefront
• outstandingResponses : gem5::Bridge::BridgeResponsePort, gem5::SerialLink::SerialLinkResponsePort
• outstandingSnoop : gem5::Cache, gem5::CoherentXBar
• outstandingStores : gem5::TesterThread
• outstandingWriteReqs : gem5::CommMonitor::MonitorStats
• outstandingWrites : gem5::memory::DRAMSim2, gem5::memory::DRAMsim3
• outstandingWritesHist : gem5::CommMonitor::MonitorStats
• outstream : gem5::trace::TarmacTracer
• outTransLatHist : gem5::ruby::AbstractController::ControllerStats
• outTransRetryCnt : gem5::ruby::AbstractController::ControllerStats
• outVcState : gem5::ruby::garnet::NetworkInterface, gem5::ruby::garnet::OutputUnit
• OVAddr : gem5::ArmISA::AbortFault< T >
• oVAddr : gem5::ArmISA::TableWalker::Stage2Walk
• overallAccesses : gem5::BaseCache::CacheStats
• overallAvgMissLatency : gem5::BaseCache::CacheStats
• overallAvgMshrMissLatency : gem5::BaseCache::CacheStats
• overallAvgMshrUncacheableLatency : gem5::BaseCache::CacheStats
• overallHitLatency : gem5::BaseCache::CacheStats
• overallHits : gem5::BaseCache::CacheStats
• overallMisses : gem5::BaseCache::CacheStats
• overallMissLatency : gem5::BaseCache::CacheStats
• overallMissRate : gem5::BaseCache::CacheStats
• overallMshrHits : gem5::BaseCache::CacheStats
• overallMshrMisses : gem5::BaseCache::CacheStats
• overallMshrMissLatency : gem5::BaseCache::CacheStats
• overallMshrMissRate : gem5::BaseCache::CacheStats
• overallMshrUncacheable : gem5::BaseCache::CacheStats
• overallMshrUncacheableLatency : gem5::BaseCache::CacheStats
• overflow : gem5::statistics::DistData, gem5::statistics::DistStor
• overflow64 : gem5::ArmISA::PMU::CounterState
• overrideEc : gem5::ArmISA::HypervisorTrap, gem5::ArmISA::SecureMonitorTrap, gem5::ArmISA::SupervisorCall, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::UndefinedInstruction
• overrunError : gem5::Uart8250
• owned : gem5::RegisterBank< BankByteOrder >
• owner : gem5::ArmISA::TableWalker::Port, gem5::ExternalMaster::ExternalPort, gem5::ExternalSlave::ExternalPort, gem5::GUPSGen::GenPort, gem5::OutgoingRequestBridge::OutgoingRequestPort, gem5::prefetch::Queued::DeferredPacket, gem5::RequestPort, gem5::ResponsePort, gem5::ruby::RubyPort::MemRequestPort, gem5::ruby::RubyPort::MemResponsePort, gem5::ruby::RubyPort::PioRequestPort, gem5::ruby::RubyPort::PioResponsePort, gem5::SimpleCache::CPUSidePort, gem5::SimpleCache::MemSidePort, gem5::SimpleMemobj::CPUSidePort, gem5::SimpleMemobj::MemSidePort, gem5::SpatterGen::SpatterGenPort, gem5::TraceCPU::DcachePort, gem5::TraceCPU::ElasticDataGen, gem5::TraceCPU::FixedRetryGen, gem5::TraceCPU::IcachePort
• ownerLds : gem5::LdsState::CuSidePort