Here is a list of all functions with links to the classes they belong to:

- r -

• radvProcess() : gem5::IGbE
• raise() : gem5::ArmInterruptPin, gem5::ArmPPI, gem5::ArmSigInterruptPin, gem5::ArmSPI, gem5::IntSourcePinBase
• raiseInterrupt() : gem5::Ap2ScpDoorbell, gem5::ArmISA::PMU, gem5::MhuDoorbell, gem5::scmi::Platform, gem5::Scp2ApDoorbell, gem5::Scp
• raiseInterruptPin() : gem5::Clint, gem5::fastmodel::ScxEvsCortexR52< Types >::CorePins, gem5::fastmodel::ScxEvsCortexR52< Types >, gem5::RiscvISA::Interrupts, gem5::X86ISA::I82094AA, gem5::X86ISA::I8259, gem5::X86ISA::Interrupts
• raiseInterrupts() : gem5::Pl011
• rand() : QTIsaac< ALPHA >
• randctx() : QTIsaac< ALPHA >::randctx
• randinit() : QTIsaac< ALPHA >
• Random() : gem5::Random, gem5::replacement_policy::Random
• random() : gem5::Random
• RandomGen() : gem5::RandomGen
• randomPick() : gem5::RandomStreamGen
• randomPriority() : gem5::MinorCPU
• RandomReplData() : gem5::replacement_policy::Random::RandomReplData
• RandomStreamGen() : gem5::RandomStreamGen
• range() : gem5::MemBackdoor, gem5::MemBackdoorReq, gem5::PciBar, sc_core::sc_in< sc_dt::sc_bigint< W > >, sc_core::sc_in< sc_dt::sc_biguint< W > >, sc_core::sc_in< sc_dt::sc_int< W > >, sc_core::sc_in< sc_dt::sc_uint< W > >, sc_core::sc_inout< sc_dt::sc_bigint< W > >, sc_core::sc_inout< sc_dt::sc_biguint< W > >, sc_core::sc_inout< sc_dt::sc_int< W > >, sc_core::sc_inout< sc_dt::sc_uint< W > >, sc_dt::sc_fxnum, sc_dt::sc_fxnum_fast, sc_dt::sc_int_base, sc_dt::sc_proxy< X >, sc_dt::sc_signed, sc_dt::sc_uint_base, sc_dt::sc_unsigned
• RangeAddrMapper() : gem5::RangeAddrMapper
• rangeCheck() : BackingStore
• rangeSize() : gem5::ArmISA::TLBIRange
• Rank() : gem5::memory::DRAMInterface::Rank, gem5::memory::NVMInterface::Rank
• rankDelay() : gem5::memory::MemInterface
• rankParam() : gem5::DistIface
• RankStats() : gem5::memory::DRAMInterface::RankStats
• rankToRankDelay() : gem5::memory::MemInterface
• rao() : gem5::ArmISA::MiscRegLUTEntry, gem5::ArmISA::MiscRegLUTEntryInitializer
• Rate() : gem5::statistics::units::Rate< T1, T2 >
• Ratio() : gem5::statistics::units::Ratio
• rawData() : gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >
• rawDataPtr() : gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >
• RawDiskImage() : gem5::RawDiskImage
• RawImage() : gem5::loader::RawImage
• rawPtr() : gem5::MatStore< X, Y >
• rawRegisterIndex() : gem5::OperandInfo
• raz() : gem5::ArmISA::MiscRegLUTEntry, gem5::ArmISA::MiscRegLUTEntryInitializer
• rdIdx() : gem5::AQLRingBuffer
• rdIdxPtr() : gem5::AQLRingBuffer
• rdtrProcess() : gem5::IGbE
• rdy() : gem5::WaitClass
• read() : gem5::A9SCU, gem5::AmbaFake, gem5::AMDGPUDevice, gem5::AMDGPUInterruptHandler, gem5::AMDGPUSystemHub, gem5::BadDevice, gem5::BaseRemoteGDB, gem5::BaseSemihosting::File, gem5::BaseSemihosting::FileBase, gem5::BaseSemihosting::FileFeatures, gem5::BaseSemihosting::InPlaceArg, gem5::CircleBuf< T >, gem5::Clint, gem5::CopyEngine::CopyEngineChannel, gem5::CopyEngine, gem5::CowDiskImage, gem5::CpuLocalTimer, gem5::CpuLocalTimer::Timer, gem5::DiskImage, gem5::DumbTOD, gem5::EnergyCtrl, gem5::fastmodel::GIC, gem5::fastmodel::ResetControllerExample, gem5::Fifo< T >, gem5::FVPBasePwrCtrl, gem5::GenericPciHost, gem5::GenericTimerFrame, gem5::GenericTimerMem, gem5::GenericWatchdog, gem5::GicV2, gem5::Gicv2m, gem5::Gicv3, gem5::Gicv3Distributor, gem5::Gicv3Its, gem5::Gicv3Redistributor, gem5::GPUCommandProcessor, gem5::HDLcd, gem5::HSAPacketProcessor, gem5::I2CBus, gem5::I2CDevice, gem5::IdeController, gem5::IGbE, gem5::Intel8254Timer::Counter, gem5::Iob, gem5::IsaFake, gem5::LdsChunk, gem5::LupioBLK, gem5::LupioIPI, gem5::LupioPIC, gem5::LupioRNG, gem5::LupioRTC, gem5::LupioSYS, gem5::LupioTMR, gem5::LupioTTY, gem5::MaltaCChip, gem5::MaltaIO, gem5::memory::CfiMemory, gem5::MHU, gem5::MmDisk, gem5::MmioVirtIO, gem5::MuxingKvmGic< Types >, gem5::NoMaliGpu, gem5::NSGigE, gem5::o3::LSQ, gem5::o3::LSQUnit, gem5::PciVirtIO, gem5::PerfKvmCounter, gem5::PioDevice, gem5::Pl011, gem5::PL031, gem5::Pl050, gem5::Pl111, gem5::Plic, gem5::PM4PacketProcessor, gem5::PortProxy, gem5::qemu::FwCfgIo, gem5::qemu::FwCfgItem, gem5::qemu::FwCfgItemFixed, gem5::qemu::FwCfgMmio, gem5::RawDiskImage, gem5::RealViewCtrl::Device, gem5::RealViewCtrl, gem5::RealViewOsc, gem5::RealViewTemperatureSensor, gem5::RegisterBank< BankByteOrder >, gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >, gem5::RegisterBank< BankByteOrder >::RegisterBase, gem5::RegisterBank< BankByteOrder >::RegisterBuf, gem5::RegisterBank< BankByteOrder >::RegisterRoFill, gem5::RiscvISA::MmioVirtIO, gem5::ScalarRegisterFile, gem5::SDMAEngine, gem5::SimpleDisk, gem5::SimpleUart, gem5::sinic::Device, gem5::Sp804, gem5::Sp804::Timer, gem5::Sp805, gem5::SysSecCtrl, gem5::Terminal, gem5::TesterDma, gem5::trace::NativeTrace, gem5::TraceCPU::ElasticDataGen::InputStream, gem5::TraceCPU::FixedRetryGen::InputStream, gem5::TraceGen::InputStream, gem5::Uart8250, gem5::Uart8250::Registers::BankedRegister, gem5::Uart8250::Registers::RWSwitchedRegister, gem5::UFSHostDevice, gem5::VectorRegisterFile, gem5::VegaISA::Operand, gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >, gem5::VegaISA::VecOperand< DataType, Const, NumDwords >, gem5::VGic, gem5::VirtDescriptor, gem5::VirtIO9PDiod, gem5::VirtIO9PProxy, gem5::VirtIO9PSocket, gem5::VirtIOBlock, gem5::VirtQueue::VirtRing< T >, gem5::VncServer, gem5::X86ISA::Cmos, gem5::X86ISA::I8042, gem5::X86ISA::I82094AA, gem5::X86ISA::I8237, gem5::X86ISA::I8254, gem5::X86ISA::I8259, gem5::X86ISA::Interrupts, gem5::X86ISA::LongModePTE, gem5::X86ISA::Speaker, ProtoInputStream, sc_core::sc_fifo< T >, sc_core::sc_fifo_blocking_in_if< T >, sc_core::sc_fifo_in< T >, sc_core::sc_in< T >, sc_core::sc_in< bool >, sc_core::sc_in< sc_dt::sc_bigint< W > >, sc_core::sc_in< sc_dt::sc_biguint< W > >, sc_core::sc_in< sc_dt::sc_int< W > >, sc_core::sc_in< sc_dt::sc_logic >, sc_core::sc_in< sc_dt::sc_uint< W > >, sc_core::sc_inout< T >, sc_core::sc_inout< bool >, sc_core::sc_inout< sc_dt::sc_bigint< W > >, sc_core::sc_inout< sc_dt::sc_biguint< W > >, sc_core::sc_inout< sc_dt::sc_int< W > >, sc_core::sc_inout< sc_dt::sc_logic >, sc_core::sc_inout< sc_dt::sc_uint< W > >, sc_core::sc_signal< sc_dt::sc_bigint< W > >, sc_core::sc_signal< sc_dt::sc_biguint< W > >, sc_core::sc_signal< sc_dt::sc_int< W > >, sc_core::sc_signal< sc_dt::sc_uint< W > >, sc_core::sc_signal_in_if< T >, sc_core::sc_signal_in_if< bool >, sc_core::sc_signal_in_if< sc_dt::sc_bigint< W > >, sc_core::sc_signal_in_if< sc_dt::sc_biguint< W > >, sc_core::sc_signal_in_if< sc_dt::sc_int< W > >, sc_core::sc_signal_in_if< sc_dt::sc_logic >, sc_core::sc_signal_in_if< sc_dt::sc_uint< W > >, sc_dt::sc_fxnum_fast_observer, sc_dt::sc_fxnum_observer, sc_dt::sc_fxval_fast_observer, sc_dt::sc_fxval_observer, sc_gem5::ScSignalBaseT< T, WRITER_POLICY >, tlm::circular_buffer< T >
• read1() : gem5::VncServer
• read32() : gem5::MHU
• read_data() : tlm::circular_buffer< T >
• read_event() : tlm::tlm_fifo< T >
• read_part() : sc_core::sc_int_part_if, sc_core::sc_signal< sc_dt::sc_bigint< W > >, sc_core::sc_signal< sc_dt::sc_biguint< W > >, sc_core::sc_signal< sc_dt::sc_int< W > >, sc_core::sc_signal< sc_dt::sc_uint< W > >, sc_core::sc_signed_part_if, sc_core::sc_uint_part_if, sc_core::sc_unsigned_part_if
• readable() : gem5::MemBackdoor, gem5::MemBackdoorReq
• readAll() : gem5::VirtIO9PProxy
• readBankedMiscReg() : gem5::Gicv3CPUInterface
• readBlob() : BackingStore, gem5::BaseRemoteGDB, gem5::fastmodel::FastmodelRemoteGDB, gem5::PortProxy, TestProxy
• readBlobPhys() : gem5::PortProxy
• readByte() : gem5::ruby::SubBlock
• readCallback() : gem5::ruby::GPUCoalescer, gem5::ruby::Sequencer, gem5::UFSHostDevice, gem5::UFSHostDevice::UFSSCSIDevice
• readCCReg() : gem5::Iris::ThreadContext
• readCCRegFlat() : gem5::fastmodel::CortexA76TC, gem5::fastmodel::CortexR52TC, gem5::Iris::ThreadContext
• readClaim() : gem5::Plic
• readCommand() : gem5::IdeDisk, gem5::ItsCommand
• readComplete() : gem5::memory::DRAMSim2, gem5::memory::DRAMsim3
• readCompressedTrace() : gem5::ruby::RubySystem
• readConfig() : gem5::AMDGPUDevice, gem5::IdeController, gem5::PciDevice, gem5::VirtIO9PBase, gem5::VirtIOBlock, gem5::VirtIOConsole, gem5::VirtIODeviceBase, gem5::VirtIORng
• readConfigBlob() : gem5::VirtIODeviceBase
• readConstVal() : gem5::GPUExecContext, gem5::VegaISA::GPUISA
• readControl() : gem5::GenericWatchdog, gem5::IdeDisk, gem5::SMMUv3
• readCopyBytes() : gem5::CopyEngine::CopyEngineChannel
• readCopyBytesComplete() : gem5::CopyEngine::CopyEngineChannel
• readCounter() : gem5::Intel8254Timer, gem5::X86ISA::I8254
• readCpu() : gem5::GicV2, gem5::GicV2Registers, gem5::Gicv3, gem5::Gicv3Registers, gem5::KvmKernelGicV2, gem5::KvmKernelGicV3
• readCtrl() : gem5::VGic
• readData() : gem5::MC146818, gem5::SerialDevice, gem5::SerialNullDevice, gem5::Terminal
• readDataOut() : gem5::X86ISA::I8042
• readDataTimed() : gem5::ArmISA::TableWalker
• readDataUntimed() : gem5::ArmISA::TableWalker
• readDevice() : gem5::UFSHostDevice
• readDeviceID() : gem5::memory::CfiMemory
• readDeviceTable() : gem5::ItsProcess
• readDisk() : gem5::IdeDisk
• ReadDispIdOffsetDmaEvent() : gem5::GPUCommandProcessor
• readDistributor() : gem5::GicV2, gem5::GicV2Registers, gem5::Gicv3, gem5::Gicv3Registers, gem5::KvmKernelGicV2, gem5::KvmKernelGicV3
• readDone() : gem5::UFSHostDevice
• readDoorbell() : gem5::AMDGPUDevice
• readEntryLPI() : gem5::Gicv3Redistributor
• reader() : gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >
• readFillStart() : gem5::SparcProcess
• readFlash() : gem5::UFSHostDevice::UFSSCSIDevice
• readFlatScratch() : gem5::VegaISA::Inst_FLAT
• readFrame() : gem5::AMDGPUDevice, gem5::AMDGPUNbio
• readFramebuffer() : gem5::Pl111
• readFreeEntries() : gem5::o3::Rename
• readFromTrace() : gem5::AMDMMIOReader
• readFSReg() : gem5::SparcISA::ISA
• readGarbage() : gem5::UFSHostDevice
• readHeader() : gem5::VirtQueue::VirtRing< T >
• readHeadInst() : gem5::o3::ROB
• readId() : gem5::AmbaDevice
• readIE() : gem5::RiscvISA::Interrupts
• readIir() : gem5::Uart8250
• readIntReg() : gem5::fastmodel::CortexR52TC, gem5::Iris::ThreadContext
• readIntRegFlat() : gem5::fastmodel::CortexA76TC, gem5::fastmodel::CortexR52TC, gem5::Iris::ThreadContext
• readIob() : gem5::Iob
• readIP() : gem5::RiscvISA::Interrupts
• readIrqCollectionTable() : gem5::ItsProcess
• readIrqTranslationTable() : gem5::ItsProcess
• readItem() : gem5::qemu::FwCfg
• readJBus() : gem5::Iob
• readLastActivate() : gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, gem5::o3::ThreadContext, gem5::SimpleThread, gem5::ThreadContext, gem5::ThreadState
• readLastSuspend() : gem5::CheckerThreadContext< TC >, gem5::Iris::ThreadContext, gem5::o3::ThreadContext, gem5::SimpleThread, gem5::ThreadContext, gem5::ThreadState
• readLength() : gem5::scmi::AgentChannel
• ReadMem() : gem5::Shader
• readMem() : gem5::AtomicSimpleCPU, gem5::BaseSimpleCPU, gem5::CheckerCPU, gem5::ExecContext, gem5::Iris::ThreadContext, gem5::SimpleExecContext
• readMemAccPredicate() : gem5::CheckerCPU, gem5::ExecContext, gem5::minor::ExecContext, gem5::minor::MinorDynInst, gem5::o3::DynInst, gem5::SimpleExecContext, gem5::SimpleThread
• readMemNoEffect() : gem5::trace::TarmacParserRecord
• readMemory() : gem5::AbstractNVM, gem5::FlashDevice
• readMemWithCurrentMsn() : gem5::Iris::ThreadContext
• readMessage() : gem5::scmi::AgentChannel
• readMiscReg() : gem5::ArmISA::BaseISADevice, gem5::ArmISA::DummyISADevice, gem5::ArmISA::ISA, gem5::ArmISA::PMU, gem5::BaseISA, gem5::CheckerCPU, gem5::CheckerThreadContext< TC >, gem5::ExecContext, gem5::GenericTimer, gem5::GenericTimerISA, gem5::Gicv3CPUInterface, gem5::GPUExecContext, gem5::Iris::ISA, gem5::Iris::ThreadContext, gem5::minor::ExecContext, gem5::MipsISA::ISA, gem5::o3::CPU, gem5::o3::DynInst, gem5::o3::ThreadContext, gem5::PowerISA::ISA, gem5::RiscvISA::ISA, gem5::SimpleExecContext, gem5::SimpleThread, gem5::SparcISA::ISA, gem5::ThreadContext, gem5::VegaISA::GPUISA, gem5::X86ISA::ISA
• readMiscRegInt() : gem5::ArmISA::PMU
• readMiscRegNoEffect() : gem5::ArmISA::ISA, gem5::BaseISA, gem5::CheckerCPU, gem5::CheckerThreadContext< TC >, gem5::fastmodel::CortexR52TC, gem5::Iris::ISA, gem5::Iris::ThreadContext, gem5::minor::ExecContext, gem5::MipsISA::ISA, gem5::o3::CPU, gem5::o3::ThreadContext, gem5::PowerISA::ISA, gem5::RiscvISA::ISA, gem5::SimpleThread, gem5::SparcISA::ISA, gem5::ThreadContext, gem5::X86ISA::ISA
• readMiscRegOperand() : gem5::CheckerCPU, gem5::ExecContext, gem5::minor::ExecContext, gem5::o3::DynInst, gem5::SimpleExecContext
• readMiscRegReset() : gem5::ArmISA::ISA
• readMMIO() : gem5::AMDGPUDevice, gem5::AMDGPUGfx, gem5::AMDGPUNbio, gem5::AMDGPUVM
• readMMIOTrace() : gem5::AMDMMIOReader
• readMSIP() : gem5::Clint
• readNegConstReg() : gem5::VegaISA::GPUISA
• readNextWindow() : gem5::TraceCPU::ElasticDataGen
• readonly() : gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >, gem5::X86ISA::LongModePTE
• readPacketPartitionID() : gem5::mpam::MSC, gem5::partitioning_policy::PartitionManager
• readPC() : gem5::ArmISA::ArmStaticInst
• readPosConstReg() : gem5::VegaISA::GPUISA
• readPredicate() : gem5::CheckerCPU, gem5::ExecContext, gem5::minor::ExecContext, gem5::minor::MinorDynInst, gem5::o3::DynInst, gem5::SimpleExecContext, gem5::SimpleThread
• readPredTaken() : gem5::o3::DynInst
• readPredTarg() : gem5::o3::DynInst
• readQueueFull() : gem5::memory::MemCtrl, gem5::memory::qos::MemSinkCtrl
• readQueueFullPC0() : gem5::memory::HBMCtrl
• readQueueFullPC1() : gem5::memory::HBMCtrl
• readRbr() : gem5::Uart8250
• readRedistributor() : gem5::Gicv3, gem5::Gicv3Registers, gem5::KvmKernelGicV3
• readRefresh() : gem5::GenericWatchdog
• readReg() : gem5::HDLcd, gem5::NoMaliGpu, gem5::X86ISA::I82094AA, gem5::X86ISA::Interrupts
• readRegister() : gem5::X86ISA::Cmos
• readRegRaw() : gem5::NoMaliGpu
• readRequest() : gem5::AMDGPUMemoryManager
• readROM() : gem5::AMDGPUDevice
• reads() : gem5::ArmISA::MiscRegLUTEntryInitializer
• readScalar() : gem5::VegaISA::VecOperand< DataType, Const, NumDwords >
• readsEXEC() : gem5::GPUStaticInst
• readsExec() : gem5::GPUDynInst
• readsExecMask() : gem5::GPUDynInst
• readsFlatScratch() : gem5::GPUDynInst
• readsMode() : gem5::GPUDynInst, gem5::GPUStaticInst
• readSpecialVal() : gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >
• readSpillStart() : gem5::SparcProcess
• readSrc() : gem5::VegaISA::VecOperand< DataType, Const, NumDwords >
• readsSCC() : gem5::GPUDynInst, gem5::GPUStaticInst
• readStallSignals() : gem5::o3::Decode, gem5::o3::Rename
• readStatus() : gem5::scmi::AgentChannel
• readStCondFailures() : gem5::CheckerCPU, gem5::CheckerThreadContext< TC >, gem5::ExecContext, gem5::Iris::ThreadContext, gem5::minor::ExecContext, gem5::o3::DynInst, gem5::o3::ThreadContext, gem5::SimpleExecContext, gem5::SimpleThread, gem5::ThreadContext
• readString() : gem5::BaseSemihosting, gem5::PortProxy, gem5::X86ISA::smbios::SMBiosStructure
• readsVCC() : gem5::GPUDynInst, gem5::GPUStaticInst
• readsWaitingToIssue() : gem5::memory::DRAMInterface, gem5::memory::MemInterface, gem5::memory::NVMInterface
• readTailInst() : gem5::o3::ROB
• readToWriteDelay() : gem5::memory::MemInterface
• readVCpu() : gem5::VGic
• readVecElem() : gem5::Iris::ThreadContext
• readVecElemFlat() : gem5::Iris::ThreadContext
• readVecPredReg() : gem5::Iris::ThreadContext
• readVecPredRegFlat() : gem5::Iris::ThreadContext
• readVecReg() : gem5::fastmodel::CortexR52TC, gem5::Iris::ThreadContext
• readVecRegFlat() : gem5::Iris::ThreadContext
• readWithMask() : gem5::RegisterBank< BankByteOrder >
• readWord() : gem5::PixelConverter
• readWriteable() : gem5::ScalarRegisterFile, gem5::VectorRegisterFile
• ready() : gem5::ScoreboardCheckStage, sc_gem5::Process, sc_gem5::Scheduler
• readyInst() : gem5::ScheduleToExecute
• readySrcIdx() : gem5::o3::DynInst
• readyTime() : gem5::ruby::MessageBuffer
• readyToCkpt() : gem5::DistIface
• readyToCommit() : gem5::o3::DynInst
• readyToExit() : gem5::DistIface
• readyToIssue() : gem5::o3::DynInst
• readyWFs() : gem5::ScoreboardCheckToSchedule
• RealView() : gem5::RealView
• RealViewCtrl() : gem5::RealViewCtrl
• RealViewOsc() : gem5::RealViewOsc
• RealViewTemperatureSensor() : gem5::RealViewTemperatureSensor
• reanalyzeAllMessages() : gem5::ruby::MessageBuffer
• reanalyzeList() : gem5::ruby::MessageBuffer
• reanalyzeMessages() : gem5::ruby::MessageBuffer
• received() : gem5::ruby::ExpectedMap< RespType, DataType >::ExpectedState< Type >, gem5::ruby::ExpectedMap< RespType, DataType >
• receiveData() : gem5::ruby::ExpectedMap< RespType, DataType >
• receivedDataType() : gem5::ruby::ExpectedMap< RespType, DataType >
• receiveDeviceInterrupt() : gem5::Iob
• receivedRespType() : gem5::ruby::ExpectedMap< RespType, DataType >
• receivedType() : gem5::ruby::ExpectedMap< RespType, DataType >::ExpectedState< Type >
• receiveJBusInterrupt() : gem5::Iob
• receiveResp() : gem5::ruby::ExpectedMap< RespType, DataType >
• receiveWriteCompleteAck() : gem5::ruby::PendingWriteInst
• RECENCY() : gem5::branch_prediction::MultiperspectivePerceptron::RECENCY
• RECENCYPOS() : gem5::branch_prediction::MultiperspectivePerceptron::RECENCYPOS
• reconstructSequence() : gem5::prefetch::STeMS
• Record() : gem5::X86ISA::ACPI::MADT::Record
• recordAccess() : gem5::FALRU::CacheTracking
• recordArm() : gem5::Workload
• recordCacheContents() : gem5::ruby::CacheMemory
• recordCacheTrace() : gem5::ruby::AbstractController
• recordExecTick() : gem5::o3::ElasticTrace
• recordMissLatency() : gem5::ruby::GPUCoalescer, gem5::ruby::Sequencer
• recordMtrace() : gem5::AMDMMIOReader
• recordPCChange() : gem5::CheckerCPU
• recordProducer() : gem5::o3::InstructionQueue
• recordQuiesce() : gem5::Workload
• recordRequestType() : gem5::ruby::CacheMemory, gem5::ruby::DirectoryMemory, gem5::ruby::DMASequencer, gem5::ruby::Sequencer
• recordResult() : gem5::o3::DynInst
• recordTarget() : gem5::branch_prediction::SimpleIndirectPredictor
• recordToCommTick() : gem5::o3::ElasticTrace
• recordTripTime() : gem5::SpatterAccess
• recordTurnaroundStats() : gem5::memory::qos::MemCtrl
• recreateable() : gem5::OutputFile< StreamType >, gem5::OutputStream
• recv() : gem5::BaseRemoteGDB, gem5::ps2::Device, gem5::ps2::PS2Keyboard, gem5::ps2::PS2Mouse, gem5::ps2::TouchKit
• recvAtomic() : gem5::AddrMapper::MapperResponsePort, gem5::AddrMapper, gem5::AtomicResponseProtocol, gem5::BaseCache::CpuSidePort, gem5::BaseCache, gem5::Bridge::BridgeResponsePort, gem5::Cache, gem5::CoherentXBar::CoherentXBarResponsePort, gem5::CommMonitor::MonitorResponsePort, gem5::CommMonitor, gem5::ComputeUnit::DataPort, gem5::ComputeUnit::DTLBPort, gem5::ComputeUnit::ITLBPort, gem5::ComputeUnit::LDSPort, gem5::ComputeUnit::SQCPort, gem5::LdsState::CuSidePort, gem5::MemCheckerMonitor::MonitorResponsePort, gem5::MemCheckerMonitor, gem5::MemDelay::ResponsePort, gem5::memory::CfiMemory::MemoryPort, gem5::memory::CfiMemory, gem5::memory::DRAMSim2::MemoryPort, gem5::memory::DRAMSim2, gem5::memory::DRAMsim3::MemoryPort, gem5::memory::DRAMsim3, gem5::memory::HBMCtrl, gem5::memory::HeteroMemCtrl, gem5::memory::MemCtrl::MemoryPort, gem5::memory::MemCtrl, gem5::memory::qos::MemSinkCtrl::MemoryPort, gem5::memory::qos::MemSinkCtrl, gem5::memory::SimpleMemory::MemoryPort, gem5::memory::SimpleMemory, gem5::NoncoherentCache, gem5::NoncoherentXBar::NoncoherentXBarResponsePort, gem5::OutgoingRequestBridge::OutgoingRequestPort, gem5::PioPort< Device >, gem5::ResponsePortWrapper, gem5::ruby::AbstractController, gem5::ruby::GPUCoalescer::GMTokenPort, gem5::ruby::RubyPort::MemResponsePort, gem5::ruby::RubyPort::PioResponsePort, gem5::SerialLink::SerialLinkResponsePort, gem5::SimpleCache::CPUSidePort, gem5::SimpleMemobj::CPUSidePort, gem5::SimpleTimingPort, gem5::SMMUATSDevicePort, gem5::SMMUControlPort, gem5::SMMUDevicePort, gem5::SMMUv3, gem5::SMMUv3DeviceInterface, gem5::StubSlavePort, gem5::SysBridge::SysBridgeSourcePort, gem5::ThreadBridge::IncomingPort, gem5::TLBCoalescer::CpuSidePort, gem5::TLBCoalescer::MemSidePort, gem5::VegaISA::GpuTLB::CpuSidePort, gem5::VegaISA::GpuTLB::MemSidePort, gem5::VegaTLBCoalescer::CpuSidePort, gem5::VegaTLBCoalescer::MemSidePort, gem5::X86ISA::GpuTLB::CpuSidePort, gem5::X86ISA::GpuTLB::MemSidePort, gem5::X86ISA::IntResponsePort< Device >, sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvAtomicBackdoor() : gem5::AddrMapper::MapperResponsePort, gem5::AddrMapper, gem5::AtomicResponseProtocol, gem5::Bridge::BridgeResponsePort, gem5::CoherentXBar::CoherentXBarResponsePort, gem5::CoherentXBar, gem5::memory::CfiMemory::MemoryPort, gem5::memory::CfiMemory, gem5::memory::HBMCtrl, gem5::memory::MemCtrl::MemoryPort, gem5::memory::MemCtrl, gem5::memory::SimpleMemory::MemoryPort, gem5::memory::SimpleMemory, gem5::NoncoherentXBar::NoncoherentXBarResponsePort, gem5::NoncoherentXBar, gem5::ResponsePort, gem5::ResponsePortWrapper, gem5::SysBridge::SysBridgeSourcePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvAtomicLogic() : gem5::memory::MemCtrl
• recvAtomicSnoop() : gem5::AddrMapper::MapperRequestPort, gem5::AddrMapper, gem5::AtomicRequestProtocol, gem5::AtomicSimpleCPU::AtomicCPUDPort, gem5::BaseCache::MemSidePort, gem5::BaseCache, gem5::BaseTrafficGen::TrafficGenPort, gem5::Cache, gem5::CoherentXBar::CoherentXBarRequestPort, gem5::CoherentXBar, gem5::CommMonitor::MonitorRequestPort, gem5::CommMonitor, gem5::MemCheckerMonitor::MonitorRequestPort, gem5::MemCheckerMonitor, gem5::MemDelay::RequestPort, gem5::MemTest::CpuPort, gem5::NoncoherentCache, gem5::RequestPort, gem5::SysBridge::SysBridgeTargetPort
• recvCommand() : gem5::CopyEngine::CopyEngineChannel
• recvCutText() : gem5::VncServer
• recvDone() : gem5::EtherInt
• recvFunctional() : gem5::AddrMapper::MapperResponsePort, gem5::AddrMapper, gem5::BaseCache::CpuSidePort, gem5::Bridge::BridgeResponsePort, gem5::CoherentXBar::CoherentXBarResponsePort, gem5::CoherentXBar, gem5::CommMonitor::MonitorResponsePort, gem5::CommMonitor, gem5::ComputeUnit::DataPort, gem5::ComputeUnit::DTLBPort, gem5::ComputeUnit::ITLBPort, gem5::ComputeUnit::LDSPort, gem5::ComputeUnit::SQCPort, gem5::FunctionalResponseProtocol, gem5::LdsState::CuSidePort, gem5::MemCheckerMonitor::MonitorResponsePort, gem5::MemCheckerMonitor, gem5::MemDelay::ResponsePort, gem5::memory::CfiMemory::MemoryPort, gem5::memory::CfiMemory, gem5::memory::DRAMSim2::MemoryPort, gem5::memory::DRAMSim2, gem5::memory::DRAMsim3::MemoryPort, gem5::memory::DRAMsim3, gem5::memory::HBMCtrl, gem5::memory::HeteroMemCtrl, gem5::memory::MemCtrl::MemoryPort, gem5::memory::MemCtrl, gem5::memory::qos::MemSinkCtrl::MemoryPort, gem5::memory::qos::MemSinkCtrl, gem5::memory::SimpleMemory::MemoryPort, gem5::memory::SimpleMemory, gem5::NoncoherentXBar::NoncoherentXBarResponsePort, gem5::NoncoherentXBar, gem5::OutgoingRequestBridge::OutgoingRequestPort, gem5::ResponsePortWrapper, gem5::ruby::GPUCoalescer::GMTokenPort, gem5::ruby::RubyPort::MemResponsePort, gem5::ruby::RubyPort::PioResponsePort, gem5::SerialLink::SerialLinkResponsePort, gem5::SimpleCache::CPUSidePort, gem5::SimpleMemobj::CPUSidePort, gem5::SimpleTimingPort, gem5::SMMUATSDevicePort, gem5::SMMUDevicePort, gem5::StubSlavePort, gem5::SysBridge::SysBridgeSourcePort, gem5::ThreadBridge::IncomingPort, gem5::TLBCoalescer::CpuSidePort, gem5::TLBCoalescer::MemSidePort, gem5::VegaISA::GpuTLB::CpuSidePort, gem5::VegaISA::GpuTLB::MemSidePort, gem5::VegaTLBCoalescer::CpuSidePort, gem5::VegaTLBCoalescer::MemSidePort, gem5::X86ISA::GpuTLB::CpuSidePort, gem5::X86ISA::GpuTLB::MemSidePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvFunctionalLogic() : gem5::memory::MemCtrl
• recvFunctionalSnoop() : gem5::AddrMapper::MapperRequestPort, gem5::AddrMapper, gem5::AtomicSimpleCPU::AtomicCPUDPort, gem5::BaseCache::MemSidePort, gem5::BaseTrafficGen::TrafficGenPort, gem5::CoherentXBar::CoherentXBarRequestPort, gem5::CoherentXBar, gem5::CommMonitor::MonitorRequestPort, gem5::CommMonitor, gem5::FunctionalRequestProtocol, gem5::MemCheckerMonitor::MonitorRequestPort, gem5::MemCheckerMonitor, gem5::MemDelay::RequestPort, gem5::MemTest::CpuPort, gem5::minor::LSQ::DcachePort, gem5::o3::LSQ::DcachePort, gem5::PortProxy, gem5::RequestPort, gem5::StubSlavePort, gem5::SysBridge::SysBridgeTargetPort, gem5::TimingSimpleCPU::DcachePort, gem5::TraceCPU::DcachePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvHeader() : gem5::DistIface, gem5::TCPIface
• recvKeyboardInput() : gem5::VncServer
• recvMemBackdoorReq() : gem5::AddrMapper::MapperResponsePort, gem5::AddrMapper, gem5::Bridge::BridgeResponsePort, gem5::CoherentXBar::CoherentXBarResponsePort, gem5::CoherentXBar, gem5::FunctionalResponseProtocol, gem5::memory::CfiMemory::MemoryPort, gem5::memory::CfiMemory, gem5::memory::HBMCtrl, gem5::memory::MemCtrl::MemoryPort, gem5::memory::MemCtrl, gem5::memory::SimpleMemory::MemoryPort, gem5::memory::SimpleMemory, gem5::NoncoherentXBar::NoncoherentXBarResponsePort, gem5::NoncoherentXBar, gem5::ResponsePort, gem5::ResponsePortWrapper, gem5::SysBridge::SysBridgeSourcePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvMessage() : gem5::X86ISA::Interrupts
• recvPacket() : gem5::DistEtherLink::LocalIface, gem5::DistIface, gem5::EtherInt, gem5::EtherLink::Interface, gem5::EtherSwitch::Interface, gem5::EtherTapInt, gem5::IGbEInt, gem5::NSGigE, gem5::NSGigEInt, gem5::RiscvISA::Walker::WalkerState, gem5::sinic::Device, gem5::sinic::Interface, gem5::TCPIface, gem5::X86ISA::Walker::WalkerState
• recvPointerInput() : gem5::VncServer
• recvRangeChange() : gem5::AddrMapper::MapperRequestPort, gem5::AddrMapper, gem5::BaseXBar, gem5::CoherentXBar::CoherentXBarRequestPort, gem5::CommMonitor::MonitorRequestPort, gem5::CommMonitor, gem5::ComputeUnit::DataPort, gem5::ComputeUnit::DTLBPort, gem5::ComputeUnit::ITLBPort, gem5::ComputeUnit::LDSPort, gem5::ComputeUnit::SQCPort, gem5::HMCController, gem5::LdsState::CuSidePort, gem5::MemCheckerMonitor::MonitorRequestPort, gem5::MemCheckerMonitor, gem5::MemDelay::RequestPort, gem5::NoncoherentXBar::NoncoherentXBarRequestPort, gem5::PortTerminator::ReqPort, gem5::RangeAddrMapper, gem5::RequestPort, gem5::RequestPortWrapper, gem5::ruby::RubyPort::MemRequestPort, gem5::ruby::RubyPort::PioRequestPort, gem5::SimpleCache::MemSidePort, gem5::SimpleMemobj::MemSidePort, gem5::SysBridge::SysBridgeTargetPort, gem5::ThreadBridge::OutgoingPort, gem5::TLBCoalescer::CpuSidePort, gem5::TLBCoalescer::MemSidePort, gem5::VegaISA::GpuTLB::CpuSidePort, gem5::VegaISA::GpuTLB::MemSidePort, gem5::VegaTLBCoalescer::CpuSidePort, gem5::VegaTLBCoalescer::MemSidePort, gem5::X86ISA::GpuTLB::CpuSidePort, gem5::X86ISA::GpuTLB::MemSidePort, sc_gem5::TlmToGem5Bridge< BITWIDTH >::BridgeRequestPort, sc_gem5::TlmToGem5Bridge< BITWIDTH >
• recvReal() : gem5::EtherTapBase, gem5::EtherTapStub
• recvReqRetry() : gem5::AddrMapper::MapperRequestPort, gem5::AddrMapper, gem5::AMDGPUMemoryManager::GPUMemPort, gem5::AtomicSimpleCPU::AtomicCPUPort, gem5::BaseKvmCPU::KVMCpuPort, gem5::BaseTrafficGen, gem5::BaseTrafficGen::TrafficGenPort, gem5::Bridge::BridgeRequestPort, gem5::CoherentXBar::CoherentXBarRequestPort, gem5::CoherentXBar, gem5::CoherentXBar::SnoopRespPort, gem5::CommMonitor::MonitorRequestPort, gem5::CommMonitor, gem5::ComputeUnit::DataPort, gem5::ComputeUnit::DTLBPort, gem5::ComputeUnit::GMTokenPort, gem5::ComputeUnit::ITLBPort, gem5::ComputeUnit::LDSPort, gem5::ComputeUnit::ScalarDataPort, gem5::ComputeUnit::ScalarDTLBPort, gem5::ComputeUnit::SQCPort, gem5::DmaPort, gem5::GarnetSyntheticTraffic::CpuPort, gem5::Gicv3Its::DataPort, gem5::Gicv3Its, gem5::GUPSGen::GenPort, gem5::MemCheckerMonitor::MonitorRequestPort, gem5::MemCheckerMonitor, gem5::MemTest::CpuPort, gem5::minor::Fetch1::IcachePort, gem5::minor::Fetch1, gem5::minor::LSQ::DcachePort, gem5::minor::LSQ, gem5::NoncoherentXBar::NoncoherentXBarRequestPort, gem5::NoncoherentXBar, gem5::o3::Fetch::IcachePort, gem5::o3::Fetch, gem5::o3::LSQ::DcachePort, gem5::o3::LSQ, gem5::PortTerminator::ReqPort, gem5::ProtocolTester::GMTokenPort, gem5::ProtocolTester::SeqPort, gem5::QueuedRequestPort, gem5::RequestPortWrapper, gem5::RiscvISA::Walker, gem5::RiscvISA::Walker::WalkerPort, gem5::ruby::AbstractController::MemoryPort, gem5::RubyDirectedTester::CpuPort, gem5::RubyTester::CpuPort, gem5::SerialLink::SerialLinkRequestPort, gem5::SimpleCache::MemSidePort, gem5::SimpleMemobj::MemSidePort, gem5::SMMURequestPort, gem5::SMMUTableWalkPort, gem5::SMMUv3, gem5::SpatterGen, gem5::SpatterGen::SpatterGenPort, gem5::SysBridge::SysBridgeTargetPort, gem5::System::SystemPort, gem5::ThreadBridge::OutgoingPort, gem5::TimingRequestProtocol, gem5::TimingSimpleCPU::DcachePort, gem5::TimingSimpleCPU::IcachePort, gem5::TLBCoalescer::CpuSidePort, gem5::TLBCoalescer::MemSidePort, gem5::TraceCPU::DcachePort, gem5::TraceCPU::IcachePort, gem5::VegaISA::GpuTLB::CpuSidePort, gem5::VegaISA::GpuTLB::MemSidePort, gem5::VegaISA::Walker, gem5::VegaISA::Walker::WalkerPort, gem5::VegaTLBCoalescer::CpuSidePort, gem5::VegaTLBCoalescer::MemSidePort, gem5::X86ISA::GpuTLB::CpuSidePort, gem5::X86ISA::GpuTLB::MemSidePort, gem5::X86ISA::Walker, gem5::X86ISA::Walker::WalkerPort, sc_gem5::TlmToGem5Bridge< BITWIDTH >::BridgeRequestPort, sc_gem5::TlmToGem5Bridge< BITWIDTH >
• recvResponse() : gem5::X86ISA::I82094AA
• recvRespRetry() : gem5::AddrMapper::MapperResponsePort, gem5::AddrMapper, gem5::Bridge::BridgeResponsePort, gem5::CommMonitor::MonitorResponsePort, gem5::CommMonitor, gem5::LdsState::CuSidePort, gem5::MemCheckerMonitor::MonitorResponsePort, gem5::MemCheckerMonitor, gem5::memory::CfiMemory::MemoryPort, gem5::memory::CfiMemory, gem5::memory::DRAMSim2::MemoryPort, gem5::memory::DRAMSim2, gem5::memory::DRAMsim3::MemoryPort, gem5::memory::DRAMsim3, gem5::memory::SimpleMemory::MemoryPort, gem5::memory::SimpleMemory, gem5::OutgoingRequestBridge::OutgoingRequestPort, gem5::QueuedResponsePort, gem5::ResponsePortWrapper, gem5::SerialLink::SerialLinkResponsePort, gem5::SimpleCache::CPUSidePort, gem5::SimpleMemobj::CPUSidePort, gem5::StubSlavePort, gem5::SysBridge::SysBridgeSourcePort, gem5::ThreadBridge::IncomingPort, gem5::TimingResponseProtocol, gem5::TLBCoalescer::CpuSidePort, gem5::TLBCoalescer::MemSidePort, gem5::TokenResponsePort, gem5::VegaISA::GpuTLB::CpuSidePort, gem5::VegaTLBCoalescer::CpuSidePort, gem5::VegaTLBCoalescer::MemSidePort, gem5::X86ISA::GpuTLB::CpuSidePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvRetry() : gem5::BaseXBar::Layer< SrcType, DstType >, gem5::LdsState::CuSidePort, gem5::MemTest, gem5::o3::LSQUnit
• recvRetrySnoopResp() : gem5::CommMonitor::MonitorRequestPort, gem5::CommMonitor, gem5::QueuedRequestPort, gem5::RequestPort, gem5::SysBridge::SysBridgeTargetPort, gem5::TimingRequestProtocol
• RecvScheduler() : gem5::DistIface::RecvScheduler
• recvSimulated() : gem5::EtherTapBase
• recvTCP() : gem5::TCPIface
• recvThreadFunc() : gem5::DistIface
• recvTimingReq() : gem5::AddrMapper::MapperResponsePort, gem5::AddrMapper, gem5::BaseCache::CpuSidePort, gem5::BaseCache, gem5::Bridge::BridgeResponsePort, gem5::Cache, gem5::CoherentXBar::CoherentXBarResponsePort, gem5::CoherentXBar, gem5::CommMonitor::MonitorResponsePort, gem5::CommMonitor, gem5::HMCController, gem5::LdsState::CuSidePort, gem5::MemCheckerMonitor::MonitorResponsePort, gem5::MemCheckerMonitor, gem5::MemDelay::ResponsePort, gem5::memory::CfiMemory::MemoryPort, gem5::memory::CfiMemory, gem5::memory::DRAMSim2::MemoryPort, gem5::memory::DRAMSim2, gem5::memory::DRAMsim3::MemoryPort, gem5::memory::DRAMsim3, gem5::memory::HBMCtrl, gem5::memory::HeteroMemCtrl, gem5::memory::MemCtrl::MemoryPort, gem5::memory::MemCtrl, gem5::memory::qos::MemSinkCtrl::MemoryPort, gem5::memory::qos::MemSinkCtrl, gem5::memory::SimpleMemory::MemoryPort, gem5::memory::SimpleMemory, gem5::NoncoherentCache, gem5::NoncoherentXBar::NoncoherentXBarResponsePort, gem5::NoncoherentXBar, gem5::OutgoingRequestBridge::OutgoingRequestPort, gem5::ResponsePortWrapper, gem5::ruby::GPUCoalescer::GMTokenPort, gem5::ruby::RubyPort::MemResponsePort, gem5::ruby::RubyPort::PioResponsePort, gem5::SerialLink::SerialLinkResponsePort, gem5::SimpleCache::CPUSidePort, gem5::SimpleMemobj::CPUSidePort, gem5::SimpleTimingPort, gem5::SMMUATSDevicePort, gem5::SMMUDevicePort, gem5::SMMUv3, gem5::SMMUv3DeviceInterface, gem5::StubSlavePort, gem5::SysBridge::SysBridgeSourcePort, gem5::ThreadBridge::IncomingPort, gem5::TimingResponseProtocol, gem5::TLBCoalescer::CpuSidePort, gem5::VegaISA::GpuTLB::CpuSidePort, gem5::VegaTLBCoalescer::CpuSidePort, gem5::X86ISA::GpuTLB::CpuSidePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvTimingResp() : gem5::AddrMapper::MapperRequestPort, gem5::AddrMapper, gem5::AMDGPUMemoryManager::GPUMemPort, gem5::ArmISA::TableWalker::Port, gem5::AtomicSimpleCPU::AtomicCPUPort, gem5::BaseCache::MemSidePort, gem5::BaseCache, gem5::BaseKvmCPU::KVMCpuPort, gem5::BaseTrafficGen, gem5::BaseTrafficGen::TrafficGenPort, gem5::Bridge::BridgeRequestPort, gem5::CoherentXBar::CoherentXBarRequestPort, gem5::CoherentXBar, gem5::CoherentXBar::SnoopRespPort, gem5::CommMonitor::MonitorRequestPort, gem5::CommMonitor, gem5::ComputeUnit::DataPort, gem5::ComputeUnit::DTLBPort, gem5::ComputeUnit::GMTokenPort, gem5::ComputeUnit::ITLBPort, gem5::ComputeUnit::LDSPort, gem5::ComputeUnit::ScalarDataPort, gem5::ComputeUnit::ScalarDTLBPort, gem5::ComputeUnit::SQCPort, gem5::DmaPort, gem5::GarnetSyntheticTraffic::CpuPort, gem5::Gicv3Its::DataPort, gem5::Gicv3Its, gem5::GUPSGen::GenPort, gem5::MemCheckerMonitor::MonitorRequestPort, gem5::MemCheckerMonitor, gem5::MemDelay::RequestPort, gem5::MemTest::CpuPort, gem5::minor::Fetch1::IcachePort, gem5::minor::Fetch1, gem5::minor::LSQ::DcachePort, gem5::minor::LSQ, gem5::NoncoherentCache, gem5::NoncoherentXBar::NoncoherentXBarRequestPort, gem5::NoncoherentXBar, gem5::o3::Fetch::IcachePort, gem5::o3::LSQ::DcachePort, gem5::o3::LSQ::LSQRequest, gem5::o3::LSQ, gem5::o3::LSQ::SingleDataRequest, gem5::o3::LSQ::SplitDataRequest, gem5::o3::LSQUnit, gem5::PortTerminator::ReqPort, gem5::ProtocolTester::GMTokenPort, gem5::ProtocolTester::SeqPort, gem5::RequestPortWrapper, gem5::RiscvISA::Walker, gem5::RiscvISA::Walker::WalkerPort, gem5::ruby::AbstractController::MemoryPort, gem5::ruby::AbstractController, gem5::ruby::RubyPort::MemRequestPort, gem5::ruby::RubyPort::PioRequestPort, gem5::ruby::RubyPort, gem5::RubyDirectedTester::CpuPort, gem5::RubyTester::CpuPort, gem5::SerialLink::SerialLinkRequestPort, gem5::SimpleCache::MemSidePort, gem5::SimpleMemobj::MemSidePort, gem5::SMMUATSMemoryPort, gem5::SMMURequestPort, gem5::SMMUTableWalkPort, gem5::SMMUv3, gem5::SpatterGen, gem5::SpatterGen::SpatterGenPort, gem5::SysBridge::SysBridgeTargetPort, gem5::System::SystemPort, gem5::ThreadBridge::OutgoingPort, gem5::TimingRequestProtocol, gem5::TimingSimpleCPU::DcachePort, gem5::TimingSimpleCPU::IcachePort, gem5::TLBCoalescer::MemSidePort, gem5::TraceCPU::DcachePort, gem5::TraceCPU::IcachePort, gem5::VegaISA::GpuTLB::MemSidePort, gem5::VegaISA::Walker, gem5::VegaISA::Walker::WalkerPort, gem5::VegaTLBCoalescer::MemSidePort, gem5::X86ISA::GpuTLB::MemSidePort, gem5::X86ISA::IntRequestPort< Device >, gem5::X86ISA::Walker, gem5::X86ISA::Walker::WalkerPort, sc_gem5::TlmToGem5Bridge< BITWIDTH >::BridgeRequestPort, sc_gem5::TlmToGem5Bridge< BITWIDTH >
• recvTimingSnoopReq() : gem5::AddrMapper::MapperRequestPort, gem5::AddrMapper, gem5::BaseCache::MemSidePort, gem5::BaseCache, gem5::BaseTrafficGen::TrafficGenPort, gem5::Cache, gem5::CoherentXBar::CoherentXBarRequestPort, gem5::CoherentXBar, gem5::CommMonitor::MonitorRequestPort, gem5::CommMonitor, gem5::MemCheckerMonitor::MonitorRequestPort, gem5::MemCheckerMonitor, gem5::MemDelay::RequestPort, gem5::MemTest::CpuPort, gem5::minor::LSQ::DcachePort, gem5::minor::LSQ, gem5::NoncoherentCache, gem5::o3::LSQ::DcachePort, gem5::o3::LSQ, gem5::RequestPort, gem5::SysBridge::SysBridgeTargetPort, gem5::TimingRequestProtocol, gem5::TimingSimpleCPU::DcachePort, gem5::TraceCPU::DcachePort, gem5::TraceCPU::IcachePort
• recvTimingSnoopResp() : gem5::AddrMapper::MapperResponsePort, gem5::AddrMapper, gem5::BaseCache::CpuSidePort, gem5::BaseCache, gem5::Cache, gem5::CoherentXBar::CoherentXBarResponsePort, gem5::CoherentXBar, gem5::CommMonitor::MonitorResponsePort, gem5::CommMonitor, gem5::MemCheckerMonitor::MonitorResponsePort, gem5::MemCheckerMonitor, gem5::MemDelay::ResponsePort, gem5::NoncoherentCache, gem5::ResponsePort, gem5::StubSlavePort, gem5::SysBridge::SysBridgeSourcePort, gem5::TimingResponseProtocol, sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort, sc_gem5::Gem5ToTlmBridge< BITWIDTH >
• recvTMsg() : gem5::VirtIO9PBase, gem5::VirtIO9PProxy
• recvTokens() : gem5::TokenManager, gem5::TokenRequestPort
• recvTouchKit() : gem5::ps2::TouchKit
• recycle() : gem5::ruby::MessageBuffer, gem5::ruby::WireBuffer
• RedirectPath() : gem5::RedirectPath
• redirectRegVHE() : gem5::ArmISA::ISA
• RefCounted() : gem5::RefCounted
• RefCountingPtr() : gem5::RefCountingPtr< T >
• refresh() : gem5::GenericWatchdog, gem5::PerfKvmCounter
• Reg() : gem5::copy_engine_reg::Reg< T >, gem5::igbreg::Regs::Reg< T >
• reg() : gem5::EtherBus, gem5::RegFile, sc_gem5::Scheduler
• regBusy() : gem5::RegisterFile
• regBytes() : gem5::RegClass, gem5::RegFile
• RegClass() : gem5::RegClass
• regClass() : gem5::InstResult, gem5::PhysRegId, gem5::RegId
• regClasses() : gem5::BaseISA
• RegClassIterator() : gem5::RegClassIterator
• regData32() : gem5::sinic::Device
• regData64() : gem5::sinic::Device
• regData8() : gem5::sinic::Device
• regenerateAddr() : gem5::BaseIndexingPolicy, gem5::SetAssociative, gem5::SkewedAssociative
• regenerateBlkAddr() : gem5::BaseCache, gem5::BaseSetAssoc, gem5::BaseTags, gem5::FALRU, gem5::SectorTags
• RegEntry() : gem5::trace::TarmacBaseRecord::RegEntry
• regEtraceListeners() : gem5::o3::ElasticTrace
• RegFile() : gem5::RegFile
• RegId() : gem5::RegId
• regIdx() : gem5::VegaISA::ScalarOperand< DataType, Const, NumDwords >
• RegImmImmOp() : gem5::RegImmImmOp
• RegImmImmOp64() : gem5::RegImmImmOp64
• RegImmOp() : gem5::RegImmOp
• RegImmRegOp() : gem5::RegImmRegOp
• RegImmRegShiftOp() : gem5::RegImmRegShiftOp
• regInterfaceCallback() : gem5::SerialDevice
• regionSize() : gem5::DynPoolManager, gem5::PoolManager, gem5::SimplePoolManager
• Register() : gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >
• register_b_transport() : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >, tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
• register_extension() : tlm::tlm_extension_base
• register_get_direct_mem_ptr() : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >, tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
• register_id() : sc_core::sc_report
• register_invalidate_direct_mem_ptr() : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL >, tlm_utils::simple_initiator_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
• register_nb_transport_bw() : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL >, tlm_utils::simple_initiator_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
• register_nb_transport_fw() : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >, tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
• register_port() : sc_core::sc_fifo< T >, sc_core::sc_interface, sc_core::sc_signal< sc_dt::sc_bigint< W > >, sc_core::sc_signal< sc_dt::sc_biguint< W > >, sc_core::sc_signal< sc_dt::sc_int< W > >, sc_core::sc_signal< sc_dt::sc_uint< W > >, sc_core::sc_signal_resolved, sc_core::sc_signal_rv< W >, sc_gem5::ScSignalBaseT< T, WRITER_POLICY >, tlm_utils::callback_binder_fw< TYPES >
• register_private_extension() : tlm_utils::ispex_base
• register_transport_dbg() : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >, tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >, tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
• registerAbstractController() : gem5::ruby::RubySystem
• RegisterAdder() : gem5::RegisterBank< BankByteOrder >::RegisterAdder
• RegisterBank() : gem5::RegisterBank< BankByteOrder >
• RegisterBankTest() : RegisterBankTest
• RegisterBase() : gem5::RegisterBank< BankByteOrder >::RegisterBase
• RegisterBuf() : gem5::RegisterBank< BankByteOrder >::RegisterBuf
• RegisterBufTest() : RegisterBufTest
• RegisterCacheEvent() : gem5::RegisterFileCache::RegisterCacheEvent
• registerCU() : gem5::Shader
• registerDequeueCallback() : gem5::ruby::MessageBuffer
• registerDevice() : gem5::PciHost, gem5::RealViewCtrl
• registerDrainable() : gem5::DrainManager
• RegisterEvent() : gem5::RegisterFile::RegisterEvent
• registerEvent() : gem5::ArmISA::PMU
• RegisterFile() : gem5::RegisterFile
• RegisterFileCache() : gem5::RegisterFileCache
• RegisterFileStats() : gem5::RegisterFile::RegisterFileStats
• registerHandler() : gem5::ExternalMaster, gem5::ExternalSlave
• registerIndex() : gem5::OperandInfo
• registerKickCallback() : gem5::VirtIODeviceBase
• RegisterLBuf() : gem5::RegisterBank< BankByteOrder >::RegisterLBuf< BufBytes >
• RegisterLBufTest() : RegisterLBufTest
• registerListener() : gem5::SystemCounter
• registerMachineID() : gem5::ruby::RubySystem
• RegisterManager() : gem5::RegisterManager
• registerNetwork() : gem5::ruby::RubySystem
• registerNewQueue() : gem5::HWScheduler
• RegisterOperandInfo() : gem5::RegisterOperandInfo
• registerPowerProducer() : gem5::SubSystem
• registerQueue() : gem5::VirtIODeviceBase
• RegisterRao() : gem5::RegisterBank< BankByteOrder >::RegisterRao
• RegisterRaoTest() : RegisterRaoTest
• RegisterRaz() : gem5::RegisterBank< BankByteOrder >::RegisterRaz
• RegisterRazTest() : RegisterRazTest
• registerRequestorIDs() : gem5::ruby::RubySystem
• registerRLCQueue() : gem5::SDMAEngine
• RegisterRoFill() : gem5::RegisterBank< BankByteOrder >::RegisterRoFill
• Registers() : gem5::fastmodel::ResetControllerExample::Registers, gem5::Uart8250::Registers
• registerSrcClockDom() : gem5::VoltageDomain
• registerThreadContext() : gem5::System, gem5::Workload
• registerThreadContexts() : gem5::BaseCPU
• registerTLB() : gem5::AMDGPUVM
• registerTraceFile() : sc_gem5::Scheduler
• registerUncacheableMemory() : gem5::GPUComputeDriver
• registerWithClockDomain() : gem5::ClockDomain
• RegMiscRegImmOp() : gem5::RegMiscRegImmOp
• RegMiscRegImmOp64() : gem5::RegMiscRegImmOp64
• regName() : gem5::ArmISA::CCRegClassOps, gem5::ArmISA::MiscRegClassOps, gem5::RegClass, gem5::RegClassOps, gem5::VecElemRegClassOps< ValueType >, gem5::X86ISA::FlatFloatRegClassOps, gem5::X86ISA::FlatIntRegClassOps
• RegNone() : gem5::RegNone
• RegOp() : gem5::RegOp
• RegOp64() : gem5::RegOp64
• RegOpBase() : gem5::X86ISA::RegOpBase
• regPort() : sc_gem5::Port
• regProbeListeners() : gem5::ArmISA::PMU, gem5::BaseMemProbe, gem5::compression::FrequentValues, gem5::o3::ElasticTrace, gem5::o3::SimpleTrace, gem5::PcCountTracker, gem5::prefetch::Base, gem5::SimObject, gem5::SimPoint
• regProbePoints() : gem5::ArmISA::TLB, gem5::AtomicSimpleCPU, gem5::BaseCache, gem5::BaseCPU, gem5::branch_prediction::BPredUnit, gem5::CommMonitor, gem5::o3::Commit, gem5::o3::CPU, gem5::o3::Fetch, gem5::o3::IEW, gem5::o3::Rename, gem5::PowerModel, gem5::ruby::RubyPrefetcherProxy, gem5::SimObject
• RegRegImmImmOp() : gem5::RegRegImmImmOp
• RegRegImmImmOp64() : gem5::RegRegImmImmOp64
• RegRegImmOp() : gem5::RegRegImmOp
• RegRegOp() : gem5::RegRegOp
• RegRegRegImmOp() : gem5::RegRegRegImmOp
• RegRegRegImmOp64() : gem5::RegRegRegImmOp64
• RegRegRegOp() : gem5::RegRegRegOp
• RegRegRegRegOp() : gem5::RegRegRegRegOp
• regShift() : gem5::RegClass, gem5::RegFile
• regsReady() : gem5::o3::MemDepUnit
• regsReset() : gem5::NSGigE
• regStats() : gem5::BaseCache::CacheStats, gem5::BaseCPU, gem5::BaseTags::BaseTagStats, gem5::BaseXBar, gem5::CheckerThreadContext< TC >, gem5::CoherentXBar, gem5::compression::Base::BaseStats, gem5::compression::BaseDictionaryCompressor::DictionaryStats, gem5::compression::Multi::MultiStats, gem5::GUPSGen::GUPSGenStat, gem5::Iris::ThreadContext, gem5::MathExprPowerModel, gem5::memory::AbstractMemory::MemStats, gem5::memory::DRAMInterface::DRAMStats, gem5::memory::DRAMInterface::RankStats, gem5::memory::MemCtrl::CtrlStats, gem5::memory::NVMInterface::NVMStats, gem5::memory::qos::MemCtrl::MemCtrlStats, gem5::memory::qos::Policy, gem5::MinorCPU, gem5::PowerDomain::PowerDomainStats, gem5::PowerState::PowerStateStats, gem5::ruby::AbstractController, gem5::ruby::AddressProfiler, gem5::ruby::garnet::GarnetNetwork, gem5::ruby::garnet::Router, gem5::ruby::Profiler, gem5::ruby::RubySystem, gem5::ruby::SimpleNetwork, gem5::ruby::Switch, gem5::SectorTags::SectorTagsStats, gem5::SnoopFilter, gem5::SpatterGen::SpatterGenStats, gem5::statistics::Group, gem5::System, gem5::ThreadContext, gem5::Ticked, gem5::TickedObject, gem5::VegaTLBCoalescer, sc_gem5::Kernel
• regStatsFromParent() : gem5::BaseCache::CacheCmdStats
• regtoh() : gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >
• regType() : gem5::RegClass
• RegularProbe() : gem5::ArmISA::PMU::RegularEvent::RegularProbe
• reinit() : gem5::ItsProcess, gem5::SMMUProcess
• reinsertToSchList() : gem5::ScheduleStage
• release() : gem5::ArmISA::MMU, gem5::Event, gem5::memory::CfiMemory, gem5::memory::SimpleMemory, gem5::o3::LSQ::LSQRequest, gem5::TraceCPU::ElasticDataGen::HardwareResource, gem5::WFBarrier, sc_core::sc_mempool, SimpleATInitiator1::SimplePool, SimpleATInitiator2::SimplePool, tlm::tlm_generic_payload
• release_carrier() : tlm_utils::instance_specific_extension_accessor
• release_extension() : tlm::tlm_generic_payload
• releaseBarrier() : gem5::ComputeUnit, gem5::Wavefront
• releaseFS() : gem5::ArmSystem
• releaseImpl() : gem5::Event, gem5::PyEvent, sc_gem5::Scheduler::TimeSlot
• releaseLayer() : gem5::BaseXBar::Layer< SrcType, DstType >
• releaseLoc() : gem5::AddressManager::AtomicStruct
• releaseLocation() : gem5::AddressManager
• releaseMem() : gem5::PM4PacketProcessor
• releaseMemDone() : gem5::PM4PacketProcessor
• releaseSpace() : gem5::LdsState
• releaseStoreBuffer() : gem5::TraceCPU::ElasticDataGen::HardwareResource
• releaseTimeSlot() : sc_gem5::Scheduler
• releaseWFsFromBarrier() : gem5::ComputeUnit
• reloadRegMap() : gem5::SparcISA::ISA
• relocatable() : gem5::loader::ElfObject, gem5::loader::ObjectFile
• relocate() : gem5::loader::Symbol, gem5::OutputFile< StreamType >, gem5::OutputStream
• remainingSpace() : gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >
• remap() : gem5::EmulationPageTable, gem5::FlashDevice, gem5::MultiLevelPageTable< EntryTypes >, gem5::VMA
• remapAddr() : gem5::AddrMapper, gem5::RangeAddrMapper
• remapRegion() : gem5::MemState
• RemoteGDB() : gem5::ArmISA::RemoteGDB, gem5::MipsISA::RemoteGDB, gem5::PowerISA::RemoteGDB, gem5::RiscvISA::RemoteGDB, gem5::SparcISA::RemoteGDB, gem5::X86ISA::RemoteGDB
• remove() : gem5::CheckerThreadContext< TC >, gem5::EventQueue, gem5::Iris::ThreadContext, gem5::o3::DependencyGraph< DynInstPtr >, gem5::o3::ThreadContext, gem5::OutputDirectory, gem5::PacketFifo, gem5::PCEvent, gem5::PCEventQueue, gem5::PCEventScope, gem5::PollQueue, gem5::RiscvISA::TLB, gem5::ruby::NetDest, gem5::ruby::Set, gem5::SimpleThread, gem5::System, gem5::TracingExtension, gem5::Trie< Key, Value >, sc_core::sc_attr_cltn, sc_dt::scfx_string
• remove_all() : sc_core::sc_attr_cltn
• remove_all_attributes() : sc_core::sc_object, sc_gem5::Object
• remove_attribute() : sc_core::sc_object, sc_gem5::Object
• remove_it() : sc_dt::scfx_mant_ref
• remove_traces() : sc_core::sc_in< sc_dt::sc_bigint< W > >, sc_core::sc_in< sc_dt::sc_biguint< W > >, sc_core::sc_in< sc_dt::sc_int< W > >, sc_core::sc_in< sc_dt::sc_uint< W > >, sc_core::sc_inout< sc_dt::sc_bigint< W > >, sc_core::sc_inout< sc_dt::sc_biguint< W > >, sc_core::sc_inout< sc_dt::sc_int< W > >, sc_core::sc_inout< sc_dt::sc_uint< W > >
• removeDepOnInst() : gem5::TraceCPU::ElasticDataGen::GraphNode
• removeEntryFromSlot() : gem5::ruby::MN_TBEStorage< RetryEntry >, gem5::ruby::TBEStorage
• removeExtension() : gem5::Extensible< Target >
• removeFromHistory() : gem5::o3::Rename
• removeFrontInst() : gem5::o3::CPU
• removeHardBreak() : gem5::BaseRemoteGDB
• removeInLSQ() : gem5::o3::DynInst
• removeInstsNotInROB() : gem5::o3::CPU
• removeInstsUntil() : gem5::o3::CPU
• removeIntlvBits() : gem5::AddrRange
• removeItem() : gem5::Event
• removeListener() : gem5::ProbeManager, gem5::ProbePoint, gem5::ProbePointArg< Arg >
• removeNetDest() : gem5::ruby::NetDest
• removeQCntxt() : gem5::HWScheduler
• removeRegDep() : gem5::TraceCPU::ElasticDataGen::GraphNode
• removeRegDepMapEntry() : gem5::o3::ElasticTrace
• removeRobDep() : gem5::TraceCPU::ElasticDataGen::GraphNode
• removeSet() : gem5::ruby::Set
• removeSoftBreak() : gem5::BaseRemoteGDB
• removeThread() : gem5::o3::CPU
• removeTrace() : gem5::RequestPort
• Rename() : gem5::o3::Rename
• rename() : gem5::CxxConfigManager, gem5::loader::Symbol, gem5::loader::SymbolTable, gem5::o3::Rename, gem5::o3::SimpleRenameMap, gem5::o3::UnifiedRenameMap
• renamedDestIdx() : gem5::o3::DynInst
• renameDestReg() : gem5::o3::DynInst
• renameDestRegs() : gem5::o3::Rename
• renamedSrcIdx() : gem5::o3::DynInst
• RenameHistory() : gem5::o3::Rename::RenameHistory
• renameInsts() : gem5::o3::Rename
• renameSrcReg() : gem5::o3::DynInst
• renameSrcRegs() : gem5::o3::Rename
• RenameStats() : gem5::o3::Rename::RenameStats
• Renaming() : gem5::CxxConfigManager::Renaming
• renderFrame() : gem5::BasePixelPump
• renderLine() : gem5::BasePixelPump
• renderPixels() : gem5::BasePixelPump
• RepBytes() : gem5::compression::FPC::RepBytes
• RepeatedQwords() : gem5::compression::RepeatedQwords
• RepeatedValuePattern() : gem5::compression::DictionaryCompressor< T >::RepeatedValuePattern< RepT >
• repeatEvent() : gem5::CPUProgressEvent
• replace() : gem5::Flags< T >, gem5::System::Threads
• ReplaceableEntry() : gem5::ReplaceableEntry
• replaceHead() : gem5::EventQueue
• replaceReqID() : gem5::SysBridge::BridgingPort
• replaceThreadContext() : gem5::BaseRemoteGDB, gem5::System, gem5::Workload
• replaceUpgrades() : gem5::MSHR::TargetList
• replay() : gem5::o3::MemDepUnit
• replayMemInst() : gem5::o3::IEW, gem5::o3::InstructionQueue
• replicatePage() : gem5::MemState, gem5::Process
• report() : sc_core::sc_report_handler
• report_error() : sc_core::sc_port_base
• reportData() : gem5::minor::BranchData, gem5::minor::Fetch1::FetchRequest, gem5::minor::ForwardInstData, gem5::minor::ForwardLineData, gem5::minor::LSQ::LSQRequest, gem5::minor::MinorDynInst, gem5::minor::QueuedInst, gem5::minor::ReportIF, gem5::minor::ReportTraitsAdaptor< ElemType >, gem5::minor::ReportTraitsPtrAdaptor< PtrType >
• reportEmpty() : sc_core::sc_vector_base
• ReportMsgInfo() : sc_gem5::ReportMsgInfo
• ReportSevInfo() : sc_gem5::ReportSevInfo
• reportUnbound() : gem5::Port
• req() : gem5::o3::LSQ::LSQRequest
• reqIPI() : gem5::MaltaCChip
• ReqLayer() : gem5::BaseXBar::ReqLayer
• ReqLookupResult() : gem5::SnoopFilter::ReqLookupResult
• ReqPacketQueue() : gem5::ReqPacketQueue
• ReqPort() : gem5::PortTerminator::ReqPort
• reqQueueFull() : gem5::Bridge::BridgeRequestPort, gem5::SerialLink::SerialLinkRequestPort
• Request() : gem5::Request
• request() : gem5::o3::LSQUnit::LSQEntry
• request_update() : sc_core::sc_prim_channel
• requestCkpt() : gem5::DistIface::Sync, gem5::DistIface::SyncNode, gem5::DistIface::SyncSwitch
• requestEventScheduled() : gem5::memory::HBMCtrl, gem5::memory::MemCtrl
• requestExit() : gem5::DistIface::Sync, gem5::DistIface::SyncNode, gem5::DistIface::SyncSwitch
• requestFbUpdate() : gem5::VncServer
• requestHandler() : gem5::UFSHostDevice
• requestInterrupt() : gem5::X86ISA::I82094AA, gem5::X86ISA::I8259, gem5::X86ISA::Interrupts
• requestKernelExitEvent() : gem5::Shader
• requestorId() : gem5::ComputeUnit, gem5::memory::MemPacket, gem5::o3::DynInst, gem5::Packet, gem5::ProtocolTester, gem5::Request, gem5::RubyTester
• RequestorInfo() : gem5::RequestorInfo
• RequestPort() : gem5::MasterPort, gem5::MemDelay::RequestPort, gem5::RequestPort
• RequestPortWrapper() : gem5::RequestPortWrapper
• RequestQueue() : gem5::VirtIOBlock::RequestQueue
• requestSize() : gem5::DmaReadFifo::DmaDoneEvent
• RequestStatus() : gem5::AMDGPUMemoryManager::RequestStatus
• requestStopSync() : gem5::DistIface::Sync, gem5::DistIface::SyncNode, gem5::DistIface::SyncSwitch
• RequestThread() : SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
• requestUpdate() : sc_gem5::Channel, sc_gem5::Scheduler
• requeue() : gem5::FutexMap
• res0() : gem5::ArmISA::MiscRegLUTEntry, gem5::ArmISA::MiscRegLUTEntryInitializer
• res1() : gem5::ArmISA::MiscRegLUTEntry, gem5::ArmISA::MiscRegLUTEntryInitializer
• reschedule() : gem5::BaseGlobalEvent, gem5::EventManager, gem5::EventQueue, gem5::o3::MemDepUnit
• rescheduleMemInst() : gem5::o3::IEW, gem5::o3::InstructionQueue
• reserve() : gem5::minor::InputBuffer< ElemType, ReportTraits, BubbleTraits >, gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >, gem5::minor::Reservable, gem5::PacketFifo, gem5::ruby::ALUFreeListArray, gem5::ruby::BankedArray
• reserveBuf() : gem5::FetchUnit::FetchBufDesc
• reserved() : gem5::Gicv3, gem5::PacketFifo, gem5::ruby::MN_TBEStorage< RetryEntry >, gem5::ruby::TBEStorage
• reservedBuf() : gem5::FetchUnit::FetchBufDesc
• reservedLines() : gem5::FetchUnit::FetchBufDesc
• reservedSpace() : gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >
• reserveGmResource() : gem5::Wavefront
• reserveLmResource() : gem5::Wavefront
• reserveResources() : gem5::ScheduleStage, gem5::Wavefront
• reserveSpace() : gem5::LdsState
• Reset() : gem5::RiscvISA::Reset, sc_core::sc_spawn_options::Reset< T >, sc_gem5::Reset
• reset() : DummyInfo, gem5::ActivityRecorder, gem5::ArmISA::Decoder, gem5::ArmISA::HTMCheckpoint, gem5::ArmISA::MiscRegLUTEntry, gem5::ArmISA::MiscRegLUTEntryInitializer, gem5::BaseHTMCheckpoint, gem5::branch_prediction::IndirectPredictor, gem5::branch_prediction::ReturnAddrStack::AddrStack, gem5::branch_prediction::ReturnAddrStack, gem5::branch_prediction::SimpleIndirectPredictor, gem5::DmaReadFifo::DmaDoneEvent, gem5::GenericSatCounter< T >, gem5::Gicv3, gem5::IdeController::Channel::BMIRegs, gem5::IdeDisk, gem5::IGbE::DescCache< T >, gem5::InstDecoder, gem5::MemChecker, gem5::NoMaliGpu, gem5::o3::DependencyGraph< DynInstPtr >, gem5::PipeStageIFace, gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >, gem5::RegisterBank< BankByteOrder >::RegisterBase, gem5::RegisterBank< BankByteOrder >::RegisterBuf, gem5::RegisterBank< BankByteOrder >::RegisterLBuf< BufBytes >, gem5::RegisterBank< BankByteOrder >::RegisterRoFill, gem5::RegisterBank< BankByteOrder >, gem5::replacement_policy::Base, gem5::replacement_policy::BIP, gem5::replacement_policy::BRRIP, gem5::replacement_policy::Dueling, gem5::replacement_policy::FIFO, gem5::replacement_policy::LFU, gem5::replacement_policy::LRU, gem5::replacement_policy::MRU, gem5::replacement_policy::Random, gem5::replacement_policy::SecondChance, gem5::replacement_policy::SHiP, gem5::replacement_policy::TreePLRU, gem5::RiscvISA::Decoder, gem5::ScheduleToExecute, gem5::ScoreboardCheckToSchedule, gem5::sinic::Device, gem5::statistics::AvgSampleStor, gem5::statistics::AvgStor, gem5::statistics::DataWrapVec< Derived, InfoProxyType >, gem5::statistics::DistBase< Derived, Stor >, gem5::statistics::DistProxy< Stat >, gem5::statistics::DistStor, gem5::statistics::Formula, gem5::statistics::HistStor, gem5::statistics::Info, gem5::statistics::InfoAccess, gem5::statistics::InfoProxy< Stat, Base >, gem5::statistics::ProxyInfo, gem5::statistics::SampleStor, gem5::statistics::ScalarBase< Derived, Stor >, gem5::statistics::SparseHistBase< Derived, Stor >, gem5::statistics::SparseHistStor, gem5::statistics::StatStor, gem5::statistics::ValueBase< Derived >, gem5::statistics::Vector2dBase< Derived, Stor >, gem5::TraceCPU::ElasticDataGen::InputStream, gem5::TraceCPU::FixedRetryGen::InputStream, gem5::TraceGen::InputStream, gem5::Uart8250::Registers::PairedRegister, gem5::UFSHostDevice::SCSIReply, gem5::VecPredRegContainer< NumBits, Packed >, gem5::VecPredRegT< VecElem, NumElems, Packed, Const >, gem5::VirtIODeviceBase, gem5::VirtQueue, gem5::VirtQueue::VirtRing< T >, gem5::WFBarrier, gem5::WriteAllocator, gem5::X86ISA::Decoder, gem5::X86ISA::ExtMachInst, gem5::X86ISA::I8237, gem5::X86ISA::LongModePTE, ProtoInputStream, sc_core::sc_process_handle, sc_core::sc_simcontext, sc_core::sc_vpool< T >, sc_gem5::Process, TestInfo, tlm::tlm_generic_payload, tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >::delta_list, tlm_utils::time_ordered_list< PAYLOAD >, tlm_utils::tlm_quantumkeeper
• reset_event() : sc_core::sc_process_handle
• reset_loop() : test
• reset_signal_is() : sc_core::sc_module, sc_core::sc_spawn_options
• resetAddr() : gem5::ArmSystem
• resetBarrier() : gem5::ComputeUnit
• resetClock() : gem5::Clocked
• ResetControllerExample() : gem5::fastmodel::ResetControllerExample
• resetDelay() : gem5::WriteAllocator
• resetDictionary() : gem5::compression::BaseDelta< BaseType, DeltaSizeBits >, gem5::compression::DictionaryCompressor< T >
• resetEntireStatusVector() : gem5::GPUDynInst
• resetEntries() : gem5::o3::IEW, gem5::o3::InstructionQueue, gem5::o3::ROB
• resetEvent() : sc_gem5::Process
• resetEventCounts() : gem5::ArmISA::PMU
• resetFlags() : gem5::MSHR::TargetList
• resetHppi() : gem5::Gicv3CPUInterface
• resetHtmStartsStops() : gem5::o3::Commit, gem5::o3::LSQ, gem5::o3::LSQUnit
• resetInitialValue() : gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >
• resetLastStopped() : gem5::Ticked
• resetOwner() : gem5::MemState
• resetRegion() : gem5::DynPoolManager, gem5::PoolManager
• resetRegisterPool() : gem5::ComputeUnit
• resetScores() : gem5::prefetch::BOP
• resetSigVals() : gem5::HSAPacketProcessor::SignalState
• resetStage() : gem5::o3::Decode, gem5::o3::Fetch, gem5::o3::Rename
• resetState() : gem5::o3::InstructionQueue, gem5::o3::LSQUnit, gem5::o3::ROB
• resetStats() : gem5::BaseSimpleCPU, gem5::memory::DRAMInterface::DRAMStats, gem5::memory::DRAMInterface::Rank, gem5::memory::DRAMInterface::RankStats, gem5::memory::DRAMsim3, gem5::memory::DRAMsim3Wrapper, gem5::Root::RootStats, gem5::ruby::AbstractController, gem5::ruby::garnet::CrossbarSwitch, gem5::ruby::garnet::GarnetNetwork, gem5::ruby::garnet::InputUnit, gem5::ruby::garnet::NetworkLink, gem5::ruby::garnet::Router, gem5::ruby::garnet::SwitchAllocator, gem5::ruby::GPUCoalescer, gem5::ruby::RubySystem, gem5::ruby::Sequencer, gem5::ruby::Switch, gem5::sinic::Device, gem5::statistics::Group
• resetStatusVector() : gem5::GPUDynInst
• resetter() : gem5::RegisterBank< BankByteOrder >::Register< Data, RegByteOrder >
• resetThread() : gem5::BaseISA, gem5::RiscvISA::ISA
• resetUctr() : gem5::branch_prediction::MPP_TAGE, gem5::branch_prediction::TAGE_SC_L_TAGE_8KB, gem5::branch_prediction::TAGEBase
• resetVect() : gem5::RiscvISA::BareMetal
• resize() : gem5::FrameBuffer, gem5::minor::ForwardInstData, gem5::o3::DependencyGraph< DynInstPtr >, gem5::ruby::NetDest, gem5::ruby::SubBlock, sc_dt::scfx_rep, sc_dt::scfx_string, tlm::circular_buffer< T >, tlm_utils::instance_specific_extension_container
• resize_extensions() : tlm::tlm_generic_payload, tlm_utils::instance_specific_extensions_per_accessor
• resize_to() : sc_dt::scfx_mant, sc_dt::scfx_rep
• resizeRegFiles() : gem5::Wavefront
• resolution() : gem5::BaseKvmTimer
• resolve() : gem5::OutputDirectory
• resolveFile() : gem5::TrafficGen
• resolveFlatSegment() : gem5::GPUDynInst
• resolveSimObject() : gem5::CxxConfigManager::SimObjectResolver, gem5::PybindSimObjectResolver, gem5::SimObjectResolver
• resolveStat() : gem5::statistics::Group
• RespLayer() : gem5::BaseXBar::RespLayer
• responderBind() : gem5::ResponsePort
• responderHadWritable() : gem5::Packet
• responderUnbind() : gem5::ResponsePort
• respondEvent() : gem5::memory::DRAMInterface, gem5::memory::MemInterface, gem5::memory::NVMInterface
• respondEventScheduled() : gem5::memory::HBMCtrl, gem5::memory::MemCtrl
• respondsTo() : gem5::ruby::AbstractController
• responseCommand() : gem5::MemCmd
• ResponseEvent() : gem5::AMDGPUSystemHub::ResponseEvent
• ResponsePort() : gem5::MemDelay::ResponsePort, gem5::ResponsePort, gem5::SlavePort
• ResponsePortWrapper() : gem5::ResponsePortWrapper
• ResponseThread() : SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
• RespPacketQueue() : gem5::RespPacketQueue
• RespPort() : gem5::PortTerminator::RespPort
• respQEmpty() : gem5::memory::HBMCtrl, gem5::memory::MemCtrl
• respQueueFull() : gem5::Bridge::BridgeResponsePort, gem5::SerialLink::SerialLinkResponsePort
• restartClock() : gem5::IGbE
• restartCounter() : gem5::Sp804::Timer, gem5::Sp805
• restartEqThread() : gem5::BaseKvmCPU
• restartScheduler() : gem5::memory::HBMCtrl, gem5::memory::MemCtrl
• restartStateMachine() : gem5::CopyEngine::CopyEngineChannel
• restartTimerCounter() : gem5::CpuLocalTimer::Timer
• restartWatchdogCounter() : gem5::CpuLocalTimer::Timer
• resTLBIttl() : gem5::ArmISA::TLBIRange
• restore() : gem5::ArmISA::HTMCheckpoint, gem5::BaseHTMCheckpoint, gem5::branch_prediction::ReturnAddrStack::AddrStack
• restoreFileOffsets() : gem5::FDArray
• restoreReqID() : gem5::SysBridge::BridgingPort
• result() : gem5::statistics::AvgStor, gem5::statistics::BinaryNode< Op >, gem5::statistics::ConstNode< T >, gem5::statistics::ConstVectorNode< T >, gem5::statistics::Formula, gem5::statistics::FormulaInfoProxy< Stat >, gem5::statistics::FormulaNode, gem5::statistics::FunctorProxy< T, Enabled >, gem5::statistics::FunctorProxy< T, typename std::enable_if_t< std::is_constructible_v< std::function< Result()>, const T & > > >, gem5::statistics::MethodProxy< T, V >, gem5::statistics::Node, gem5::statistics::ScalarBase< Derived, Stor >, gem5::statistics::ScalarInfo, gem5::statistics::ScalarInfoProxy< Stat >, gem5::statistics::ScalarProxy< Stat >, gem5::statistics::ScalarProxyNode< Stat >, gem5::statistics::ScalarStatNode, gem5::statistics::StatStor, gem5::statistics::SumNode< Op >, gem5::statistics::UnaryNode< Op >, gem5::statistics::ValueBase< Derived >, gem5::statistics::ValueProxy< T >, gem5::statistics::VectorBase< Derived, Stor >, gem5::statistics::VectorInfo, gem5::statistics::VectorInfoProxy< Stat >, gem5::statistics::VectorProxy< Stat >, gem5::statistics::VectorStatNode
• resultInt() : sc_gem5::ScMainFiber
• resultSize() : gem5::o3::DynInst
• resultStr() : sc_gem5::ScMainFiber
• resume() : gem5::BasePixelPump::PixelEvent, gem5::DrainManager, gem5::System::Threads::Thread, sc_core::sc_process_handle, sc_gem5::Process, sc_gem5::Scheduler
• resumeFill() : gem5::DmaReadFifo
• resumeFillBypass() : gem5::DmaReadFifo
• resumeFillTiming() : gem5::DmaReadFifo
• resumeRecvTicks() : gem5::DistIface::RecvScheduler
• resumeTransaction() : gem5::SMMUTranslationProcess
• resyncMatch() : gem5::PL031
• retError() : gem5::BaseSemihosting
• retireHead() : gem5::o3::ROB
• retireResponse() : gem5::minor::LSQ::LSQRequest, gem5::minor::LSQ::SingleDataRequest, gem5::minor::LSQ::SpecialDataRequest, gem5::minor::LSQ::SplitDataRequest
• retOK() : gem5::BaseSemihosting
• retransmit() : gem5::EtherTapBase
• retry() : gem5::PacketQueue, gem5::RiscvISA::Walker::WalkerState, gem5::SyscallReturn, gem5::VegaISA::Walker::WalkerState, gem5::X86ISA::Walker::WalkerState
• retryReq() : gem5::BaseTrafficGen
• retryStalledReq() : gem5::Bridge::BridgeResponsePort, gem5::SerialLink::SerialLinkResponsePort
• retrySyscall() : gem5::SyscallDesc
• retryWaiting() : gem5::BaseXBar::Layer< SrcType, DstType >
• ReturnAddrStack() : gem5::branch_prediction::ReturnAddrStack
• ReturnAddrStackStats() : gem5::branch_prediction::ReturnAddrStack::ReturnAddrStackStats
• returnFromFuncIn() : gem5::ArmISA::SkipFunc, gem5::SkipFuncBase
• returnInto() : gem5::SyscallDesc, gem5::SyscallDescABI< ABI >
• returnQueuePush() : gem5::LdsState
• returnValue() : gem5::SyscallReturn
• rev() : gem5::AtagRev
• reverse() : sc_dt::sc_proxy< X >, sc_dt::sc_signed, sc_dt::sc_unsigned
• reversed() : sc_dt::sc_subref_r< X >
• revokeThreadContext() : gem5::Process
• rfcLength() : gem5::ComputeUnit
• RfeOp() : gem5::ArmISA::RfeOp
• RiscvFault() : gem5::RiscvISA::RiscvFault
• RiscvMacroInst() : gem5::RiscvISA::AtomicMemOp, gem5::RiscvISA::LoadReserved, gem5::RiscvISA::RiscvMacroInst, gem5::RiscvISA::StoreCond
• RiscvMicroInst() : gem5::RiscvISA::AtomicMemOpMicro, gem5::RiscvISA::LoadReservedMicro, gem5::RiscvISA::MemFenceMicro, gem5::RiscvISA::RiscvMicroInst, gem5::RiscvISA::StoreCondMicro
• RiscvProcess() : gem5::RiscvProcess
• RiscvProcess32() : gem5::RiscvProcess32
• RiscvProcess64() : gem5::RiscvProcess64
• RiscvRTC() : gem5::RiscvRTC
• RiscvSemihosting() : gem5::RiscvSemihosting
• RiscvStaticInst() : gem5::RiscvISA::CompRegOp, gem5::RiscvISA::PseudoOp, gem5::RiscvISA::RegOp, gem5::RiscvISA::RiscvStaticInst, gem5::RiscvISA::SystemOp
• RngQueue() : gem5::VirtIORng::RngQueue
• rngstep() : QTIsaac< ALPHA >
• ROB() : gem5::o3::ROB
• ROBStats() : gem5::o3::ROB::ROBStats
• Root() : gem5::Root
• root() : gem5::Root
• rootdev() : gem5::AtagCore
• RootStats() : gem5::Root::RootStats
• ror() : gem5::ArmISA::Crypto
• rotate() : gem5::PowerISA::IntConcatRotateOp, gem5::PowerISA::IntRotateOp
• rotate_counter() : gem5::HMCController
• round() : sc_dt::scfx_rep
• rounding_flag() : sc_dt::sc_fxval, sc_dt::sc_fxval_fast, sc_dt::scfx_rep
• roundRobin() : gem5::o3::Commit, gem5::o3::Fetch
• roundRobinPriority() : gem5::MinorCPU
• route() : gem5::Gicv3Distributor, gem5::ruby::BaseRoutingUnit, gem5::ruby::WeightBased
• route_compute() : gem5::ruby::garnet::Router
• RouteInfo() : gem5::ruby::BaseRoutingUnit::RouteInfo, gem5::ruby::garnet::RouteInfo
• Router() : gem5::ruby::garnet::Router
• routerID() : gem5::ruby::garnet::NetworkInterface::OutputPort
• routeToHyp() : gem5::ArmISA::ArmFault, gem5::ArmISA::DataAbort, gem5::ArmISA::FastInterrupt, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::HypervisorCall, gem5::ArmISA::IllegalInstSetStateFault, gem5::ArmISA::Interrupt, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::SoftwareBreakpoint, gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::SPAlignmentFault, gem5::ArmISA::SupervisorCall, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SystemError, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::Watchpoint
• routeToMonitor() : gem5::ArmISA::ArmFault, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::DataAbort, gem5::ArmISA::FastInterrupt, gem5::ArmISA::HypervisorCall, gem5::ArmISA::Interrupt, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::SystemError
• routingPriority() : gem5::ruby::MessageBuffer
• RoutingUnit() : gem5::ruby::garnet::RoutingUnit
• rptr() : gem5::PM4Queue, gem5::SDMAEngine::SDMAQueue
• rptrWbAddr() : gem5::SDMAEngine::SDMAQueue
• RQLEntry() : gem5::HSAPacketProcessor::RQLEntry
• rrotate() : sc_dt::sc_proxy< X >
• RRSchedulingPolicy() : gem5::RRSchedulingPolicy
• RSDP() : gem5::X86ISA::ACPI::RSDP
• RSDT() : gem5::X86ISA::ACPI::RSDT
• rshift() : sc_dt::scfx_rep
• RTC() : gem5::MaltaIO::RTC, gem5::RiscvRTC::RTC
• RTCEvent() : gem5::MC146818::RTCEvent
• RTCTickEvent() : gem5::MC146818::RTCTickEvent
• rtralt() : gem5::networking::IpOpt
• rtType2Addr() : gem5::networking::Ip6Opt
• rtType2SegLft() : gem5::networking::Ip6Opt
• rtType2Type() : gem5::networking::Ip6Opt
• rtTypeExt() : gem5::networking::Ip6Hdr
• ruby_eviction_callback() : gem5::ruby::RubyPort
• ruby_hit_callback() : gem5::ruby::RubyPort
• ruby_stale_translation_callback() : gem5::ruby::RubyPort
• ruby_unaddressed_callback() : gem5::ruby::RubyPort
• RubyDirectedTester() : gem5::RubyDirectedTester
• RubyDummyPort() : gem5::ruby::RubyDummyPort
• rubyHtmCallback() : gem5::ruby::HTMSequencer
• RubyPort() : gem5::ruby::RubyPort
• RubyPortProxy() : gem5::ruby::RubyPortProxy
• RubyPrefetcher() : gem5::ruby::RubyPrefetcher
• RubyPrefetcherProxy() : gem5::ruby::RubyPrefetcherProxy
• RubyPrefetcherStats() : gem5::ruby::RubyPrefetcher::RubyPrefetcherStats
• RubyRequest() : gem5::ruby::RubyRequest
• RubySystem() : gem5::ruby::RubySystem
• RubyTester() : gem5::RubyTester
• run() : CoreDecouplingLTInitiator, gem5::DistIface::Sync, gem5::DistIface::SyncNode, gem5::DistIface::SyncSwitch, gem5::Fiber, gem5::ItsProcess, gem5::SMMUProcess, sc_gem5::Process, sc_gem5::ScEvent, SimpleATInitiator1, SimpleATInitiator2, SimpleLTInitiator1, SimpleLTInitiator1_dmi, SimpleLTInitiator2, SimpleLTInitiator2_dmi, SimpleLTInitiator3, SimpleLTInitiator3_dmi, SimpleLTInitiator_ext, tlm::tlm_slave_to_transport< REQ, RSP >
• runDelta() : sc_gem5::Scheduler
• runList() : gem5::PM4PacketProcessor
• runNext() : sc_gem5::Scheduler
• runNow() : sc_gem5::Scheduler
• runProcess() : gem5::Gicv3Its, gem5::SMMUv3
• runProcessAtomic() : gem5::Gicv3Its, gem5::SMMUv3
• runProcessTiming() : gem5::Gicv3Its, gem5::SMMUv3
• runReady() : sc_gem5::Scheduler
• runUntilLocalExit() : gem5::SimulatorThreads
• runUpdate() : sc_gem5::Scheduler
• rvExt() : gem5::RiscvISA::RiscvStaticInst
• rvSelect() : gem5::RiscvISA::RiscvStaticInst
• rvSext() : gem5::RiscvISA::RiscvStaticInst
• rvType() : gem5::RiscvISA::ISA, gem5::RiscvISA::PCState
• rvZext() : gem5::RiscvISA::RiscvStaticInst
• rw() : gem5::ArmISA::TableWalker::LongDescriptor
• rwTable() : gem5::ArmISA::TableWalker::LongDescriptor
• RxDescCache() : gem5::IGbE::RxDescCache
• rxDmaDone() : gem5::sinic::Device
• rxDmaReadDone() : gem5::NSGigE
• rxDmaWriteDone() : gem5::NSGigE
• rxDone() : gem5::DistEtherLink::RxLink
• rxDump() : gem5::NSGigE, gem5::sinic::Device
• rxFilter() : gem5::NSGigE, gem5::sinic::Device
• rxKick() : gem5::NSGigE, gem5::sinic::Device
• RxLink() : gem5::DistEtherLink::RxLink
• rxReset() : gem5::NSGigE
• RXSDT() : gem5::X86ISA::ACPI::RXSDT< T >
• rxStateMachine() : gem5::IGbE