gem5  v21.1.0.2
timing_expr.cc
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37 
38 #include "cpu/timing_expr.hh"
39 
40 #include "base/intmath.hh"
41 
42 namespace gem5
43 {
44 
46  ThreadContext *thread_,
47  TimingExprLet *let_) :
48  inst(inst_), thread(thread_), let(let_)
49 {
50  /* Reserve space to hold the results of evaluating the
51  * let expressions */
52  if (let) {
53  unsigned int num_defns = let->defns.size();
54 
55  results.resize(num_defns, 0);
56  resultAvailable.resize(num_defns, false);
57  }
58 }
59 
61 {
62  return context.inst->srcRegIdx(index).index();
63 }
64 
66 {
67  return context.thread->readIntReg(reg->eval(context));
68 }
69 
71 {
72  TimingExprEvalContext new_context(context.inst,
73  context.thread, this);
74 
75  return expr->eval(new_context);
76 }
77 
79 {
80  /* Lookup the result, evaluating if necessary. @todo, this
81  * should have more error checking */
82  if (!context.resultAvailable[index]) {
83  context.results[index] = context.let->defns[index]->eval(context);
84  context.resultAvailable[index] = true;
85  }
86 
87  return context.results[index];
88 }
89 
91 {
92  uint64_t arg_value = arg->eval(context);
93  uint64_t ret = 0;
94 
95  switch (op) {
96  case enums::timingExprSizeInBits:
97  if (arg_value == 0)
98  ret = 0;
99  else
100  ret = ceilLog2(arg_value);
101  break;
102  case enums::timingExprNot:
103  ret = arg_value != 0;
104  break;
105  case enums::timingExprInvert:
106  ret = ~arg_value;
107  break;
108  case enums::timingExprSignExtend32To64:
109  ret = static_cast<int64_t>(
110  static_cast<int32_t>(arg_value));
111  break;
112  case enums::timingExprAbs:
113  if (static_cast<int64_t>(arg_value) < 0)
114  ret = -arg_value;
115  else
116  ret = arg_value;
117  break;
118  default:
119  break;
120  }
121 
122  return ret;
123 }
124 
126 {
127  uint64_t left_value = left->eval(context);
128  uint64_t right_value = right->eval(context);
129  uint64_t ret = 0;
130 
131  switch (op) {
132  case enums::timingExprAdd:
133  ret = left_value + right_value;
134  break;
135  case enums::timingExprSub:
136  ret = left_value - right_value;
137  break;
138  case enums::timingExprUMul:
139  ret = left_value * right_value;
140  break;
141  case enums::timingExprUDiv:
142  if (right_value != 0) {
143  ret = left_value / right_value;
144  }
145  break;
146  case enums::timingExprUCeilDiv:
147  if (right_value != 0) {
148  ret = (left_value + (right_value - 1)) / right_value;
149  }
150  break;
151  case enums::timingExprSMul:
152  ret = static_cast<int64_t>(left_value) *
153  static_cast<int64_t>(right_value);
154  break;
155  case enums::timingExprSDiv:
156  if (right_value != 0) {
157  ret = static_cast<int64_t>(left_value) /
158  static_cast<int64_t>(right_value);
159  }
160  break;
161  case enums::timingExprEqual:
162  ret = left_value == right_value;
163  break;
164  case enums::timingExprNotEqual:
165  ret = left_value != right_value;
166  break;
167  case enums::timingExprULessThan:
168  ret = left_value < right_value;
169  break;
170  case enums::timingExprUGreaterThan:
171  ret = left_value > right_value;
172  break;
173  case enums::timingExprSLessThan:
174  ret = static_cast<int64_t>(left_value) <
175  static_cast<int64_t>(right_value);
176  break;
177  case enums::timingExprSGreaterThan:
178  ret = static_cast<int64_t>(left_value) >
179  static_cast<int64_t>(right_value);
180  break;
181  case enums::timingExprAnd:
182  ret = (left_value != 0) && (right_value != 0);
183  break;
184  case enums::timingExprOr:
185  ret = (left_value != 0) || (right_value != 0);
186  break;
187  default:
188  break;
189  }
190 
191  return ret;
192 }
193 
195 {
196  uint64_t cond_value = cond->eval(context);
197 
198  if (cond_value != 0)
199  return trueExpr->eval(context);
200  else
201  return falseExpr->eval(context);
202 }
203 
204 } // namespace gem5
gem5::TimingExprLet
Definition: timing_expr.hh:140
gem5::TimingExprBin::left
TimingExpr * left
Definition: timing_expr.hh:187
gem5::TimingExprBin::op
enums::TimingExprOp op
Definition: timing_expr.hh:186
gem5::TimingExprLet::defns
std::vector< TimingExpr * > defns
Definition: timing_expr.hh:143
gem5::TimingExprUn::op
enums::TimingExprOp op
Definition: timing_expr.hh:171
gem5::TimingExprBin::right
TimingExpr * right
Definition: timing_expr.hh:188
gem5::TimingExprEvalContext::let
TimingExprLet * let
Context visible as sub expressions.
Definition: timing_expr.hh:83
timing_expr.hh
gem5::TimingExprEvalContext::inst
const StaticInstPtr & inst
Special visible context.
Definition: timing_expr.hh:77
gem5::RegId::index
RegIndex index() const
Index accessors.
Definition: reg_class.hh:154
gem5::TimingExprLet::expr
TimingExpr * expr
Definition: timing_expr.hh:144
gem5::RefCountingPtr< StaticInst >
gem5::TimingExprIf::trueExpr
TimingExpr * trueExpr
Definition: timing_expr.hh:204
gem5::TimingExpr::eval
virtual uint64_t eval(TimingExprEvalContext &context)=0
gem5::TimingExprUn::arg
TimingExpr * arg
Definition: timing_expr.hh:172
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::TimingExprLet::eval
uint64_t eval(TimingExprEvalContext &context)
Definition: timing_expr.cc:70
gem5::TimingExprRef::eval
uint64_t eval(TimingExprEvalContext &context)
Definition: timing_expr.cc:78
gem5::StaticInst::srcRegIdx
const RegId & srcRegIdx(int i) const
Return logical index (architectural reg num) of i'th source reg.
Definition: static_inst.hh:247
gem5::TimingExprEvalContext::results
std::vector< uint64_t > results
Definition: timing_expr.hh:84
gem5::TimingExprEvalContext::TimingExprEvalContext
TimingExprEvalContext(const StaticInstPtr &inst_, ThreadContext *thread_, TimingExprLet *let_)
Definition: timing_expr.cc:45
gem5::TimingExprEvalContext
Object to gather the visible context for evaluation.
Definition: timing_expr.hh:73
gem5::TimingExprEvalContext::resultAvailable
std::vector< bool > resultAvailable
Definition: timing_expr.hh:85
gem5::ThreadContext::readIntReg
virtual RegVal readIntReg(RegIndex reg_idx) const =0
gem5::TimingExprSrcReg::eval
uint64_t eval(TimingExprEvalContext &context)
Definition: timing_expr.cc:60
gem5::TimingExprEvalContext::thread
ThreadContext * thread
Definition: timing_expr.hh:78
gem5::TimingExprReadIntReg::reg
TimingExpr * reg
Definition: timing_expr.hh:130
gem5::TimingExprRef::index
unsigned int index
Definition: timing_expr.hh:158
gem5::ceilLog2
static constexpr int ceilLog2(const T &n)
Definition: intmath.hh:84
gem5::TimingExprBin::eval
uint64_t eval(TimingExprEvalContext &context)
Definition: timing_expr.cc:125
gem5::TimingExprSrcReg::index
unsigned int index
Definition: timing_expr.hh:117
gem5::TimingExprIf::cond
TimingExpr * cond
Definition: timing_expr.hh:203
gem5::TimingExprReadIntReg::eval
uint64_t eval(TimingExprEvalContext &context)
Definition: timing_expr.cc:65
intmath.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::TimingExprIf::falseExpr
TimingExpr * falseExpr
Definition: timing_expr.hh:205
gem5::TimingExprUn::eval
uint64_t eval(TimingExprEvalContext &context)
Definition: timing_expr.cc:90
gem5::TimingExprIf::eval
uint64_t eval(TimingExprEvalContext &context)
Definition: timing_expr.cc:194

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