gem5 v24.0.0.0
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Defines a 8250 UART. More...
#include "base/bitunion.hh"
#include "base/logging.hh"
#include "dev/io_device.hh"
#include "dev/reg_bank.hh"
#include "dev/serial/uart.hh"
#include "params/Uart8250.hh"
Go to the source code of this file.
Classes | |
class | gem5::Uart8250 |
class | gem5::Uart8250::Registers |
class | gem5::Uart8250::Registers::PairedRegister |
class | gem5::Uart8250::Registers::BankedRegister |
class | gem5::Uart8250::Registers::RWSwitchedRegister |
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
Variables | |
const uint8_t | gem5::UART_MCR_LOOP = 0x10 |
Defines a 8250 UART.
Definition in file uart8250.hh.