gem5  v21.1.0.2
io_device.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2012 ARM Limited
3  * All rights reserved.
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Copyright (c) 2004-2005 The Regents of The University of Michigan
15  * All rights reserved.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions are
19  * met: redistributions of source code must retain the above copyright
20  * notice, this list of conditions and the following disclaimer;
21  * redistributions in binary form must reproduce the above copyright
22  * notice, this list of conditions and the following disclaimer in the
23  * documentation and/or other materials provided with the distribution;
24  * neither the name of the copyright holders nor the names of its
25  * contributors may be used to endorse or promote products derived from
26  * this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 #ifndef __DEV_IO_DEVICE_HH__
42 #define __DEV_IO_DEVICE_HH__
43 
44 #include "mem/tport.hh"
45 #include "params/BasicPioDevice.hh"
46 #include "params/PioDevice.hh"
47 #include "sim/clocked_object.hh"
48 
49 namespace gem5
50 {
51 
52 class PioDevice;
53 class System;
54 
62 template <class Device>
63 class PioPort : public SimpleTimingPort
64 {
65  protected:
67  Device *device;
68 
69  Tick
70  recvAtomic(PacketPtr pkt) override
71  {
72  // Technically the packet only reaches us after the header delay,
73  // and typically we also need to deserialise any payload.
74  Tick receive_delay = pkt->headerDelay + pkt->payloadDelay;
75  pkt->headerDelay = pkt->payloadDelay = 0;
76 
77  const Tick delay =
78  pkt->isRead() ? device->read(pkt) : device->write(pkt);
79  assert(pkt->isResponse() || pkt->isError());
80  return delay + receive_delay;
81  }
82 
84  getAddrRanges() const override
85  {
86  return device->getAddrRanges();
87  }
88 
89  public:
90  PioPort(Device *dev) :
91  SimpleTimingPort(dev->name() + ".pio", dev), device(dev)
92  {}
93 };
94 
102 class PioDevice : public ClockedObject
103 {
104  protected:
106 
110 
117  virtual AddrRangeList getAddrRanges() const = 0;
118 
124  virtual Tick read(PacketPtr pkt) = 0;
125 
131  virtual Tick write(PacketPtr pkt) = 0;
132 
133  public:
134  using Params = PioDeviceParams;
135  PioDevice(const Params &p);
136  virtual ~PioDevice();
137 
138  void init() override;
139 
140  Port &getPort(const std::string &if_name,
141  PortID idx=InvalidPortID) override;
142 
143  friend class PioPort<PioDevice>;
144 
145 };
146 
147 class BasicPioDevice : public PioDevice
148 {
149  protected:
152 
155 
158 
159  public:
161  BasicPioDevice(const Params &p, Addr size);
162 
168  AddrRangeList getAddrRanges() const override;
169 };
170 
171 } // namespace gem5
172 
173 #endif // __DEV_IO_DEVICE_HH__
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::BasicPioDevice::pioAddr
Addr pioAddr
Address that the device listens to.
Definition: io_device.hh:151
gem5::PioDevice::getAddrRanges
virtual AddrRangeList getAddrRanges() const =0
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
gem5::Port::name
const std::string name() const
Return port name (for DPRINTF).
Definition: port.hh:111
gem5::PioDevice
This device is the base class which all devices senstive to an address range inherit from.
Definition: io_device.hh:102
gem5::PioPort::recvAtomic
Tick recvAtomic(PacketPtr pkt) override
Receive an atomic request packet from the peer.
Definition: io_device.hh:70
gem5::PioPort::getAddrRanges
AddrRangeList getAddrRanges() const override
Get a list of the non-overlapping address ranges the owner is responsible for.
Definition: io_device.hh:84
gem5::PioDevice::pioPort
PioPort< PioDevice > pioPort
The pioPort that handles the requests for us and provides us requests that it sees.
Definition: io_device.hh:109
gem5::PioPort::device
Device * device
The device that this port serves.
Definition: io_device.hh:67
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::Packet::headerDelay
uint32_t headerDelay
The extra delay from seeing the packet until the header is transmitted.
Definition: packet.hh:420
gem5::BasicPioDevice::getAddrRanges
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Definition: io_device.cc:81
gem5::BasicPioDevice::BasicPioDevice
BasicPioDevice(const Params &p, Addr size)
Definition: io_device.cc:75
gem5::PioDevice::init
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: io_device.cc:59
gem5::SimpleTimingPort
The simple timing port uses a queued port to implement recvFunctional and recvTimingReq through recvA...
Definition: tport.hh:62
gem5::PioDevice::Params
PioDeviceParams Params
Definition: io_device.hh:134
gem5::Packet::payloadDelay
uint32_t payloadDelay
The extra pipelining delay from seeing the packet until the end of payload is transmitted by the comp...
Definition: packet.hh:438
gem5::Packet::isRead
bool isRead() const
Definition: packet.hh:582
gem5::System
Definition: system.hh:77
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::PioDevice::sys
System * sys
Definition: io_device.hh:105
gem5::BasicPioDevice::pioDelay
Tick pioDelay
Delay that the device experinces on an access.
Definition: io_device.hh:157
gem5::PioPort::PioPort
PioPort(Device *dev)
Definition: io_device.hh:90
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::Packet::isError
bool isError() const
Definition: packet.hh:610
gem5::ClockedObject
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Definition: clocked_object.hh:234
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
tport.hh
gem5::BasicPioDevice::PARAMS
PARAMS(BasicPioDevice)
clocked_object.hh
gem5::PioDevice::write
virtual Tick write(PacketPtr pkt)=0
Pure virtual function that the device must implement.
gem5::BasicPioDevice::pioSize
Addr pioSize
Size that the device's address range.
Definition: io_device.hh:154
gem5::PioDevice::PioDevice
PioDevice(const Params &p)
Definition: io_device.cc:50
gem5::PioDevice::~PioDevice
virtual ~PioDevice()
Definition: io_device.cc:54
gem5::PioDevice::read
virtual Tick read(PacketPtr pkt)=0
Pure virtual function that the device must implement.
std::list< AddrRange >
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::BasicPioDevice
Definition: io_device.hh:147
gem5::PioPort
The PioPort class is a programmed i/o port that all devices that are sensitive to an address range us...
Definition: io_device.hh:63
gem5::Packet::isResponse
bool isResponse() const
Definition: packet.hh:587
gem5::PioDevice::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: io_device.cc:67

Generated on Tue Sep 21 2021 12:25:16 for gem5 by doxygen 1.8.17