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tlb.hh
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37  * Authors: Gabe Black
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39 
40 #ifndef __ARCH_X86_TLB_HH__
41 #define __ARCH_X86_TLB_HH__
42 
43 #include <list>
44 #include <vector>
45 
46 #include "arch/generic/tlb.hh"
47 #include "arch/x86/pagetable.hh"
48 #include "base/trie.hh"
49 #include "mem/request.hh"
50 #include "params/X86TLB.hh"
51 
52 class ThreadContext;
53 
54 namespace X86ISA
55 {
56  class Walker;
57 
58  class TLB : public BaseTLB
59  {
60  protected:
61  friend class Walker;
62 
64 
65  uint32_t configAddress;
66 
67  public:
68 
69  typedef X86TLBParams Params;
70  TLB(const Params *p);
71 
72  void takeOverFrom(BaseTLB *otlb) override {}
73 
74  TlbEntry *lookup(Addr va, bool update_lru = true);
75 
76  void setConfigAddress(uint32_t addr);
77 
78  protected:
79 
80  EntryList::iterator lookupIt(Addr va, bool update_lru = true);
81 
83 
84  public:
85  Walker *getWalker();
86 
87  void flushAll() override;
88 
89  void flushNonGlobal();
90 
91  void demapPage(Addr va, uint64_t asn) override;
92 
93  protected:
94  uint32_t size;
95 
97 
98  EntryList freeList;
99 
101  uint64_t lruSeq;
102 
104 
105  // Statistics
110 
111  Fault translateInt(const RequestPtr &req, ThreadContext *tc);
112 
113  Fault translate(const RequestPtr &req, ThreadContext *tc,
114  Translation *translation, Mode mode,
115  bool &delayedResponse, bool timing);
116 
117  public:
118 
119  void evictLRU();
120 
121  uint64_t
123  {
124  return ++lruSeq;
125  }
126 
128  const RequestPtr &req, ThreadContext *tc, Mode mode) override;
129  void translateTiming(
130  const RequestPtr &req, ThreadContext *tc,
131  Translation *translation, Mode mode) override;
132 
147  Mode mode) const override;
148 
149  TlbEntry *insert(Addr vpn, const TlbEntry &entry);
150 
151  /*
152  * Function to register Stats
153  */
154  void regStats() override;
155 
156  // Checkpointing
157  void serialize(CheckpointOut &cp) const override;
158  void unserialize(CheckpointIn &cp) override;
159 
170  Port *getTableWalkerPort() override;
171  };
172 }
173 
174 #endif // __ARCH_X86_TLB_HH__
Ports are used to interface objects to each other.
Definition: port.hh:60
Stats::Scalar rdMisses
Definition: tlb.hh:108
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: tlb.cc:489
void setConfigAddress(uint32_t addr)
Definition: tlb.cc:142
Port * getTableWalkerPort() override
Get the table walker port.
Definition: tlb.cc:511
std::vector< TlbEntry > tlb
Definition: tlb.hh:96
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
std::shared_ptr< Request > RequestPtr
Definition: request.hh:83
TLB(const Params *p)
Definition: tlb.cc:61
uint32_t configAddress
Definition: tlb.hh:65
Fault finalizePhysical(const RequestPtr &req, ThreadContext *tc, Mode mode) const override
Do post-translation physical address finalization.
Definition: tlb.cc:226
Definition: cprintf.cc:42
Bitfield< 4, 0 > mode
void flushNonGlobal()
Definition: tlb.cc:148
TlbEntryTrie trie
Definition: tlb.hh:100
Fault translate(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode, bool &delayedResponse, bool timing)
Definition: tlb.cc:263
ThreadContext is the external interface to all thread state for anything outside of the CPU...
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:2508
STL vector class.
Definition: stl.hh:40
Stats::Scalar rdAccesses
Definition: tlb.hh:106
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:72
Definition: tlb.hh:52
uint64_t nextSeq()
Definition: tlb.hh:122
void regStats() override
Callback to set stat parameters.
Definition: tlb.cc:451
void translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode) override
Definition: tlb.cc:431
void evictLRU()
Definition: tlb.cc:78
Stats::Scalar wrMisses
Definition: tlb.hh:109
Walker * getWalker()
Definition: tlb.cc:445
Stats::Scalar wrAccesses
Definition: tlb.hh:107
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
EntryList::iterator lookupIt(Addr va, bool update_lru=true)
Bitfield< 8 > va
Fault translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) override
Definition: tlb.cc:424
void flushAll() override
Remove all entries from the TLB.
Definition: tlb.cc:129
Mode
Definition: tlb.hh:59
X86TLBParams Params
Definition: tlb.hh:69
TlbEntry * lookup(Addr va, bool update_lru=true)
Definition: tlb.cc:120
std::ostream CheckpointOut
Definition: serialize.hh:68
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: tlb.cc:474
This is exposed globally, independent of the ISA.
Definition: acpi.hh:57
Fault translateInt(const RequestPtr &req, ThreadContext *tc)
Definition: tlb.cc:172
void demapPage(Addr va, uint64_t asn) override
Definition: tlb.cc:161
EntryList freeList
Definition: tlb.hh:98
void takeOverFrom(BaseTLB *otlb) override
Take over from an old tlb context.
Definition: tlb.hh:72
std::list< TlbEntry * > EntryList
Definition: tlb.hh:63
uint64_t lruSeq
Definition: tlb.hh:101
Bitfield< 0 > p
Definition: pagetable.hh:152
Walker * walker
Definition: tlb.hh:82
AddrRange m5opRange
Definition: tlb.hh:103
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
Bitfield< 3 > addr
Definition: types.hh:81
TlbEntry * insert(Addr vpn, const TlbEntry &entry)
Definition: tlb.cc:96
uint32_t size
Definition: tlb.hh:94

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