#include "arch/arm/types.hh"
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"

Enumerations
enum	ArmISA::InterruptTypes { ArmISA::INT_RST, ArmISA::INT_ABT, ArmISA::INT_IRQ, ArmISA::INT_FIQ, ArmISA::INT_SEV, ArmISA::INT_VIRT_IRQ, ArmISA::INT_VIRT_FIQ, ArmISA::NumInterruptTypes }

Variables
const ByteOrder	ArmISA::GuestByteOrder = LittleEndianByteOrder

StaticInstPtr	ArmISA::decodeInst (ExtMachInst)

const Addr	ArmISA::PageShift = 12

const Addr	ArmISA::PageBytes = ULL(1) << PageShift

const Addr	ArmISA::Page_Mask = ~(PageBytes - 1)

const Addr	ArmISA::PageOffset = PageBytes - 1

const Addr	ArmISA::PteShift = 3

const Addr	ArmISA::NPtePageShift = PageShift - PteShift

const Addr	ArmISA::NPtePage = ULL(1) << NPtePageShift

const Addr	ArmISA::PteMask = NPtePage - 1

const Addr	ArmISA::USegBase = ULL(0x0)

const Addr	ArmISA::USegEnd = ULL(0x7FFFFFFF)

const unsigned	ArmISA::VABits = 32

const unsigned	ArmISA::PABits = 32

const Addr	ArmISA::VAddrImplMask = (ULL(1) << VABits) - 1

const Addr	ArmISA::VAddrUnImplMask = ~VAddrImplMask

const Addr	ArmISA::PAddrImplMask = (ULL(1) << PABits) - 1

const unsigned	ArmISA::MaxPhysAddrRange = 48

const int	ArmISA::MachineBytes = 4

const uint32_t	ArmISA::HighVecs = 0xFFFF0000

const bool	ArmISA::HasUnalignedMemAcc = true

const bool	ArmISA::CurThreadInfoImplemented = false

const int	ArmISA::CurThreadInfoReg = -1

Namespaces

Enumerations