- r -
- range_t
: PCEventQueue
- RangeMap
: AddrRangeMap< V, max_cache_size >
, SparcISA::TlbMap
- RawIterator
: sc_core::sc_vector_iter< Element, AccessPolicy >
- ReadyInstQueue
: InstructionQueue< Impl >
- Record
: ElasticTrace
, TraceCPU::ElasticDataGen
- RecordType
: ElasticTrace
, TraceCPU::ElasticDataGen
- reference
: CircularQueue< T >::iterator
, sc_core::sc_vector_iter< Element, AccessPolicy >
- RegDepArray
: TraceCPU::ElasticDataGen::GraphNode
- RegIndexVector
: ArmKvmCPU
, BaseArmKvmCPU
- RegPtr
: Trace::TarmacTracer
, Trace::TarmacTracerRecord
- release_fn
: tlm_utils::instance_specific_extension_container
- Rename
: SimpleCPUPolicy< Impl >
- RenameInfo
: SimpleRenameMap
, UnifiedRenameMap
- RenameMap
: DefaultCommit< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
, SimpleCPUPolicy< Impl >
- RenameStruct
: DefaultCommit< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
, FullO3CPU< Impl >
, SimpleCPUPolicy< Impl >
- ReplData
: CacheMemory
- ReqType
: DistIface
- RequestTable
: DMASequencer
, GPUCoalescer
- RequestType
: VirtIOBlock
- ResourceIds
: Iris::ThreadContext
- ResourceMap
: Iris::ThreadContext
- result_type
: std::hash< ChannelAddr >
- RetChannel
: m5::Coroutine< Arg, Ret >
- RetErrno
: ArmSemihosting
- rlim_t
: Solaris
- ROB
: DefaultCommit< Impl >
, SimpleCPUPolicy< Impl >
- RobDepArray
: TraceCPU::ElasticDataGen::GraphNode
Generated on Thu May 28 2020 16:22:31 for gem5 by doxygen 1.8.13