- f -

• F() : TAGE_SC_L_TAGE , TAGEBase
• FailedDataRequest() : Minor::LSQ::FailedDataRequest
• failedTiming() : BaseXBar::Layer< SrcType, DstType >
• FailUnimplemented() : FailUnimplemented , SparcISA::FailUnimplemented
• FALRU() : FALRU
• FALRUBlk() : FALRUBlk
• FastDataAccessMMUMiss() : SparcISA::FastDataAccessMMUMiss
• FastInstructionAccessMMUMiss() : SparcISA::FastInstructionAccessMMUMiss
• fault_prob() : FaultModel
• fault_type_to_string() : FaultModel
• fault_vector() : FaultModel
• FaultModel() : FaultModel
• faultName() : DecoderFaultInst
• FaultVals() : ArmISA::ArmFault::FaultVals , SparcISA::SparcFaultBase::FaultVals
• fcntl() : PerfKvmCounter
• FDArray() : FDArray
• FDEntry() : FDEntry
• fec() : tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >
• fetch() : ComputeUnit , DefaultFetch< Impl > , FetchStage , FetchUnit , TimingSimpleCPU
• Fetch1() : Minor::Fetch1
• Fetch1ThreadInfo() : Minor::Fetch1::Fetch1ThreadInfo
• Fetch2() : Minor::Fetch2
• Fetch2ThreadInfo() : Minor::Fetch2::Fetch2ThreadInfo
• fetchAddrComplete() : CopyEngine::CopyEngineChannel
• fetchAfterWb() : IGbE::DescCache< T > , IGbE::RxDescCache , IGbE::TxDescCache
• fetchBufferAlignPC() : DefaultFetch< Impl >
• fetchCacheLine() : DefaultFetch< Impl >
• fetchComplete() : IGbE::DescCache< T >
• fetchDescComplete() : CopyEngine::CopyEngineChannel
• fetchDescriptor() : ArmISA::TableWalker , CopyEngine::CopyEngineChannel
• fetchDescriptors() : IGbE::DescCache< T >
• fetchDescriptors1() : IGbE::DescCache< T >
• fetchInstsValid() : DefaultDecode< Impl >
• fetchLine() : Minor::Fetch1
• fetchMicroop() : ArmISA::Memory64 , ArmISA::Memory , ArmISA::PredMacroOp , ArmISA::RfeOp , ArmISA::SrsOp , MicrocodeRom , RiscvISA::RiscvMacroInst , SparcISA::SparcMacroInst , StaticInst , X86ISA::MacroopBase , X86ISAInst::MicrocodeRom
• fetchNextAddr() : CopyEngine::CopyEngineChannel
• fetchReqTrace() : ElasticTrace
• FetchRequest() : Minor::Fetch1::FetchRequest
• FetchStage() : FetchStage
• FetchTranslation() : DefaultFetch< Impl >::FetchTranslation , TimingSimpleCPU::FetchTranslation
• FetchUnit() : FetchUnit
• Fiber() : Fiber
• fiber() : sc_gem5::Process , sc_gem5::Thread
• Fifo() : Fifo< T >
• FifoQueuePolicy() : QoS::FifoQueuePolicy
• FIFOReplData() : FIFORP::FIFOReplData
• FIFORP() : FIFORP
• File() : ArmSemihosting::File
• FileBase() : ArmSemihosting::FileBase
• FileFDEntry() : FileFDEntry
• FileFeatures() : ArmSemihosting::FileFeatures
• fileName() : ArmSemihosting::FileBase
• filename() : Loader::ImageFileData
• fill() : FrameBuffer
• fillBuffer() : GoodbyeObject
• fillFifo() : Pl111
• fillKernelState() : ComputeUnit
• fillMask() : WriteMask
• fillMemPages() : VMA
• FillNNormal() : SparcISA::FillNNormal
• FillNOther() : SparcISA::FillNOther
• filterCP0Write() : MipsISA::ISA
• FilterEntry() : MultiperspectivePerceptron::FilterEntry
• finalize() : sc_core::sc_sensitive , sc_gem5::Port , sc_gem5::TraceVal< T, Base > , sc_gem5::TraceVal<::sc_core::sc_event, Base > , sc_gem5::TraceVal<::sc_core::sc_signal_in_if< T >, Base > , sc_gem5::TraceValBase , sc_gem5::TraceValFxnumBase< T, Base > , sc_gem5::VcdTraceValFinite< T > , sc_gem5::VcdTraceValLogic< T > , sc_gem5::VcdTraceValTime
• finalizeFinder() : sc_gem5::Port
• finalizePhysical() : ArmISA::TLB , BaseTLB , Iris::TLB , MipsISA::TLB , PowerISA::TLB , RiscvISA::TLB , SparcISA::TLB , X86ISA::TLB
• finalizePort() : sc_gem5::Port
• finalizeReset() : sc_gem5::Port
• finalizeTime() : sc_gem5::TraceFile
• finallindex() : LoopPredictor
• finalUTP() : UFSHostDevice
• find() : AddrRangeMap< V, max_cache_size > , CheckpointIn , IniFile , OutputDirectory , sc_gem5::StaticSensitivityFinder , SimObject , SparcISA::TlbMap
• find_event() : sc_core::sc_event_finder , sc_core::sc_event_finder_t< IF > , tlm::tlm_event_finder_t< IF, T >
• find_lsw() : sc_dt::scfx_rep
• find_msw() : sc_dt::scfx_rep
• find_sw() : sc_dt::scfx_rep
• findAddress() : Loader::SymbolTable
• findAllObjects() : CxxConfigManager
• findBest() : MultiperspectivePerceptron
• findBlock() : BaseTags , FALRU , SectorTags
• findBlockBySetAndWay() : BaseTags , FALRU
• findConfig() : SMMUTranslationProcess
• findContext() : BaseCPU
• findDomain() : DVFSHandler
• findDriver() : Process
• findEmptyHWQ() : HWScheduler
• findEntry() : AssociativeSet< Entry > , IniFile::Section
• findFreeContext() : System
• findHighestPendingLR() : VGic
• findImmediatePostDominators() : ControlFlowInfo
• findIndex() : Minor::Scoreboard
• findInHash() : MemDepUnit< MemDepPred, Impl >
• findInst() : ROB< Impl >
• findLRForVIRQ() : VGic
• findMatch() : Queue< Entry >
• findNearestAddr() : Loader::SymbolTable
• findNearestSymbol() : Loader::SymbolTable
• findNextActiveALQ() : HWScheduler
• findNextIdleRLQ() : HWScheduler
• findNextSenderState() : Packet
• findObj() : CheckpointIn
• findObject() : CxxConfigManager
• findObjectParams() : CxxConfigManager
• findObjectType() : CxxConfigManager
• findOrCreate() : OutputDirectory
• findPending() : Queue< Entry >
• findPort() : BaseXBar
• findPostDominators() : ControlFlowInfo
• findRegArrayMSB() : X86ISA::Interrupts
• findReleaseAddr() : Loader::DtbFile
• findResponse() : Minor::LSQ
• findSection() : IniFile
• findSmallest() : PersistentTable
• findStride() : Prefetcher::SignaturePath::PatternEntry
• findSymbol() : HsailCode , Loader::SymbolTable , StorageMap , StorageSpace
• findTable() : Prefetcher::Stride
• findTagInSet() : CacheMemory
• findTagInSetIgnorePermissions() : CacheMemory
• findTiming() : Minor::FUPipeline
• findTraversalOrder() : CxxConfigManager
• findVictim() : AssociativeSet< Entry > , BaseSetAssoc , BaseTags , CompressedTags , FALRU , SectorTags
• finish() : ArmISA::Stage2LookUp , ArmISA::Stage2MMU::Stage2Translation , BaseTLB::Translation , DataTranslation< ExecContextPtr > , DefaultFetch< Impl >::FetchTranslation , LSQ< Impl >::SingleDataRequest , LSQ< Impl >::SplitDataRequest , Minor::Fetch1::FetchRequest , Minor::LSQ::SingleDataRequest , Minor::LSQ::SpecialDataRequest , Minor::LSQ::SplitDataRequest , Prefetcher::Queued::DeferredPacket , sc_gem5::Module , TimingSimpleCPU::FetchTranslation , WholeTranslationState , X86ISA::GpuTLB::Translation
• finished() : Fiber
• finishedCommand() : UFSHostDevice::UFSSCSIDevice
• finishedRead() : UFSHostDevice::UFSSCSIDevice
• finishMMIOPending() : BaseKvmCPU
• finishPkt() : HSAPacketProcessor
• finishRequest() : SnoopFilter
• finishTranslation() : DefaultFetch< Impl > , TimingSimpleCPU
• FinishTranslationEvent() : DefaultFetch< Impl >::FinishTranslationEvent
• fiqDisable() : ArmISA::ArmFault , ArmISA::ArmFaultVals< T > , ArmISA::FastInterrupt
• first_object() : sc_core::sc_simcontext
• firstActive() : VecPredRegT< VecElem, NumElems, Packed, Const >
• firstLevel() : PageTableOps , V7LPageTableOps , V8PageTableOps16k , V8PageTableOps4k , V8PageTableOps64k
• FixedPriorityPolicy() : QoS::FixedPriorityPolicy
• FixedRetryGen() : TraceCPU::FixedRetryGen
• FixedStreamGen() : FixedStreamGen
• fixFuncEventAddr() : ArmISA::FsWorkload , Workload
• fixupAddr() : SETranslatingPortProxy , TranslatingPortProxy
• fixupFault() : MemState , Process
• Flag() : Debug::Flag
• flags() : AtagCore
• Flags() : Flags< T >
• flags() : MemBackdoor , Net::TcpHdr , Stats::DataWrap< Derived, InfoProxyType >
• FlashDevice() : FlashDevice
• flatIndex() : PhysRegId , RegId
• flattenCCIndex() : ArmISA::ISA , MipsISA::ISA , PowerISA::ISA , RiscvISA::ISA , SparcISA::ISA , X86ISA::ISA
• flattenDestReg() : BaseDynInst< Impl >
• flattenedDestRegIdx() : BaseDynInst< Impl >
• flattenFloatIndex() : ArmISA::ISA , MipsISA::ISA , PowerISA::ISA , RiscvISA::ISA , SparcISA::ISA , X86ISA::ISA
• flattenIntIndex() : ArmISA::ISA , MipsISA::ISA , PowerISA::ISA , RiscvISA::ISA , SparcISA::ISA , X86ISA::ISA
• flattenMiscIndex() : ArmISA::ISA , MipsISA::ISA , PowerISA::ISA , RiscvISA::ISA , SparcISA::ISA , X86ISA::ISA
• flattenRegId() : ArmISA::ISA , CheckerThreadContext< TC > , Iris::ThreadContext , MipsISA::ISA , O3ThreadContext< Impl > , PowerISA::ISA , RiscvISA::ISA , SimpleThread , SparcISA::ISA , ThreadContext , X86ISA::ISA
• flattenVecElemIndex() : ArmISA::ISA , MipsISA::ISA , PowerISA::ISA , RiscvISA::ISA , SparcISA::ISA , X86ISA::ISA
• flattenVecIndex() : ArmISA::ISA , MipsISA::ISA , PowerISA::ISA , RiscvISA::ISA , SparcISA::ISA , X86ISA::ISA
• flattenVecPredIndex() : ArmISA::ISA , MipsISA::ISA , PowerISA::ISA , RiscvISA::ISA , SparcISA::ISA , X86ISA::ISA
• flen() : ArmSemihosting::File , ArmSemihosting::FileBase
• flit() : flit
• flitBuffer() : flitBuffer
• flitisizeMessage() : NetworkInterface
• Float16() : Float16
• FloatingPointer() : X86ISA::IntelMP::FloatingPointer
• FloatOp() : PowerISA::FloatOp
• flow() : Net::Ip6Hdr
• flush() : CircularQueue< T > , DmaReadFifo , Fifo< T >
• flushAll() : ArmISA::TLB , BaseTLB , Iris::TLB , MipsISA::TLB , PowerISA::TLB , RiscvISA::TLB , SparcISA::TLB , X86ISA::TLB
• flushAllNs() : ArmISA::TLB
• flushAllSecurity() : ArmISA::TLB
• flushAsid() : ArmISA::TLB
• flushCmdList() : DRAMCtrl::Rank
• flushCoalescedMMIO() : BaseKvmCPU
• flushIpaVmid() : ArmISA::TLB
• flushMva() : ArmISA::TLB
• flushMvaAsid() : ArmISA::TLB
• flushNonGlobal() : X86ISA::TLB
• flushQueues() : Trace::TarmacTracerRecord
• flushTLBs() : BaseCPU
• flushTraces() : ElasticTrace
• flushWindows() : Sparc32Process , Sparc64Process , SparcProcess
• FoldedHistory() : TAGEBase::FoldedHistory
• force() : sc_core::sc_report_handler
• forceDeallocateTarget() : MSHRQueue
• forceParent() : sc_core::sc_vector_base
• forceSelfRefreshExit() : DRAMCtrl::Rank
• forEachBlk() : BaseSetAssoc , BaseTags , CompressedTags , FALRU , SectorTags
• forEachKid() : sc_gem5::Process
• forEachObject() : CxxConfigManager
• Format() : cp::Format
• formatReg() : Trace::TarmacTracerRecordV8::TraceRegEntryV8
• Formula() : Stats::Formula
• FormulaInfoProxy() : Stats::FormulaInfoProxy< Stat >
• FormulaNode() : Stats::FormulaNode
• forward_nb_transport() : adapt_ext2gp< BUSWIDTH > , adapt_gp2ext< BUSWIDTH >
• forwardAtomic() : CoherentXBar
• forwardFunctional() : CoherentXBar
• ForwardInstData() : Minor::ForwardInstData
• ForwardLineData() : Minor::ForwardLineData
• forwardOldRegs() : BaseO3DynInst< Impl >
• forwardPacket() : CoherentXBar
• forwardStoreData() : Minor::LSQ::StoreBuffer
• forwardTiming() : CoherentXBar
• FPCD() : FPCD
• FpCondCompRegOp() : ArmISA::FpCondCompRegOp
• FpCondSelOp() : ArmISA::FpCondSelOp
• FpOp() : ArmISA::FpOp , X86ISA::FpOp
• FpRegImmOp() : ArmISA::FpRegImmOp
• FpRegRegImmOp() : ArmISA::FpRegRegImmOp
• FpRegRegOp() : ArmISA::FpRegRegOp
• FpRegRegRegCondOp() : ArmISA::FpRegRegRegCondOp
• FpRegRegRegImmOp() : ArmISA::FpRegRegRegImmOp
• FpRegRegRegOp() : ArmISA::FpRegRegRegOp
• FpRegRegRegRegOp() : ArmISA::FpRegRegRegRegOp
• fpSqrt() : ArmISA::FpOp
• frag_flags() : Net::IpHdr
• frag_off() : Net::IpHdr
• fragmentExt() : Net::Ip6Hdr
• fragmentIdent() : Net::Ip6Opt
• fragmentOfflg() : Net::Ip6Opt
• FrameBuffer() : FrameBuffer
• frameBufferResized() : VncInput , VncServer
• frameFromAddr() : Gicv2m
• free() : ExtensionPool< T > , Gem5SystemC::MemoryManager , mm , MultiSocketSimpleSwitchAT , my_extension , sc_dt::scfx_mant , SimpleATInitiator1::SimplePool , SimpleATInitiator2::SimplePool , tlm::circular_buffer< T > , tlm::tlm_endian_context , tlm::tlm_extension_base , tlm::tlm_mm_interface , tlm_utils::instance_specific_extension_carrier , tlm_utils::instance_specific_extension_container_pool , tlm_utils::ispex_base , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::mm_end_event_ext , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::mm_end_event_ext
• free_all_extensions() : tlm::tlm_generic_payload
• free_entire_cache() : tlm::tlm_array< T >
• free_word() : sc_dt::scfx_mant
• freeEntry() : AQLRingBuffer
• freeLine() : Minor::ForwardLineData
• freeLSQEntry() : LSQ< Impl >::LSQRequest
• freeMemSize() : System
• freeMemSlot() : KvmVM
• freeRegion() : PoolManager , SimplePoolManager
• freeReservation() : Minor::InputBuffer< ElemType, ReportTraits, BubbleTraits > , Minor::Queue< ElemType, ReportTraits, BubbleTraits > , Minor::Reservable
• freeUnitNextCycle() : FUPool
• freq() : SystemCounter
• freqTable() : SystemCounter
• frequency() : Clocked , MaltaIO , Shader , TLBCoalescer , X86ISA::GpuTLB
• freqUpdateCallback() : SystemCounter
• freqUpdateSchedule() : SystemCounter
• from_seconds() : sc_core::sc_time
• from_string() : sc_core::sc_time , sc_dt::sc_fxval_fast , sc_dt::scfx_rep
• from_value() : sc_core::sc_time
• fromCache() : MemCmd , Packet
• fromDictionaryEntry() : DictionaryCompressor< T >
• fromGicV2ToKvm() : MuxingKvmGic
• fromKvmToGicV2() : MuxingKvmGic
• fromPacket() : SMMUTranslRequest
• fromPixel() : PixelConverter::Channel , PixelConverter
• fromPort() : sc_gem5::Port
• fromScModule() : sc_gem5::Module
• front() : CircularQueue< T > , EtherSwitch::Interface::PortFifo , Minor::InputBuffer< ElemType, ReportTraits, BubbleTraits > , Minor::Queue< ElemType, ReportTraits, BubbleTraits > , Minor::SelfStallingPipeline< ElemType, ReportTraits, BubbleTraits > , PacketFifo
• FsFreebsd() : ArmISA::FsFreebsd
• FsLinux() : ArmISA::FsLinux , X86ISA::FsLinux
• FSQueue() : VirtIO9PBase::FSQueue
• FsWorkload() : ArmISA::FsWorkload , RiscvISA::FsWorkload , SparcISA::FsWorkload , X86ISA::FsWorkload
• FUCompletion() : InstructionQueue< Impl >::FUCompletion
• FUDesc() : FUDesc
• FUIdxQueue() : FUPool::FUIdxQueue
• full() : CircularQueue< T > , PacketFifo , ReturnAddrStack
• FullO3CPU() : FullO3CPU< Impl >
• fullUpdate() : Gicv3Distributor
• functionalAccess() : AbstractMemory , BaseCache , MessageBuffer , NoncoherentCache , PhysicalMemory
• functionalMemoryRead() : AbstractController
• functionalMemoryWrite() : AbstractController
• functionalRead() : AbstractController , Message , MessageBuffer , Network , RubyRequest , RubySystem , SimpleNetwork , Switch
• functionalReadBuffers() : AbstractController
• functionalTLBAccess() : Shader
• functionalWrite() : AbstractController , CrossbarSwitch , flit , flitBuffer , GarnetNetwork , InputUnit , Message , MessageBuffer , Network , NetworkInterface , NetworkLink , OutputUnit , Router , RubyPort , RubyRequest , RubySystem , Sequencer , SequencerRequest , SimpleNetwork , Switch , VirtualChannel
• functionalWriteBuffers() : AbstractController
• FunctionProfile() : FunctionProfile
• functor() : Stats::ValueBase< Derived >
• FunctorProxy() : Stats::FunctorProxy< T >
• FuncUnit() : FuncUnit
• FUPipeline() : Minor::FUPipeline
• FUPool() : FUPool
• FutexKey() : FutexKey
• FVPBasePwrCtrl() : FVPBasePwrCtrl
• fw_process() : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
• fwl() : sc_dt::scfx_params
• fwPEQcb() : MultiSocketSimpleSwitchAT