| _cacheLineSize | System | protected |
| _genericTimer | ArmSystem | protected |
| _getMasterId(const SimObject *master, const std::string &master_name) | System | protected |
| _gic | ArmSystem | protected |
| _haveCrypto | ArmSystem | protected |
| _haveLargeAsid64 | ArmSystem | protected |
| _haveLPAE | ArmSystem | protected |
| _haveLSE | ArmSystem | protected |
| _havePAN | ArmSystem | protected |
| _haveSecurity | ArmSystem | protected |
| _haveSVE | ArmSystem | protected |
| _haveVirtualization | ArmSystem | protected |
| _highestELIs64 | ArmSystem | protected |
| _m5opRange | System | protected |
| _params | System | protected |
| _physAddrRange64 | ArmSystem | protected |
| _pwrCtrl | ArmSystem | protected |
| _resetAddr | ArmSystem | protected |
| _sveVL | ArmSystem | protected |
| activeCpus | System | protected |
| addStat(Stats::Info *info) | Stats::Group | |
| addStatGroup(const char *name, Group *block) | Stats::Group | |
| allocPhysPages(int npages) | System | |
| ArmSystem(Params *p) | ArmSystem | |
| breakpoint() | System | |
| bypassCaches() const | System | inline |
| cacheLineSize() const | System | inline |
| callClearStandByWfi(ThreadContext *tc) | ArmSystem | static |
| callClearWakeRequest(ThreadContext *tc) | ArmSystem | static |
| callSemihosting(ThreadContext *tc, bool gem5_ops=false) | ArmSystem | static |
| callSemihosting32(ThreadContext *tc, bool gem5_ops=false) | ArmSystem | static |
| callSemihosting64(ThreadContext *tc, bool gem5_ops=false) | ArmSystem | static |
| callSetStandByWfi(ThreadContext *tc) | ArmSystem | static |
| callSetWakeRequest(ThreadContext *tc) | ArmSystem | static |
| currentSection() | Serializable | static |
| deschedule(Event &event) | EventManager | inline |
| deschedule(Event *event) | EventManager | inline |
| drain() override | SimObject | inlinevirtual |
| Drainable() | Drainable | protected |
| drainResume() override | System | virtual |
| drainState() const | Drainable | inline |
| EventManager(EventManager &em) | EventManager | inline |
| EventManager(EventManager *em) | EventManager | inline |
| EventManager(EventQueue *eq) | EventManager | inline |
| eventq | EventManager | protected |
| eventQueue() const | EventManager | inline |
| find(const char *name) | SimObject | static |
| findFreeContext() | System | |
| freeMemSize() const | System | |
| futexMap | System | |
| getArch() const | System | inline |
| getArmSystem(ThreadContext *tc) | ArmSystem | inlinestatic |
| getGenericTimer() const | ArmSystem | inline |
| getGIC() const | ArmSystem | inline |
| getGlobalMasterId(const std::string &master_name) | System | |
| getGuestByteOrder() const | System | inline |
| getKvmVM() | System | inline |
| getMasterId(const SimObject *master, std::string submaster=std::string()) | System | |
| getMasterName(MasterID master_id) | System | |
| getMemoryMode() const | System | inline |
| getPageBytes() const | System | inline |
| getPageShift() const | System | inline |
| getPhysMem() | System | inline |
| getPort(const std::string &if_name, PortID idx=InvalidPortID) override | System | virtual |
| getPowerController() const | ArmSystem | inline |
| getProbeManager() | SimObject | |
| getStatGroups() const | Stats::Group | |
| getStats() const | Stats::Group | |
| getSystemPort() | System | inline |
| getThermalModel() const | System | inline |
| getThreadContext(ContextID tid) const | System | inline |
| Group()=delete | Stats::Group | |
| Group(const Group &)=delete | Stats::Group | |
| Group(Group *parent, const char *name=nullptr) | Stats::Group | |
| haveCrypto() const | ArmSystem | inline |
| haveEL(ThreadContext *tc, ExceptionLevel el) | ArmSystem | static |
| haveLargeAsid64() const | ArmSystem | inline |
| haveLargeAsid64(ThreadContext *tc) | ArmSystem | static |
| haveLPAE() const | ArmSystem | inline |
| haveLPAE(ThreadContext *tc) | ArmSystem | static |
| haveLSE() const | ArmSystem | inline |
| havePAN() const | ArmSystem | inline |
| haveSecurity() const | ArmSystem | inline |
| haveSecurity(ThreadContext *tc) | ArmSystem | static |
| haveSemihosting() const | ArmSystem | inline |
| haveSemihosting(ThreadContext *tc) | ArmSystem | static |
| haveSVE() const | ArmSystem | inline |
| haveVirtualization() const | ArmSystem | inline |
| haveVirtualization(ThreadContext *tc) | ArmSystem | static |
| highestEL() const | ArmSystem | inline |
| highestEL(ThreadContext *tc) | ArmSystem | static |
| highestELIs64() const | ArmSystem | inline |
| highestELIs64(ThreadContext *tc) | ArmSystem | static |
| incWorkItemsBegin() | System | inline |
| incWorkItemsEnd() | System | inline |
| init() override | System | virtual |
| init_param | System | |
| initState() | SimObject | virtual |
| isAtomicMode() const | System | inline |
| isMemAddr(Addr addr) const | System | |
| isTimingMode() const | System | inline |
| kvmVM | System | protected |
| lastWorkItemStarted | System | |
| leafMasterName(const SimObject *master, const std::string &submaster) | System | protected |
| loadState(CheckpointIn &cp) | SimObject | virtual |
| lookupMasterId(const SimObject *obj) const | System | |
| lookupMasterId(const std::string &name) const | System | |
| m5opRange() const | System | inline |
| markWorkItem(int index) | System | inline |
| masters | System | protected |
| maxMasters() | System | inline |
| maxPID | System | static |
| memInvalidate() | SimObject | inlinevirtual |
| memoryMode | System | protected |
| memSize() const | System | |
| memWriteback() | SimObject | inlinevirtual |
| multiProc | ArmSystem | |
| multiThread | System | |
| name() const | SimObject | inlinevirtual |
| notifyFork() | Drainable | inlinevirtual |
| numContexts() const | System | inline |
| numRunningContexts() | System | |
| numSystemsRunning | System | static |
| numWorkIds | System | protected |
| operator=(const Group &)=delete | Stats::Group | |
| pagePtr | System | |
| params() const | ArmSystem | inline |
| Params typedef | ArmSystem | |
| physAddrMask() const | ArmSystem | inline |
| physAddrMask(ThreadContext *tc) | ArmSystem | static |
| physAddrRange() const | ArmSystem | inline |
| physAddrRange(ThreadContext *tc) | ArmSystem | static |
| physAddrRange64() const | ArmSystem | inline |
| physmem | System | protected |
| physProxy | System | |
| PIDs | System | |
| preDumpStats() | Stats::Group | virtual |
| printSystems() | System | static |
| redirectPaths | System | |
| registerThreadContext(ThreadContext *tc, ContextID assigned=InvalidContextID) | System | |
| regProbeListeners() | SimObject | virtual |
| regProbePoints() | SimObject | virtual |
| regStats() override | System | virtual |
| remoteGDB | System | |
| remove(PCEvent *event) override | System | virtual |
| replaceThreadContext(ThreadContext *tc, ContextID context_id) | System | |
| reschedule(Event &event, Tick when, bool always=false) | EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | EventManager | inline |
| resetAddr() const | ArmSystem | inline |
| resetAddr(ThreadContext *tc) | ArmSystem | static |
| resetStats() | Stats::Group | virtual |
| resolveStat(std::string name) const | Stats::Group | |
| schedule(PCEvent *event) override | System | virtual |
| SimObject::schedule(Event &event, Tick when) | EventManager | inline |
| SimObject::schedule(Event *event, Tick when) | EventManager | inline |
| semihosting | ArmSystem | protected |
| Serializable() | Serializable | |
| serialize(CheckpointOut &cp) const override | System | virtual |
| serializeAll(CheckpointOut &cp) | SimObject | static |
| Serializable::serializeAll(const std::string &cpt_dir) | Serializable | static |
| serializeSection(CheckpointOut &cp, const char *name) const | Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | Serializable | inline |
| setCurTick(Tick newVal) | EventManager | inline |
| setGenericTimer(GenericTimer *generic_timer) | ArmSystem | inline |
| setGIC(BaseGic *gic) | ArmSystem | inline |
| setMemoryMode(Enums::MemoryMode mode) | System | |
| setPowerController(FVPBasePwrCtrl *pwr_ctrl) | ArmSystem | inline |
| setResetAddr(Addr addr) | ArmSystem | inline |
| signalDrainDone() const | Drainable | inlineprotected |
| signalList | System | |
| SimObject(const Params *_params) | SimObject | |
| startup() override | System | virtual |
| stripSystemName(const std::string &master_name) const | System | protected |
| sveVL() const | ArmSystem | inline |
| System(Params *p) | System | |
| systemList | System | static |
| thermalModel | System | protected |
| threadContexts | System | |
| totalNumInsts | System | |
| unserialize(CheckpointIn &cp) override | System | virtual |
| unserializeGlobals(CheckpointIn &cp) | Serializable | static |
| unserializeSection(CheckpointIn &cp, const char *name) | Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | Serializable | inline |
| validKvmEnvironment() const | System | |
| wakeupEventQueue(Tick when=(Tick) -1) | EventManager | inline |
| workItemBegin(uint32_t tid, uint32_t workid) | System | inline |
| workItemEnd(uint32_t tid, uint32_t workid) | System | |
| workItemsBegin | System | protected |
| workItemsEnd | System | protected |
| workItemStats | System | |
| workload | System | |
| ~Drainable() | Drainable | protectedvirtual |
| ~Group() | Stats::Group | virtual |
| ~Serializable() | Serializable | virtual |
| ~SimObject() | SimObject | virtual |
| ~System() | System | |
