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gem5
v20.0.0.0
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gem5
v20.0.0.0
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This is the complete list of members for GicV2, including all inherited members.
| _params | SimObject | protected |
| ack_id | GicV2 | protected |
| activeInt | GicV2 | protected |
| addrRanges | GicV2 | protected |
| addStat(Stats::Info *info) | Stats::Group | |
| addStatGroup(const char *name, Group *block) | Stats::Group | |
| bankedRegs | GicV2 | protected |
| BaseGic(const Params *p) | BaseGic | |
| BitUnion32(SWI) Bitfield< 3 | GicV2 | protected |
| clearInt(ContextID ctx, uint32_t int_num) | GicV2 | protected |
| clearInt(uint32_t number) override | GicV2 | virtual |
| clearPPInt(uint32_t num, uint32_t cpu) override | GicV2 | virtual |
| Clocked(ClockDomain &clk_domain) | Clocked | inlineprotected |
| Clocked(Clocked &)=delete | Clocked | protected |
| clockEdge(Cycles cycles=Cycles(0)) const | Clocked | inline |
| ClockedObject(const ClockedObjectParams *p) | ClockedObject | |
| clockPeriod() const | Clocked | inline |
| clockPeriodUpdated() | Clocked | inlineprotectedvirtual |
| cpu_id | GicV2 | protected |
| cpu_list | GicV2 | protected |
| CPU_MAX | GicV2 | protectedstatic |
| cpuBpr | GicV2 | protected |
| cpuControl | GicV2 | protected |
| cpuEnabled(ContextID ctx) const | GicV2 | inlineprotected |
| cpuHighestInt | GicV2 | protected |
| cpuPioDelay | GicV2 | protected |
| cpuPpiActive | GicV2 | protected |
| cpuPpiPending | GicV2 | protected |
| cpuPriority | GicV2 | protected |
| cpuRange | GicV2 | protected |
| cpuSgiActive | GicV2 | protected |
| cpuSgiActiveExt | GicV2 | protected |
| cpuSgiPending | GicV2 | protected |
| cpuSgiPendingExt | GicV2 | protected |
| cpuTarget | GicV2 | protected |
| curCycle() const | Clocked | inline |
| currentSection() | Serializable | static |
| cyclesToTicks(Cycles c) const | Clocked | inline |
| deschedule(Event &event) | EventManager | inline |
| deschedule(Event *event) | EventManager | inline |
| DIST_SIZE enum value | GicV2 | protected |
| distPioDelay | GicV2 | protected |
| drain() override | GicV2 | virtual |
| Drainable() | Drainable | protected |
| drainResume() override | GicV2 | virtual |
| drainState() const | Drainable | inline |
| enabled | GicV2 | protected |
| enableGrp0 | GicV2 | protected |
| enableGrp1 | GicV2 | protected |
| EndBitUnion(SWI) BitUnion32(IAR) Bitfield< 9 | GicV2 | protected |
| EndBitUnion(IAR) BitUnion32(CTLR) Bitfield< 3 > fiqEn | GicV2 | protected |
| EventManager(EventManager &em) | EventManager | inline |
| EventManager(EventManager *em) | EventManager | inline |
| EventManager(EventQueue *eq) | EventManager | inline |
| eventq | EventManager | protected |
| eventQueue() const | EventManager | inline |
| find(const char *name) | SimObject | static |
| frequency() const | Clocked | inline |
| gem5ExtensionsEnabled | GicV2 | protected |
| genSwiMask(int cpu) | GicV2 | protected |
| getActiveInt(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| getAddrRanges() const override | GicV2 | inlinevirtual |
| getBankedRegs(ContextID) | GicV2 | protected |
| getCpuPriority(unsigned cpu) | GicV2 | protected |
| getCpuTarget(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| getIntConfig(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| getIntEnabled(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| getIntGroup(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| getIntPriority(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| getPendingInt(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| getPort(const std::string &if_name, PortID idx=InvalidPortID) override | PioDevice | virtual |
| getProbeManager() | SimObject | |
| getStatGroups() const | Stats::Group | |
| getStats() const | Stats::Group | |
| getSystem() const | BaseGic | inline |
| GICC_ABPR enum value | GicV2 | protected |
| GICC_APR0 enum value | GicV2 | protected |
| GICC_APR1 enum value | GicV2 | protected |
| GICC_APR2 enum value | GicV2 | protected |
| GICC_APR3 enum value | GicV2 | protected |
| GICC_BPR enum value | GicV2 | protected |
| GICC_BPR_MINIMUM | GicV2 | protectedstatic |
| GICC_CTLR enum value | GicV2 | protected |
| GICC_DIR enum value | GicV2 | protected |
| GICC_EOIR enum value | GicV2 | protected |
| GICC_HPPIR enum value | GicV2 | protected |
| GICC_IAR enum value | GicV2 | protected |
| GICC_IIDR enum value | GicV2 | protected |
| GICC_PMR enum value | GicV2 | protected |
| GICC_RPR enum value | GicV2 | protected |
| giccIIDR | GicV2 | protected |
| GICD_CTLR enum value | GicV2 | protected |
| GICD_ICACTIVER | GicV2 | protectedstatic |
| GICD_ICENABLER | GicV2 | protectedstatic |
| GICD_ICFGR | GicV2 | protectedstatic |
| GICD_ICPENDR | GicV2 | protectedstatic |
| GICD_IGROUPR | GicV2 | protectedstatic |
| GICD_IIDR enum value | GicV2 | protected |
| GICD_IPRIORITYR | GicV2 | protectedstatic |
| GICD_ISACTIVER | GicV2 | protectedstatic |
| GICD_ISENABLER | GicV2 | protectedstatic |
| GICD_ISPENDR | GicV2 | protectedstatic |
| GICD_ITARGETSR | GicV2 | protectedstatic |
| GICD_PIDR0 enum value | GicV2 | protected |
| GICD_PIDR1 enum value | GicV2 | protected |
| GICD_PIDR2 enum value | GicV2 | protected |
| GICD_PIDR3 enum value | GicV2 | protected |
| GICD_SGIR enum value | GicV2 | protected |
| GICD_TYPER enum value | GicV2 | protected |
| gicdIIDR | GicV2 | protected |
| gicdPIDR | GicV2 | protected |
| GicV2(const Params *p) | GicV2 | |
| GicVersion enum name | BaseGic | |
| GLOBAL_INT_LINES | GicV2 | protectedstatic |
| Group()=delete | Stats::Group | |
| Group(const Group &)=delete | Stats::Group | |
| Group(Group *parent, const char *name=nullptr) | Stats::Group | |
| haveGem5Extensions | GicV2 | protected |
| iccrpr | GicV2 | protected |
| init() override | BaseGic | virtual |
| initState() | SimObject | virtual |
| INT_BITS_MAX | GicV2 | protectedstatic |
| INT_LINES_MAX | GicV2 | protectedstatic |
| intConfig | GicV2 | protected |
| intEnabled | GicV2 | protected |
| intGroup | GicV2 | protected |
| intLatency | GicV2 | protected |
| intNumToBit(int num) const | GicV2 | inlineprotected |
| intNumToWord(int num) const | GicV2 | inlineprotected |
| intPriority | GicV2 | protected |
| isFiq(ContextID ctx, uint32_t int_num) | GicV2 | inlineprotected |
| isGroup0(ContextID ctx, uint32_t int_num) | GicV2 | inlineprotected |
| isLevelSensitive(ContextID ctx, uint32_t ix) | GicV2 | inlineprotected |
| itLines | GicV2 | protected |
| list_type | GicV2 | protected |
| loadState(CheckpointIn &cp) | SimObject | virtual |
| memInvalidate() | SimObject | inlinevirtual |
| memWriteback() | SimObject | inlinevirtual |
| name() const | SimObject | inlinevirtual |
| nextCycle() const | Clocked | inline |
| NN_CONFIG_MASK | GicV2 | protectedstatic |
| notifyFork() | Drainable | inlinevirtual |
| SimObject::operator=(const Group &)=delete | Stats::Group | |
| Clocked::operator=(Clocked &)=delete | Clocked | protected |
| Params typedef | GicV2 | |
| params() const | GicV2 | inline |
| pendingDelayedInterrupts | GicV2 | protected |
| pendingInt | GicV2 | protected |
| PioDevice(const Params *p) | PioDevice | |
| pioPort | PioDevice | protected |
| platform | BaseGic | protected |
| postDelayedFiq(uint32_t cpu) | GicV2 | protected |
| postDelayedInt(uint32_t cpu) | GicV2 | protected |
| postFiq(uint32_t cpu, Tick when) | GicV2 | protected |
| postFiqEvent | GicV2 | protected |
| postInt(uint32_t cpu, Tick when) | GicV2 | protected |
| postIntEvent | GicV2 | protected |
| powerState | ClockedObject | |
| PPI_MAX | GicV2 | protectedstatic |
| preDumpStats() | Stats::Group | virtual |
| read(PacketPtr pkt) override | GicV2 | virtual |
| readCpu(PacketPtr pkt) | GicV2 | protected |
| readCpu(ContextID ctx, Addr daddr) override | GicV2 | protectedvirtual |
| readDistributor(PacketPtr pkt) | GicV2 | protected |
| readDistributor(ContextID ctx, Addr daddr, size_t resp_sz) | GicV2 | protected |
| readDistributor(ContextID ctx, Addr daddr) override | GicV2 | inlineprotectedvirtual |
| regProbeListeners() | SimObject | virtual |
| regProbePoints() | SimObject | virtual |
| regStats() | Stats::Group | virtual |
| reschedule(Event &event, Tick when, bool always=false) | EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | EventManager | inline |
| resetClock() const | Clocked | inlineprotected |
| resetStats() | Stats::Group | virtual |
| resolveStat(std::string name) const | Stats::Group | |
| schedule(Event &event, Tick when) | EventManager | inline |
| schedule(Event *event, Tick when) | EventManager | inline |
| sendInt(uint32_t number) override | GicV2 | virtual |
| sendPPInt(uint32_t num, uint32_t cpu) override | GicV2 | virtual |
| Serializable() | Serializable | |
| serialize(CheckpointOut &cp) const override | GicV2 | virtual |
| serializeAll(CheckpointOut &cp) | SimObject | static |
| Serializable::serializeAll(const std::string &cpt_dir) | Serializable | static |
| serializeSection(CheckpointOut &cp, const char *name) const | Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | Serializable | inline |
| setCurTick(Tick newVal) | EventManager | inline |
| sgi_id | GicV2 | protected |
| SGI_MASK | GicV2 | protectedstatic |
| SGI_MAX | GicV2 | protectedstatic |
| signalDrainDone() const | Drainable | inlineprotected |
| SimObject(const Params *_params) | SimObject | |
| softInt(ContextID ctx, SWI swi) | GicV2 | protected |
| SPURIOUS_INT | GicV2 | protectedstatic |
| startup() | SimObject | virtual |
| supportsVersion(GicVersion version) override | GicV2 | virtual |
| sys | PioDevice | protected |
| ticksToCycles(Tick t) const | Clocked | inline |
| unserialize(CheckpointIn &cp) override | GicV2 | virtual |
| unserializeGlobals(CheckpointIn &cp) | Serializable | static |
| unserializeSection(CheckpointIn &cp, const char *name) | Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | Serializable | inline |
| updateClockPeriod() | Clocked | inline |
| updateIntState(int hint) | GicV2 | protectedvirtual |
| updateRunPri() | GicV2 | protected |
| voltage() const | Clocked | inline |
| wakeupEventQueue(Tick when=(Tick) -1) | EventManager | inline |
| write(PacketPtr pkt) override | GicV2 | virtual |
| writeCpu(PacketPtr pkt) | GicV2 | protected |
| writeCpu(ContextID ctx, Addr daddr, uint32_t data) override | GicV2 | protectedvirtual |
| writeDistributor(PacketPtr pkt) | GicV2 | protected |
| writeDistributor(ContextID ctx, Addr daddr, uint32_t data, size_t data_sz) | GicV2 | protected |
| writeDistributor(ContextID ctx, Addr daddr, uint32_t data) override | GicV2 | inlineprotectedvirtual |
| ~BaseGic() | BaseGic | virtual |
| ~Clocked() | Clocked | inlineprotectedvirtual |
| ~Drainable() | Drainable | protectedvirtual |
| ~GicV2() | GicV2 | |
| ~Group() | Stats::Group | virtual |
| ~PioDevice() | PioDevice | virtual |
| ~Serializable() | Serializable | virtual |
| ~SimObject() | SimObject | virtual |