gem5  v20.0.0.3
hw_scheduler.hh
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35 
36 #ifndef __DEV_HSA_HW_SCHEDULER_HH__
37 #define __DEV_HSA_HW_SCHEDULER_HH__
38 
40 
41 // We allocate one PIO page for doorbells and each
42 // address is 8 bytes
43 #define MAX_ACTIVE_QUEUES (PAGE_SIZE/8)
44 
46 {
47  public:
48  HWScheduler(HSAPacketProcessor* hsa_pp, Tick wakeup_delay)
49  : hsaPP(hsa_pp), nextALId(0), nextRLId(0),
50  wakeupDelay(wakeup_delay), schedWakeupEvent(this)
51  {}
52  void write(Addr db_addr, uint32_t doorbell_reg);
53  void registerNewQueue(uint64_t hostReadIndexPointer,
54  uint64_t basePointer,
55  uint64_t queue_id,
56  uint32_t size);
57  void unregisterQueue(uint64_t queue_id);
58  void wakeup();
59  void schedWakeup();
60  class SchedulerWakeupEvent : public Event
61  {
62  private:
64  public:
65  SchedulerWakeupEvent(HWScheduler *hw_schdlr) : hwSchdlr(hw_schdlr) {}
66  virtual void process();
67  virtual const char *description() const;
68  };
69  bool isRLQIdle(uint32_t rl_idx);
70  bool findNextActiveALQ();
71  bool findNextIdleRLQ();
72  bool unmapQFromRQ();
73  bool contextSwitchQ();
74  bool findEmptyHWQ();
75  bool mapQIfSlotAvlbl(uint32_t al_idx, AQLRingBuffer* aql_buf,
76  HSAQueueDescriptor* q_desc);
77  void addQCntxt(uint32_t al_idx, AQLRingBuffer* aql_buf,
78  HSAQueueDescriptor* q_desc);
79  void removeQCntxt();
81  void updateRRVars(uint32_t al_idx, uint32_t rl_idx);
82 
83  private:
84  // Active list keeps track of all queues created
85  std::map<uint32_t, QCntxt> activeList;
86  //TODO: Modify this to support multi-process in the future.
87  // doorbell map, maps doorbells to active list entry
88  std::map<Addr, uint32_t> dbMap;
89  // regdListMap keeps track of the mapping of queues to
90  // registered list. regdListMap is indexed with active
91  // list index (which is same as queue ID)
92  std::map<uint32_t, uint32_t> regdListMap;
94 
95  // Scheduling information.
96  // For now, this is simple round robin but
97  // this will be changed to a sophisticated logic
98  // in the future. So, in the future, we will
99  // move these variables into a scheduler class
100  uint32_t nextALId;
101  uint32_t nextRLId;
104 };
105 
106 #endif // __DEV_HSA_HW_SCHEDULER_HH__
bool contextSwitchQ()
std::map< Addr, uint32_t > dbMap
Definition: hw_scheduler.hh:88
bool findNextIdleRLQ()
bool mapQIfSlotAvlbl(uint32_t al_idx, AQLRingBuffer *aql_buf, HSAQueueDescriptor *q_desc)
bool unmapQFromRQ()
void unregisterQueue(uint64_t queue_id)
void updateRRVars(uint32_t al_idx, uint32_t rl_idx)
void scheduleAndWakeupMappedQ()
void schedWakeup()
Definition: hw_scheduler.cc:71
bool findNextActiveALQ()
std::map< uint32_t, QCntxt > activeList
Definition: hw_scheduler.hh:85
uint64_t Tick
Tick count type.
Definition: types.hh:61
bool findEmptyHWQ()
bool isRLQIdle(uint32_t rl_idx)
SchedulerWakeupEvent(HWScheduler *hw_schdlr)
Definition: hw_scheduler.hh:65
void wakeup()
Definition: hw_scheduler.cc:57
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
void addQCntxt(uint32_t al_idx, AQLRingBuffer *aql_buf, HSAQueueDescriptor *q_desc)
const Tick wakeupDelay
uint32_t nextRLId
Definition: eventq.hh:245
HWScheduler(HSAPacketProcessor *hsa_pp, Tick wakeup_delay)
Definition: hw_scheduler.hh:48
uint32_t nextALId
Internal ring buffer which is used to prefetch/store copies of the in-memory HSA ring buffer...
SchedulerWakeupEvent schedWakeupEvent
std::map< uint32_t, uint32_t > regdListMap
Definition: hw_scheduler.hh:92
HSAPacketProcessor * hsaPP
Definition: hw_scheduler.hh:93
void write(Addr db_addr, uint32_t doorbell_reg)
void removeQCntxt()
void registerNewQueue(uint64_t hostReadIndexPointer, uint64_t basePointer, uint64_t queue_id, uint32_t size)
Definition: hw_scheduler.cc:84
virtual const char * description() const
Return a C string describing the event.

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