decode.hh

Go to the documentation of this file.

/*
 * Copyright (c) 2012 ARM Limited
 * All rights reserved
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Copyright (c) 2004-2006 The Regents of The University of Michigan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __CPU_O3_DECODE_HH__
#define __CPU_O3_DECODE_HH__

#include <queue>

#include "base/statistics.hh"
#include "cpu/timebuf.hh"

struct DerivO3CPUParams;

template<class Impl>
class DefaultDecode
{
  private:
    // Typedefs from the Impl.
    typedef typename Impl::O3CPU O3CPU;
    typedef typename Impl::DynInstPtr DynInstPtr;
    typedef typename Impl::CPUPol CPUPol;

    // Typedefs from the CPU policy.
    typedef typename CPUPol::FetchStruct FetchStruct;
    typedef typename CPUPol::DecodeStruct DecodeStruct;
    typedef typename CPUPol::TimeStruct TimeStruct;

  public:
    enum DecodeStatus {
        Active,
        Inactive
    };

    enum ThreadStatus {
        Running,
        Idle,
        StartSquash,
        Squashing,
        Blocked,
        Unblocking
    };

  private:
    DecodeStatus _status;

    ThreadStatus decodeStatus[Impl::MaxThreads];

  public:
    DefaultDecode(O3CPU *_cpu, DerivO3CPUParams *params);

    void startupStage();

    void clearStates(ThreadID tid);

    void resetStage();

    std::string name() const;

    void regStats();

    void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);

    void setDecodeQueue(TimeBuffer<DecodeStruct> *dq_ptr);

    void setFetchQueue(TimeBuffer<FetchStruct> *fq_ptr);

    void setActiveThreads(std::list<ThreadID> *at_ptr);

    void drainSanityCheck() const;

    bool isDrained() const;

    void takeOverFrom() { resetStage(); }

    void tick();

    void decode(bool &status_change, ThreadID tid);

    void decodeInsts(ThreadID tid);

  private:
    void skidInsert(ThreadID tid);

    bool skidsEmpty();

    void updateStatus();

    void sortInsts();

    void readStallSignals(ThreadID tid);

    bool checkSignalsAndUpdate(ThreadID tid);

    bool checkStall(ThreadID tid) const;

    inline bool fetchInstsValid();

    bool block(ThreadID tid);

    bool unblock(ThreadID tid);

    void squash(const DynInstPtr &inst, ThreadID tid);

  public:
    unsigned squash(ThreadID tid);

  private:
    // Interfaces to objects outside of decode.
    O3CPU *cpu;

    TimeBuffer<TimeStruct> *timeBuffer;

    typename TimeBuffer<TimeStruct>::wire fromRename;

    typename TimeBuffer<TimeStruct>::wire fromIEW;

    typename TimeBuffer<TimeStruct>::wire fromCommit;

    // Might not be the best name as not only fetch will read it.
    typename TimeBuffer<TimeStruct>::wire toFetch;

    TimeBuffer<DecodeStruct> *decodeQueue;

    typename TimeBuffer<DecodeStruct>::wire toRename;

    TimeBuffer<FetchStruct> *fetchQueue;

    typename TimeBuffer<FetchStruct>::wire fromFetch;

    std::queue<DynInstPtr> insts[Impl::MaxThreads];

    std::queue<DynInstPtr> skidBuffer[Impl::MaxThreads];

    bool wroteToTimeBuffer;

    struct Stalls {
        bool rename;
    };

    Stalls stalls[Impl::MaxThreads];

    Cycles renameToDecodeDelay;

    Cycles iewToDecodeDelay;

    Cycles commitToDecodeDelay;

    Cycles fetchToDecodeDelay;

    unsigned decodeWidth;

    unsigned toRenameIndex;

    ThreadID numThreads;

    std::list<ThreadID> *activeThreads;

    unsigned skidBufferMax;

    Addr bdelayDoneSeqNum[Impl::MaxThreads];

    DynInstPtr squashInst[Impl::MaxThreads];

    bool squashAfterDelaySlot[Impl::MaxThreads];


    Stats::Scalar decodeIdleCycles;
    Stats::Scalar decodeBlockedCycles;
    Stats::Scalar decodeRunCycles;
    Stats::Scalar decodeUnblockCycles;
    Stats::Scalar decodeSquashCycles;
    Stats::Scalar decodeBranchResolved;
    Stats::Scalar decodeBranchMispred;
    Stats::Scalar decodeControlMispred;
    Stats::Scalar decodeDecodedInsts;
    Stats::Scalar decodeSquashedInsts;
};

#endif // __CPU_O3_DECODE_HH__