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47 #include "debug/RubyTest.hh"
54 checkStartEvent([this]{
wakeup(); },
"RubyTester tick",
56 _requestorId(
p->system->getRequestorId(
this)),
57 m_checkTable_ptr(
nullptr),
58 m_num_cpus(
p->num_cpus),
59 m_checks_to_complete(
p->checks_to_complete),
60 m_deadlock_threshold(
p->deadlock_threshold),
63 m_wakeup_frequency(
p->wakeup_frequency),
64 m_check_flush(
p->check_flush),
65 m_num_inst_only_ports(
p->port_cpuInstPort_connection_count),
66 m_num_inst_data_ports(
p->port_cpuInstDataPort_connection_count)
68 m_checks_completed = 0;
82 for (
int i = 0;
i <
p->port_cpuInstPort_connection_count; ++
i) {
83 readPorts.push_back(
new CpuPort(
csprintf(
"%s-instPort%d",
name(),
i),
87 for (
int i = 0;
i <
p->port_cpuInstDataPort_connection_count; ++
i) {
88 CpuPort *port =
new CpuPort(
csprintf(
"%s-instDataPort%d",
name(),
i),
90 readPorts.push_back(port);
91 writePorts.push_back(port);
94 for (
int i = 0;
i <
p->port_cpuDataPort_connection_count; ++
i) {
95 CpuPort *port =
new CpuPort(
csprintf(
"%s-dataPort%d",
name(),
i),
97 readPorts.push_back(port);
98 writePorts.push_back(port);
103 schedule(checkStartEvent, 1);
134 if (if_name !=
"cpuInstPort" && if_name !=
"cpuInstDataPort" &&
135 if_name !=
"cpuDataPort") {
139 if (if_name ==
"cpuInstPort") {
141 panic(
"RubyTester::getPort: unknown inst port %d\n",
148 }
else if (if_name ==
"cpuInstDataPort") {
150 panic(
"RubyTester::getPort: unknown inst+data port %d\n",
159 assert(if_name ==
"cpuDataPort");
163 if (idx > (
static_cast<int>(
readPorts.size()) -
165 panic(
"RubyTester::getPort: unknown data port %d\n",
181 safe_cast<RubyTester::SenderState*>(pkt->
senderState);
209 assert(idx >= 0 && idx <
readPorts.size());
228 DPRINTF(RubyTest,
"completed request for proc: %d", proc);
229 DPRINTFR(RubyTest,
" addr: 0x%x, size: %d, data: ",
230 data->getAddress(),
data->getSize());
231 for (
int byte = 0;
byte <
data->getSize();
byte++) {
239 assert(check_ptr != NULL);
249 assert(check_ptr != NULL);
265 for (
int processor = 0; processor < size; processor++) {
268 panic(
"Deadlock detected: current_time: %d last_progress_time: %d "
269 "difference: %d processor: %d\n",
279 out <<
"[RubyTester]" << std::endl;
283 RubyTesterParams::create()
void hitCallback(NodeID proc, SubBlock *data)
static const Priority CPU_Tick_Pri
CPU ticks must come after other associated CPU events (such as writebacks).
RubyTester(const Params *p)
int m_num_inst_only_ports
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
void performCallback(NodeID proc, SubBlock *data, Cycles curTime)
EventFunctionWrapper checkStartEvent
RequestPort * getWritableCpuPort(int idx)
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
uint64_t m_checks_completed
bool isInstDataCpuPort(int idx)
CheckTable * m_checkTable_ptr
void schedule(Event &event, Tick when)
RequestPort * getReadableCpuPort(int idx)
int m_num_inst_data_ports
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
Ports are used to interface objects to each other.
Cycles curCycle() const
Determine the current cycle, corresponding to a tick aligned to a clock edge.
Check * getCheck(Addr address)
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
std::vector< RequestPort * > writePorts
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
bool isInstOnlyCpuPort(int idx)
void print(std::ostream &out) const
const std::string & name()
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
uint64_t m_checks_to_complete
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
std::vector< RequestPort * > readPorts
Cycles is a wrapper class for representing cycle counts, i.e.
SenderState * senderState
This packet's sender state.
std::string csprintf(const char *format, const Args &...args)
std::vector< Cycles > m_last_progress_vector
#define panic(...)
This implements a cprintf based panic() function.
Tick curTick()
The current simulated tick.
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