gem5  v20.1.0.0
gic_v2m.hh
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37 
44 #ifndef __DEV_ARM_GIC_V2M_H__
45 #define __DEV_ARM_GIC_V2M_H__
46 
47 #include "base/bitunion.hh"
48 #include "cpu/intr_control.hh"
49 #include "dev/arm/base_gic.hh"
50 #include "dev/io_device.hh"
51 #include "dev/platform.hh"
52 #include "params/Gicv2m.hh"
53 #include "params/Gicv2mFrame.hh"
54 
60 class Gicv2mFrame : public SimObject
61 {
62  public:
63  const Addr addr;
64  const unsigned int spi_base;
65  const unsigned int spi_len;
66 
67  typedef Gicv2mFrameParams Params;
68  Gicv2mFrame(const Params *p) :
70  {}
71 };
72 
73 class Gicv2m : public PioDevice
74 {
75  private:
76  static const int FRAME_SIZE = 0x10000;
77 
78  static const int MSI_TYPER = 0x0008;
79  static const int MSI_SETSPI_NSR = 0x0040;
80  static const int PER_ID4 = 0x0fd0;
81 
83  const Tick pioDelay;
84 
87 
90 
92  unsigned int log2framenum;
93 
94  public:
95  typedef Gicv2mParams Params;
96  Gicv2m(const Params *p);
97 
102  virtual AddrRangeList getAddrRanges() const;
103 
106  virtual Tick read(PacketPtr pkt);
107 
110  virtual Tick write(PacketPtr pkt);
113  private:
116  int frameFromAddr(Addr a) const;
117 };
118 
119 #endif //__DEV_ARM_GIC_V2M_H__
Gicv2mFrame::Gicv2mFrame
Gicv2mFrame(const Params *p)
Definition: gic_v2m.hh:68
io_device.hh
Gicv2m::pioDelay
const Tick pioDelay
Latency for an MMIO operation.
Definition: gic_v2m.hh:83
Gicv2mFrame
Ultimately this class should be embedded in the Gicv2m class, but this confuses Python as 'Gicv2m::Fr...
Definition: gic_v2m.hh:60
Gicv2m::MSI_TYPER
static const int MSI_TYPER
Definition: gic_v2m.hh:78
Gicv2m::FRAME_SIZE
static const int FRAME_SIZE
Definition: gic_v2m.hh:76
base_gic.hh
Gicv2m::log2framenum
unsigned int log2framenum
Count of number of configured frames, as log2(frames)
Definition: gic_v2m.hh:92
Gicv2m
Definition: gic_v2m.hh:73
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
std::vector< Gicv2mFrame * >
Gicv2m::read
virtual Tick read(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:105
Gicv2m::gic
BaseGic * gic
Gic to which we fire interrupts.
Definition: gic_v2m.hh:89
PioDevice
This device is the base class which all devices senstive to an address range inherit from.
Definition: io_device.hh:99
Gicv2m::MSI_SETSPI_NSR
static const int MSI_SETSPI_NSR
Definition: gic_v2m.hh:79
ArmISA::a
Bitfield< 8 > a
Definition: miscregs_types.hh:62
Gicv2m::getAddrRanges
virtual AddrRangeList getAddrRanges() const
Return the address ranges used by the Gicv2m This is the set of frame addresses.
Definition: gic_v2m.cc:95
Gicv2m::write
virtual Tick write(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:135
bitunion.hh
Gicv2mFrame::Params
Gicv2mFrameParams Params
Definition: gic_v2m.hh:67
platform.hh
Gicv2m::Params
Gicv2mParams Params
Definition: gic_v2m.hh:95
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
Gicv2m::frames
std::vector< Gicv2mFrame * > frames
A set of configured hardware frames.
Definition: gic_v2m.hh:86
Gicv2m::Gicv2m
Gicv2m(const Params *p)
Definition: gic_v2m.cc:79
Gicv2mFrame::spi_base
const unsigned int spi_base
Definition: gic_v2m.hh:64
BaseGic
Definition: base_gic.hh:62
intr_control.hh
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
Gicv2mFrame::spi_len
const unsigned int spi_len
Definition: gic_v2m.hh:65
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
Gicv2m::frameFromAddr
int frameFromAddr(Addr a) const
Determine which frame a PIO access lands in.
Definition: gic_v2m.cc:161
Gicv2mFrame::addr
const Addr addr
Definition: gic_v2m.hh:63
Gicv2m::PER_ID4
static const int PER_ID4
Definition: gic_v2m.hh:80
SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:92

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