gem5  v20.1.0.0
inst_res.hh
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37 
38 #ifndef __CPU_INST_RES_HH__
39 #define __CPU_INST_RES_HH__
40 
41 #include <type_traits>
42 
43 #include "arch/generic/types.hh"
44 #include "arch/generic/vec_reg.hh"
45 
46 class InstResult {
50  public:
51  union MultiResult {
52  uint64_t integer;
53  double dbl;
58  };
59 
60  enum class ResultType {
61  Scalar,
62  VecElem,
63  VecReg,
64  VecPredReg,
66  Invalid
67  };
68 
69  private:
72 
73  public:
75  InstResult() : type(ResultType::Invalid) { }
76  InstResult(const InstResult &) = default;
78  template<typename T>
79  explicit InstResult(T i, const ResultType& t) : type(t) {
80  static_assert(std::is_integral<T>::value ^
81  std::is_floating_point<T>::value,
82  "Parameter type is neither integral nor fp, or it is both");
83  if (std::is_integral<T>::value) {
84  result.integer = i;
85  } else if (std::is_floating_point<T>::value) {
86  result.dbl = i;
87  }
88  }
90  explicit InstResult(const VecRegContainer& v, const ResultType& t)
91  : type(t) { result.vector = v; }
93  explicit InstResult(const VecPredRegContainer& v, const ResultType& t)
94  : type(t) { result.pred = v; }
95 
97  type = that.type;
98  switch (type) {
99  /* Given that misc regs are not written to, there may be invalids in
100  * the result stack. */
101  case ResultType::Invalid:
102  break;
103  case ResultType::Scalar:
104  result.integer = that.result.integer;
105  break;
106  case ResultType::VecElem:
107  result.vecElem = that.result.vecElem;
108  break;
109  case ResultType::VecReg:
110  result.vector = that.result.vector;
111  break;
113  result.pred = that.result.pred;
114  break;
115 
116  default:
117  panic("Assigning result from unknown result type");
118  break;
119  }
120  return *this;
121  }
126  bool operator==(const InstResult& that) const {
127  if (this->type != that.type)
128  return false;
129  switch (type) {
130  case ResultType::Scalar:
131  return result.integer == that.result.integer;
132  case ResultType::VecElem:
133  return result.vecElem == that.result.vecElem;
134  case ResultType::VecReg:
135  return result.vector == that.result.vector;
137  return result.pred == that.result.pred;
138  case ResultType::Invalid:
139  return false;
140  default:
141  panic("Unknown type of result: %d\n", (int)type);
142  }
143  }
144 
145  bool operator!=(const InstResult& that) const {
146  return !operator==(that);
147  }
148 
152  bool isScalar() const { return type == ResultType::Scalar; }
154  bool isVector() const { return type == ResultType::VecReg; }
156  bool isVecElem() const { return type == ResultType::VecElem; }
158  bool isPred() const { return type == ResultType::VecPredReg; }
160  bool isValid() const { return type != ResultType::Invalid; }
165  const uint64_t&
166  asInteger() const
167  {
168  assert(isScalar());
169  return result.integer;
170  }
171 
176  const uint64_t&
178  {
179  return result.integer;
180  }
181  const VecRegContainer&
182  asVector() const
183  {
184  panic_if(!isVector(), "Converting scalar (or invalid) to vector!!");
185  return result.vector;
186  }
187  const VecElem&
188  asVectorElem() const
189  {
190  panic_if(!isVecElem(), "Converting scalar (or invalid) to vector!!");
191  return result.vecElem;
192  }
193 
194  const VecPredRegContainer&
195  asPred() const
196  {
197  panic_if(!isPred(), "Converting scalar (or invalid) to predicate!!");
198  return result.pred;
199  }
200 
202 };
203 
204 #endif // __CPU_INST_RES_HH__
InstResult
Definition: inst_res.hh:46
InstResult::isScalar
bool isScalar() const
Checks.
Definition: inst_res.hh:152
InstResult::MultiResult::dbl
double dbl
Definition: inst_res.hh:53
InstResult::InstResult
InstResult(const VecPredRegContainer &v, const ResultType &t)
Predicate result.
Definition: inst_res.hh:93
InstResult::MultiResult::MultiResult
MultiResult()
Definition: inst_res.hh:57
VecPredRegContainer
Generic predicate register container.
Definition: vec_pred_reg.hh:47
ArmISA::VecRegContainer
VecReg::Container VecRegContainer
Definition: registers.hh:71
InstResult::asVector
const VecRegContainer & asVector() const
Definition: inst_res.hh:182
InstResult::VecElem
TheISA::VecElem VecElem
Definition: inst_res.hh:48
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
InstResult::ResultType::NumResultTypes
@ NumResultTypes
InstResult::ResultType::VecElem
@ VecElem
ArmISA::VecPredRegContainer
VecPredReg::Container VecPredRegContainer
Definition: registers.hh:77
InstResult::InstResult
InstResult(const VecRegContainer &v, const ResultType &t)
Vector result.
Definition: inst_res.hh:90
InstResult::InstResult
InstResult(T i, const ResultType &t)
Scalar result from scalar.
Definition: inst_res.hh:79
InstResult::ResultType::VecReg
@ VecReg
InstResult::isVecElem
bool isVecElem() const
Is this a vector element result?.
Definition: inst_res.hh:156
InstResult::asPred
const VecPredRegContainer & asPred() const
Definition: inst_res.hh:195
InstResult::result
MultiResult result
Definition: inst_res.hh:70
InstResult::ResultType
ResultType
Definition: inst_res.hh:60
ArmISA::VecElem
uint32_t VecElem
Definition: registers.hh:68
InstResult::isValid
bool isValid() const
Is this a valid result?.
Definition: inst_res.hh:160
InstResult::ResultType::Invalid
@ Invalid
InstResult::isPred
bool isPred() const
Is this a predicate result?.
Definition: inst_res.hh:158
InstResult::MultiResult::integer
uint64_t integer
Definition: inst_res.hh:52
InstResult::ResultType::Scalar
@ Scalar
InstResult::asIntegerNoAssert
const uint64_t & asIntegerNoAssert() const
Cast to integer without checking type.
Definition: inst_res.hh:177
InstResult::asInteger
const uint64_t & asInteger() const
Explicit cast-like operations.
Definition: inst_res.hh:166
InstResult::operator!=
bool operator!=(const InstResult &that) const
Definition: inst_res.hh:145
InstResult::asVectorElem
const VecElem & asVectorElem() const
Definition: inst_res.hh:188
InstResult::MultiResult::vector
VecRegContainer vector
Definition: inst_res.hh:54
vec_reg.hh
types.hh
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:197
InstResult::MultiResult::pred
VecPredRegContainer pred
Definition: inst_res.hh:56
ArmISA::t
Bitfield< 5 > t
Definition: miscregs_types.hh:67
InstResult::ResultType::VecPredReg
@ VecPredReg
InstResult::operator=
InstResult & operator=(const InstResult &that)
Definition: inst_res.hh:96
InstResult::operator==
bool operator==(const InstResult &that) const
Result comparison Two invalid results always differ.
Definition: inst_res.hh:126
InstResult::InstResult
InstResult()
Default constructor creates an invalid result.
Definition: inst_res.hh:75
InstResult::MultiResult
Definition: inst_res.hh:51
InstResult::isVector
bool isVector() const
Is this a vector result?.
Definition: inst_res.hh:154
InstResult::MultiResult::vecElem
VecElem vecElem
Definition: inst_res.hh:55
ArmISA::v
Bitfield< 28 > v
Definition: miscregs_types.hh:51
InstResult::type
ResultType type
Definition: inst_res.hh:71
VecRegContainer
Vector Register Abstraction This generic class is the model in a particularization of MVC,...
Definition: vec_reg.hh:156
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171

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