gem5
v20.1.0.0
arch
x86
regs
msr.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2011 Google
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* documentation and/or other materials provided with the distribution;
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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*/
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#ifndef __ARCH_X86_REG_MSR_HH__
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#define __ARCH_X86_REG_MSR_HH__
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#include <unordered_map>
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#include "
arch/x86/regs/misc.hh
"
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#include "
base/types.hh
"
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namespace
X86ISA
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{
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typedef
std::unordered_map<Addr, MiscRegIndex>
MsrMap
;
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extern
const
MsrMap
msrMap
;
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bool
msrAddrToIndex
(
MiscRegIndex
®Num,
Addr
addr
);
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}
// namespace X86ISA
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#endif // __ARCH_X86_REG_MSR_HH__
X86ISA::msrAddrToIndex
bool msrAddrToIndex(MiscRegIndex ®Num, Addr addr)
Find and return the misc reg corresponding to an MSR address.
Definition:
msr.cc:147
X86ISA
This is exposed globally, independent of the ISA.
Definition:
acpi.hh:55
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
X86ISA::addr
Bitfield< 3 > addr
Definition:
types.hh:79
X86ISA::MsrMap
std::unordered_map< Addr, MiscRegIndex > MsrMap
Definition:
msr.hh:40
types.hh
misc.hh
X86ISA::msrMap
const MsrMap msrMap
Map between MSR addresses and their corresponding misc registers.
X86ISA::MiscRegIndex
MiscRegIndex
Definition:
misc.hh:100
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