gem5  v20.1.0.0
mult.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2010 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef __ARCH_ARM_INSTS_MULT_HH__
39 #define __ARCH_ARM_INSTS_MULT_HH__
40 
42 #include "base/trace.hh"
43 
44 namespace ArmISA
45 {
46 
50 class Mult3 : public PredOp
51 {
52  protected:
54 
55  Mult3(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
56  IntRegIndex _reg0, IntRegIndex _reg1, IntRegIndex _reg2) :
57  PredOp(mnem, _machInst, __opClass),
58  reg0(_reg0), reg1(_reg1), reg2(_reg2)
59  {}
60 };
61 
65 class Mult4 : public Mult3
66 {
67  protected:
69 
70  Mult4(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
71  IntRegIndex _reg0, IntRegIndex _reg1,
72  IntRegIndex _reg2, IntRegIndex _reg3) :
73  Mult3(mnem, _machInst, __opClass, _reg0, _reg1, _reg2), reg3(_reg3)
74  {}
75 };
76 }
77 
78 #endif //__ARCH_ARM_INSTS_MULT_HH__
ArmISA::Mult4
Base class for multipy instructions using four registers.
Definition: mult.hh:65
ArmISA::IntRegIndex
IntRegIndex
Definition: intregs.hh:51
ArmISA::PredOp
Base class for predicated integer operations.
Definition: pred_inst.hh:210
ArmISA::Mult3::reg2
IntRegIndex reg2
Definition: mult.hh:53
ArmISA
Definition: ccregs.hh:41
ArmISA::Mult4::reg3
IntRegIndex reg3
Definition: mult.hh:68
ArmISA::Mult4::Mult4
Mult4(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _reg0, IntRegIndex _reg1, IntRegIndex _reg2, IntRegIndex _reg3)
Definition: mult.hh:70
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition: static_inst.hh:89
ArmISA::Mult3::Mult3
Mult3(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _reg0, IntRegIndex _reg1, IntRegIndex _reg2)
Definition: mult.hh:55
ArmISA::Mult3::reg0
IntRegIndex reg0
Definition: mult.hh:53
static_inst.hh
ArmISA::Mult3
Base class for multipy instructions using three registers.
Definition: mult.hh:50
trace.hh
ArmISA::Mult3::reg1
IntRegIndex reg1
Definition: mult.hh:53

Generated on Wed Sep 30 2020 14:02:00 for gem5 by doxygen 1.8.17