gem5
v20.1.0.0
cpu
simple
noncaching.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2012, 2018 ARM Limited
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*
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* The license below extends only to copyright in the software and shall
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*/
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#ifndef __CPU_SIMPLE_NONCACHING_HH__
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#define __CPU_SIMPLE_NONCACHING_HH__
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#include "
cpu/simple/atomic.hh
"
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#include "params/NonCachingSimpleCPU.hh"
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class
NonCachingSimpleCPU
:
public
AtomicSimpleCPU
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{
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public
:
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NonCachingSimpleCPU
(NonCachingSimpleCPUParams *
p
);
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void
verifyMemoryMode
()
const override
;
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protected
:
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Tick
sendPacket
(
RequestPort
&port,
const
PacketPtr
&pkt)
override
;
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};
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#endif // __CPU_SIMPLE_NONCACHING_HH__
NonCachingSimpleCPU::NonCachingSimpleCPU
NonCachingSimpleCPU(NonCachingSimpleCPUParams *p)
Definition:
noncaching.cc:40
atomic.hh
Tick
uint64_t Tick
Tick count type.
Definition:
types.hh:63
NonCachingSimpleCPU::verifyMemoryMode
void verifyMemoryMode() const override
Verify that the system is in a memory mode supported by the CPU.
Definition:
noncaching.cc:46
NonCachingSimpleCPU::sendPacket
Tick sendPacket(RequestPort &port, const PacketPtr &pkt) override
Definition:
noncaching.cc:55
NonCachingSimpleCPU
The NonCachingSimpleCPU is an AtomicSimpleCPU using the 'atomic_noncaching' memory mode instead of ju...
Definition:
noncaching.hh:48
AtomicSimpleCPU
Definition:
atomic.hh:50
RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition:
port.hh:74
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition:
packet.hh:257
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:323
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