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49 fatal(
"The direct CPU requires the memory system to be in the "
50 "'atomic_noncaching' mode.\n");
66 NonCachingSimpleCPUParams::create()
70 fatal(
"only one workload allowed");
NonCachingSimpleCPU(NonCachingSimpleCPUParams *p)
#define fatal(...)
This implements a cprintf based fatal() function.
uint64_t Tick
Tick count type.
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
PhysicalMemory & getPhysMem()
Get a pointer to access the physical memory of the system.
void verifyMemoryMode() const override
Verify that the system is in a memory mode supported by the CPU.
Tick sendPacket(RequestPort &port, const PacketPtr &pkt) override
The NonCachingSimpleCPU is an AtomicSimpleCPU using the 'atomic_noncaching' memory mode instead of ju...
bool bypassCaches() const
Should caches be bypassed?
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
void access(PacketPtr pkt)
Perform an untimed memory access and update all the state (e.g.
Tick sendAtomic(PacketPtr pkt)
Send an atomic request packet, where the data is moved and the state is updated in zero time,...
bool isAtomicMode() const
Is the system in atomic mode?
bool isMemAddr(Addr addr) const
Check if a physical address is within a range of a memory that is part of the global address map.
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