nvm_gen.hh

Go to the documentation of this file.

/*
 * Copyright (c) 2020 ARM Limited
 * All rights reserved
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed here under.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * Authors: Wendy Elsasser
 */
 
#ifndef __CPU_TRAFFIC_GEN_NVM_GEN_HH__
#define __CPU_TRAFFIC_GEN_NVM_GEN_HH__
 
#include "base/bitfield.hh"
#include "base/intmath.hh"
#include "enums/AddrMap.hh"
#include "mem/packet.hh"
#include "random_gen.hh"
 
class NvmGen : public RandomGen
{
 
  public:
 
    NvmGen(SimObject &obj,
           RequestorID requestor_id, Tick _duration,
           Addr start_addr, Addr end_addr,
           Addr _blocksize, Addr cacheline_size,
           Tick min_period, Tick max_period,
           uint8_t read_percent, Addr data_limit,
           unsigned int num_seq_pkts, unsigned int buffer_size,
           unsigned int nbr_of_banks, unsigned int nbr_of_banks_util,
           Enums::AddrMap addr_mapping,
           unsigned int nbr_of_ranks);
 
    PacketPtr getNextPacket();
 
    void genStartAddr(unsigned int new_bank, unsigned int new_rank);
 
  protected:
 
    const unsigned int numSeqPkts;
 
    unsigned int countNumSeqPkts;
 
    Addr addr;
 
    bool isRead;
 
    const unsigned int bufferSize;
 
    const unsigned int bufferBits;
 
    const unsigned int bankBits;
 
    const unsigned int blockBits;
 
    const unsigned int nbrOfBanksNVM;
 
    const unsigned int nbrOfBanksUtil;
 
    Enums::AddrMap addrMapping;
 
    const unsigned int rankBits;
 
    const unsigned int nbrOfRanks;
 
};
 
#endif