gem5
v20.1.0.0
cpu
thread_state.cc
Go to the documentation of this file.
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/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
cpu/thread_state.hh
"
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#include "
base/output.hh
"
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#include "
cpu/base.hh
"
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#include "
mem/port.hh
"
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#include "
mem/port_proxy.hh
"
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#include "
mem/se_translating_port_proxy.hh
"
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#include "
mem/translating_port_proxy.hh
"
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#include "
sim/full_system.hh
"
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#include "
sim/serialize.hh
"
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#include "
sim/system.hh
"
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ThreadState::ThreadState
(
BaseCPU
*cpu,
ThreadID
_tid,
Process
*_process)
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: numInst(0), numOp(0), threadStats(cpu, this),
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numLoad(0), startNumLoad(0),
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_status(
ThreadContext
::Halted), baseCpu(cpu),
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_contextId(0), _threadId(_tid), lastActivate(0), lastSuspend(0),
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process(_process), physProxy(NULL), virtProxy(NULL),
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funcExeInst(0), storeCondFailures(0)
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{
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}
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ThreadState::~ThreadState
()
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{
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if
(
physProxy
!= NULL)
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delete
physProxy
;
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if
(
virtProxy
!= NULL)
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delete
virtProxy
;
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}
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void
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ThreadState::serialize
(
CheckpointOut
&
cp
)
const
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{
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SERIALIZE_ENUM
(
_status
);
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// thread_num and cpu_id are deterministic from the config
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SERIALIZE_SCALAR
(
funcExeInst
);
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if
(!
FullSystem
)
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return
;
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}
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void
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ThreadState::unserialize
(
CheckpointIn
&
cp
)
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{
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UNSERIALIZE_ENUM
(
_status
);
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// thread_num and cpu_id are deterministic from the config
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UNSERIALIZE_SCALAR
(
funcExeInst
);
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if
(!
FullSystem
)
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return
;
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}
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void
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ThreadState::initMemProxies
(
ThreadContext
*tc)
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{
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// The port proxies only refer to the data port on the CPU side
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// and can safely be done at init() time even if the CPU is not
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// connected, i.e. when restoring from a checkpoint and later
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// switching the CPU in.
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if
(
FullSystem
) {
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assert(
physProxy
== NULL);
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// This cannot be done in the constructor as the thread state
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// itself is created in the base cpu constructor and the
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// getSendFunctional is a virtual function
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physProxy
=
new
PortProxy
(
baseCpu
->
getSendFunctional
(),
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baseCpu
->
cacheLineSize
());
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assert(
virtProxy
== NULL);
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virtProxy
=
new
TranslatingPortProxy
(tc);
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}
else
{
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assert(
virtProxy
== NULL);
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virtProxy
=
new
SETranslatingPortProxy
(
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tc,
SETranslatingPortProxy::NextPage
);
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}
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}
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PortProxy
&
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ThreadState::getPhysProxy
()
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{
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assert(
FullSystem
);
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assert(
physProxy
!= NULL);
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return
*
physProxy
;
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}
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PortProxy
&
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ThreadState::getVirtProxy
()
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{
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assert(
virtProxy
!= NULL);
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return
*
virtProxy
;
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}
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ThreadState::ThreadStateStats::ThreadStateStats
(
BaseCPU
*cpu,
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ThreadState
*thread)
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:
Stats
::Group(cpu,
csprintf
(
"thread%i"
, thread->threadId()).c_str()),
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ADD_STAT
(numInsts,
"Number of Instructions committed"
),
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ADD_STAT
(numOps,
"Number of Ops committed"
),
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ADD_STAT
(numMemRefs,
"Number of Memory References"
)
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{
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}
thread_state.hh
ThreadState::funcExeInst
Counter funcExeInst
Definition:
thread_state.hh:166
SETranslatingPortProxy
Definition:
se_translating_port_proxy.hh:46
system.hh
serialize.hh
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition:
serialize.hh:797
Process
Definition:
process.hh:65
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition:
types.hh:227
ThreadState::virtProxy
PortProxy * virtProxy
A translating port proxy, outgoing only, for functional accesse to virtual addresses.
Definition:
thread_state.hh:159
BaseCPU::cacheLineSize
unsigned int cacheLineSize() const
Get the cache line size of the system.
Definition:
base.hh:376
translating_port_proxy.hh
FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition:
root.cc:132
output.hh
BaseCPU::getSendFunctional
virtual PortProxy::SendFunctionalFunc getSendFunctional()
Returns a sendFunctional delegate for use with port proxies.
Definition:
base.hh:162
SERIALIZE_ENUM
#define SERIALIZE_ENUM(scalar)
Definition:
serialize.hh:813
ThreadState
Struct for holding general thread state that is needed across CPU models.
Definition:
thread_state.hh:46
ThreadState::_status
ThreadContext::Status _status
Definition:
thread_state.hh:132
cp
Definition:
cprintf.cc:40
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
ADD_STAT
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
Definition:
group.hh:67
ThreadState::getPhysProxy
PortProxy & getPhysProxy()
Definition:
thread_state.cc:107
port_proxy.hh
SETranslatingPortProxy::NextPage
@ NextPage
Definition:
se_translating_port_proxy.hh:53
port.hh
ThreadState::physProxy
PortProxy * physProxy
A port proxy outgoing only for functional accesses to physical addresses.
Definition:
thread_state.hh:155
ThreadState::ThreadState
ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
Definition:
thread_state.cc:41
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition:
serialize.hh:790
ThreadState::baseCpu
BaseCPU * baseCpu
Definition:
thread_state.hh:135
full_system.hh
BaseCPU
Definition:
cpu_dummy.hh:43
TranslatingPortProxy
This proxy attempts to translate virtual addresses using the TLBs.
Definition:
translating_port_proxy.hh:55
PortProxy
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition:
port_proxy.hh:80
ThreadState::initMemProxies
void initMemProxies(ThreadContext *tc)
Initialise the physical and virtual port proxies and tie them to the data port of the CPU.
Definition:
thread_state.cc:83
base.hh
ThreadState::~ThreadState
virtual ~ThreadState()
Definition:
thread_state.cc:51
ThreadState::getVirtProxy
PortProxy & getVirtProxy()
Definition:
thread_state.cc:115
ThreadState::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition:
thread_state.cc:71
CheckpointOut
std::ostream CheckpointOut
Definition:
serialize.hh:63
Stats
Definition:
statistics.cc:61
UNSERIALIZE_ENUM
#define UNSERIALIZE_ENUM(scalar)
Definition:
serialize.hh:820
se_translating_port_proxy.hh
ThreadState::ThreadStateStats::ThreadStateStats
ThreadStateStats(BaseCPU *cpu, ThreadState *thread)
Definition:
thread_state.cc:121
CheckpointIn
Definition:
serialize.hh:67
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition:
cprintf.hh:158
ThreadState::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition:
thread_state.cc:60
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