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tlb_coalescer.hh
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33 
34 #ifndef __TLB_COALESCER_HH__
35 #define __TLB_COALESCER_HH__
36 
37 #include <list>
38 #include <queue>
39 #include <string>
40 #include <vector>
41 
42 #include "arch/generic/tlb.hh"
43 #include "arch/isa.hh"
44 #include "arch/x86/pagetable.hh"
45 #include "arch/x86/regs/segment.hh"
46 #include "base/logging.hh"
47 #include "base/statistics.hh"
48 #include "gpu-compute/gpu_tlb.hh"
49 #include "mem/port.hh"
50 #include "mem/request.hh"
51 #include "params/TLBCoalescer.hh"
52 #include "sim/clocked_object.hh"
53 
54 class BaseTLB;
55 class Packet;
56 class ThreadContext;
57 
66 {
67  public:
68  typedef TLBCoalescerParams Params;
69  TLBCoalescer(const Params *p);
71 
72  // Number of TLB probes per cycle. Parameterizable - default 2.
74 
75  // Consider coalescing across that many ticks.
76  // Paraemterizable - default 1.
78 
79  // Each coalesced request consists of multiple packets
80  // that all fall within the same virtual page
82 
83  // disables coalescing when true
85 
86  /*
87  * This is a hash map with <tick_index> as a key.
88  * It contains a vector of coalescedReqs per <tick_index>.
89  * Requests are buffered here until they can be issued to
90  * the TLB, at which point they are copied to the
91  * issuedTranslationsTable hash map.
92  *
93  * In terms of coalescing, we coalesce requests in a given
94  * window of x cycles by using tick_index = issueTime/x as a
95  * key, where x = coalescingWindow. issueTime is the issueTime
96  * of the pkt from the ComputeUnit's perspective, but another
97  * option is to change it to curTick(), so we coalesce based
98  * on the receive time.
99  */
100  typedef std::unordered_map<int64_t, std::vector<coalescedReq>>
102 
104 
105  /*
106  * issuedTranslationsTabler: a hash_map indexed by virtual page
107  * address. Each hash_map entry has a vector of PacketPtr associated
108  * with it denoting the different packets that share an outstanding
109  * coalesced translation request for the same virtual page.
110  *
111  * The rules that determine which requests we can coalesce are
112  * specified in the canCoalesce() method.
113  */
114  typedef std::unordered_map<Addr, coalescedReq> CoalescingTable;
115 
117 
118  // number of packets the coalescer receives
120  // number packets the coalescer send to the TLB
122 
123  // Number of cycles the coalesced requests spend waiting in
124  // coalescerFIFO. For each packet the coalescer receives we take into
125  // account the number of all uncoalesced requests this pkt "represents"
127 
128  // On average how much time a request from the
129  // uncoalescedAccesses that reaches the TLB
130  // spends waiting?
132  // localqueuingCycles/uncoalescedAccesses
134 
135  bool canCoalesce(PacketPtr pkt1, PacketPtr pkt2);
136  void updatePhysAddresses(PacketPtr pkt);
137  void regStats() override;
138 
139  class CpuSidePort : public ResponsePort
140  {
141  public:
142  CpuSidePort(const std::string &_name, TLBCoalescer *tlb_coalescer,
143  PortID _index)
144  : ResponsePort(_name, tlb_coalescer), coalescer(tlb_coalescer),
145  index(_index) { }
146 
147  protected:
149  int index;
150 
151  virtual bool recvTimingReq(PacketPtr pkt);
152  virtual Tick recvAtomic(PacketPtr pkt) { return 0; }
153  virtual void recvFunctional(PacketPtr pkt);
154  virtual void recvRangeChange() { }
155  virtual void recvReqRetry();
156 
157  virtual void
159  {
160  fatal("recvRespRetry() is not implemented in the TLB "
161  "coalescer.\n");
162  }
163 
164  virtual AddrRangeList getAddrRanges() const;
165  };
166 
167  class MemSidePort : public RequestPort
168  {
169  public:
170  MemSidePort(const std::string &_name, TLBCoalescer *tlb_coalescer,
171  PortID _index)
172  : RequestPort(_name, tlb_coalescer), coalescer(tlb_coalescer),
173  index(_index) { }
174 
176 
177  protected:
179  int index;
180 
181  virtual bool recvTimingResp(PacketPtr pkt);
182  virtual Tick recvAtomic(PacketPtr pkt) { return 0; }
183  virtual void recvFunctional(PacketPtr pkt);
184  virtual void recvRangeChange() { }
185  virtual void recvReqRetry();
186 
187  virtual void
189  {
190  fatal("recvRespRetry() not implemented in TLB coalescer");
191  }
192  };
193 
194  // Coalescer response ports on the cpu Side
196  // Coalescer request ports on the memory side
198 
199  Port &getPort(const std::string &if_name,
200  PortID idx=InvalidPortID) override;
201 
202  void processProbeTLBEvent();
205 
206  void processCleanupEvent();
210 
211  // this FIFO queue keeps track of the virt. page
212  // addresses that are pending cleanup
213  std::queue<Addr> cleanupQueue;
214 };
215 
216 #endif // __TLB_COALESCER_HH__
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:183
pagetable.hh
TLBCoalescer::CpuSidePort
Definition: tlb_coalescer.hh:139
ResponsePort
A ResponsePort is a specialization of a port.
Definition: port.hh:265
TLBCoalescer::issuedTranslationsTable
CoalescingTable issuedTranslationsTable
Definition: tlb_coalescer.hh:116
TLBCoalescer::cleanupEvent
EventFunctionWrapper cleanupEvent
The cleanupEvent is scheduled after a TLBEvent triggers in order to free memory and do the required c...
Definition: tlb_coalescer.hh:209
TLBCoalescer::CoalescingTable
std::unordered_map< Addr, coalescedReq > CoalescingTable
Definition: tlb_coalescer.hh:114
TLBCoalescer::processCleanupEvent
void processCleanupEvent()
Definition: tlb_coalescer.cc:511
TLBCoalescer::coalescerFIFO
CoalescingFIFO coalescerFIFO
Definition: tlb_coalescer.hh:103
InvalidPortID
const PortID InvalidPortID
Definition: types.hh:238
TLBCoalescer
The TLBCoalescer is a ClockedObject sitting on the front side (CPUSide) of each TLB.
Definition: tlb_coalescer.hh:65
TLBCoalescer::TLBProbesPerCycle
int TLBProbesPerCycle
Definition: tlb_coalescer.hh:73
TLBCoalescer::Params
TLBCoalescerParams Params
Definition: tlb_coalescer.hh:68
tlb.hh
TLBCoalescer::coalescingWindow
int coalescingWindow
Definition: tlb_coalescer.hh:77
TLBCoalescer::MemSidePort::recvFunctional
virtual void recvFunctional(PacketPtr pkt)
Definition: tlb_coalescer.cc:387
TLBCoalescer::canCoalesce
bool canCoalesce(PacketPtr pkt1, PacketPtr pkt2)
Definition: tlb_coalescer.cc:95
TLBCoalescer::MemSidePort::MemSidePort
MemSidePort(const std::string &_name, TLBCoalescer *tlb_coalescer, PortID _index)
Definition: tlb_coalescer.hh:170
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
TLBCoalescer::uncoalescedAccesses
Stats::Scalar uncoalescedAccesses
Definition: tlb_coalescer.hh:119
PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:237
TLBCoalescer::CpuSidePort::getAddrRanges
virtual AddrRangeList getAddrRanges() const
Get a list of the non-overlapping address ranges the owner is responsible for.
Definition: tlb_coalescer.cc:360
std::vector
STL vector class.
Definition: stl.hh:37
TLBCoalescer::TLBCoalescer
TLBCoalescer(const Params *p)
Definition: tlb_coalescer.cc:43
TLBCoalescer::CoalescingFIFO
std::unordered_map< int64_t, std::vector< coalescedReq > > CoalescingFIFO
Definition: tlb_coalescer.hh:101
TLBCoalescer::MemSidePort::coalescer
TLBCoalescer * coalescer
Definition: tlb_coalescer.hh:178
TLBCoalescer::CpuSidePort::CpuSidePort
CpuSidePort(const std::string &_name, TLBCoalescer *tlb_coalescer, PortID _index)
Definition: tlb_coalescer.hh:142
request.hh
BaseTLB
Definition: tlb.hh:50
TLBCoalescer::CpuSidePort::recvReqRetry
virtual void recvReqRetry()
Definition: tlb_coalescer.cc:327
TLBCoalescer::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: tlb_coalescer.cc:69
ClockedObject
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Definition: clocked_object.hh:231
EventFunctionWrapper
Definition: eventq.hh:1101
Stats::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:2533
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
TLBCoalescer::MemSidePort::recvTimingResp
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
Definition: tlb_coalescer.cc:369
TLBCoalescer::localLatency
Stats::Formula localLatency
Definition: tlb_coalescer.hh:133
statistics.hh
segment.hh
Port
Ports are used to interface objects to each other.
Definition: port.hh:56
TLBCoalescer::disableCoalescing
bool disableCoalescing
Definition: tlb_coalescer.hh:84
TLBCoalescer::updatePhysAddresses
void updatePhysAddresses(PacketPtr pkt)
Definition: tlb_coalescer.cc:140
port.hh
TLBCoalescer::processProbeTLBEvent
void processProbeTLBEvent()
Definition: tlb_coalescer.cc:405
TLBCoalescer::CpuSidePort::recvTimingReq
virtual bool recvTimingReq(PacketPtr pkt)
Receive a timing request from the peer.
Definition: tlb_coalescer.cc:228
TLBCoalescer::CpuSidePort::index
int index
Definition: tlb_coalescer.hh:149
RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:74
gpu_tlb.hh
TLBCoalescer::~TLBCoalescer
~TLBCoalescer()
Definition: tlb_coalescer.hh:70
TLBCoalescer::CpuSidePort::coalescer
TLBCoalescer * coalescer
Definition: tlb_coalescer.hh:148
TLBCoalescer::CpuSidePort::recvFunctional
virtual void recvFunctional(PacketPtr pkt)
Receive a functional request packet from the peer.
Definition: tlb_coalescer.cc:333
TLBCoalescer::MemSidePort::recvRangeChange
virtual void recvRangeChange()
Called to receive an address range change from the peer response port.
Definition: tlb_coalescer.hh:184
TLBCoalescer::MemSidePort::recvRespRetry
virtual void recvRespRetry()
Definition: tlb_coalescer.hh:188
TLBCoalescer::memSidePort
std::vector< MemSidePort * > memSidePort
Definition: tlb_coalescer.hh:197
TLBCoalescer::probeTLBEvent
EventFunctionWrapper probeTLBEvent
This event issues the TLB probes.
Definition: tlb_coalescer.hh:204
TLBCoalescer::MemSidePort::index
int index
Definition: tlb_coalescer.hh:179
TLBCoalescer::MemSidePort::retries
std::deque< PacketPtr > retries
Definition: tlb_coalescer.hh:175
clocked_object.hh
Stats::Formula
A formula for statistics that is calculated when printed.
Definition: statistics.hh:3037
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
std::deque
STL deque class.
Definition: stl.hh:44
TLBCoalescer::localqueuingCycles
Stats::Scalar localqueuingCycles
Definition: tlb_coalescer.hh:131
logging.hh
TLBCoalescer::cleanupQueue
std::queue< Addr > cleanupQueue
Definition: tlb_coalescer.hh:213
TLBCoalescer::queuingCycles
Stats::Scalar queuingCycles
Definition: tlb_coalescer.hh:126
TLBCoalescer::CpuSidePort::recvRangeChange
virtual void recvRangeChange()
Definition: tlb_coalescer.hh:154
TLBCoalescer::MemSidePort
Definition: tlb_coalescer.hh:167
TLBCoalescer::regStats
void regStats() override
Callback to set stat parameters.
Definition: tlb_coalescer.cc:524
TLBCoalescer::cpuSidePort
std::vector< CpuSidePort * > cpuSidePort
Definition: tlb_coalescer.hh:195
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
TLBCoalescer::coalescedReq
std::vector< PacketPtr > coalescedReq
Definition: tlb_coalescer.hh:81
TLBCoalescer::CpuSidePort::recvRespRetry
virtual void recvRespRetry()
Called by the peer if sendTimingResp was called on this protocol (causing recvTimingResp to be called...
Definition: tlb_coalescer.hh:158
TLBCoalescer::coalescedAccesses
Stats::Scalar coalescedAccesses
Definition: tlb_coalescer.hh:121
TLBCoalescer::MemSidePort::recvAtomic
virtual Tick recvAtomic(PacketPtr pkt)
Definition: tlb_coalescer.hh:182
TLBCoalescer::CpuSidePort::recvAtomic
virtual Tick recvAtomic(PacketPtr pkt)
Receive an atomic request packet from the peer.
Definition: tlb_coalescer.hh:152
TLBCoalescer::MemSidePort::recvReqRetry
virtual void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
Definition: tlb_coalescer.cc:378

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