gem5  v22.1.0.0
Classes | Namespaces | Functions | Variables
aapcs64.hh File Reference
#include <algorithm>
#include <array>
#include <type_traits>
#include <utility>
#include "arch/arm/regs/int.hh"
#include "arch/arm/regs/vec.hh"
#include "arch/arm/utility.hh"
#include "base/intmath.hh"
#include "cpu/thread_context.hh"
#include "sim/guest_abi.hh"
#include "sim/proxy_ptr.hh"

Go to the source code of this file.

Classes

struct  gem5::Aapcs64
 
struct  gem5::Aapcs64::State
 
struct  gem5::guest_abi::IsAapcs64ShortVector< T, Enabled >
 
struct  gem5::guest_abi::IsAapcs64ShortVector< E[N], typename std::enable_if_t<(std::is_integral_v< E >||std::is_floating_point_v< E >) &&(sizeof(E) *N==8||sizeof(E) *N==16)> >
 
struct  gem5::guest_abi::IsAapcs64Composite< T, Enabled >
 
struct  gem5::guest_abi::IsAapcs64Composite< T, typename std::enable_if_t<(std::is_array_v< T >||std::is_class_v< T >||std::is_union_v< T >) &&!IsVarArgsV< T > &&!IsAapcs64ShortVectorV< T > > >
 
struct  gem5::guest_abi::IsAapcs64Hfa< T, Enabled >
 
struct  gem5::guest_abi::Argument< Aapcs64, Integer, typename std::enable_if_t< std::is_integral_v< Integer > &&(sizeof(Integer)<=8)> >
 
struct  gem5::guest_abi::Argument< Aapcs64, Integer, typename std::enable_if_t< std::is_integral_v< Integer > &&(sizeof(Integer) > 8)> >
 
struct  gem5::guest_abi::Result< Aapcs64, Integer, typename std::enable_if_t< std::is_integral_v< Integer > &&(sizeof(Integer)<=8)> >
 
struct  gem5::guest_abi::Result< Aapcs64, Integer, typename std::enable_if_t< std::is_integral_v< Integer > &&(sizeof(Integer) > 8)> >
 
struct  gem5::guest_abi::Aapcs64ArrayType< T >
 
struct  gem5::guest_abi::Aapcs64ArrayType< E[N]>
 
struct  gem5::guest_abi::Argument< Aapcs64, HA, typename std::enable_if_t< IsAapcs64HxaV< HA > > >
 
struct  gem5::guest_abi::Result< Aapcs64, HA, typename std::enable_if_t< IsAapcs64HxaV< HA > > >
 
struct  gem5::guest_abi::Argument< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64CompositeV< Composite > &&!IsAapcs64HxaV< Composite > > >
 
struct  gem5::guest_abi::Result< Aapcs64, Composite, typename std::enable_if_t< IsAapcs64CompositeV< Composite > &&!IsAapcs64HxaV< Composite > > >
 

Namespaces

 gem5
 Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
 
 gem5::guest_abi
 

Functions

 gem5::GEM5_DEPRECATED_NAMESPACE (GuestABI, guest_abi)
 
template<typename E , size_t N>
struct IsAapcs64Hfa< E[N], typename std::enable_if_t< std::is_floating_point_v< E > &&N<=4 > > :public std::true_type{};template< typename T >constexpr bool IsAapcs64HfaV=IsAapcs64Hfa< T >::value;template< typename T, typename Enabled=void >struct IsAapcs64Hva :public std::false_type {};template< typename E, size_t N >struct IsAapcs64Hva< E[N], typename std::enable_if_t< IsAapcs64ShortVectorV< E > &&N<=4 > > :public std::true_type{};template< typename T >constexpr bool IsAapcs64HvaV=IsAapcs64Hva< T >::value;template< typename T, typename Enabled=void >struct IsAapcs64Hxa :public std::false_type {};template< typename T >struct IsAapcs64Hxa< T, typename std::enable_if_t< IsAapcs64HfaV< T >||IsAapcs64HvaV< T > > > :public std::true_type{};template< typename T >constexpr bool IsAapcs64HxaV=IsAapcs64Hxa< T >::value;struct Aapcs64ArgumentBase{ template< typename T > static T loadFromStack(ThreadContext *tc, Aapcs64::State &state) { size_t align=std::max< size_t >(8, alignof(T));size_t size=roundUp(sizeof(T), 8);state.nsaa=roundUp(state.nsaa, align);ConstVPtr< T > val(state.nsaa, tc);state.nsaa+=size;return gtoh(*val, ArmISA::byteOrder(tc));}};template< typename Float >struct Argument< Aapcs64, Float, typename std::enable_if_t< std::is_floating_point_v< Float >||IsAapcs64ShortVectorV< Float > > > :public Aapcs64ArgumentBase{ static Float get(ThreadContext *tc, Aapcs64::State &state) { if(state.nsrn<=state.MAX_SRN) { RegId id=ArmISA::vecRegClass[state.nsrn++];ArmISA::VecRegContainer vc;tc->getReg(id, &vc);return vc.as< Float >()[0];} return loadFromStack< Float >(tc, state);}};template< typename Float >struct Result< Aapcs64, Float, typename std::enable_if_t< std::is_floating_point_v< Float >||IsAapcs64ShortVectorV< Float > > >{ static void store(ThreadContext *tc, const Float &f) { RegId id=ArmISA::vecRegClass[0];ArmISA::VecRegContainer reg;tc-> gem5::guest_abi::getReg (id, &reg)
 
reg gem5::guest_abi::as< Float > ()[0]
 
tc gem5::guest_abi::setReg (id, &reg)
 

Variables

template<typename T >
constexpr bool gem5::guest_abi::IsAapcs64ShortVectorV = IsAapcs64ShortVector<T>::value
 
template<typename T >
constexpr bool gem5::guest_abi::IsAapcs64CompositeV = IsAapcs64Composite<T>::value
 

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