gem5  v22.0.0.2
faults.hh
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29 
30 #ifndef __ARCH_POWER_FAULTS_HH__
31 #define __ARCH_POWER_FAULTS_HH__
32 
33 #include "sim/faults.hh"
34 
35 namespace gem5
36 {
37 
38 namespace PowerISA
39 {
40 
41 class PowerFault : public FaultBase
42 {
43  protected:
45 
47  : _name(name)
48  {
49  }
50 
51  FaultName
52  name() const
53  {
54  return _name;
55  }
56 };
57 
58 
60 {
61  public:
63  : PowerFault("Unimplemented Opcode")
64  {
65  }
66 
67  void invoke(ThreadContext *tc, const StaticInstPtr &inst =
68  nullStaticInstPtr) override;
69 };
70 
71 
73 {
74  public:
76  : PowerFault("Machine Check")
77  {
78  }
79 };
80 
81 
82 class AlignmentFault : public PowerFault
83 {
84  private:
86  public:
88  : PowerFault("Alignment"), vaddr(va)
89  {
90  }
91 
92  void invoke(ThreadContext *tc, const StaticInstPtr &inst =
93  nullStaticInstPtr) override;
94 };
95 
96 
97 class TrapFault : public PowerFault
98 {
99  public:
101  : PowerFault("Trap")
102  {
103  }
104 
105  void invoke(ThreadContext *tc, const StaticInstPtr &inst =
106  nullStaticInstPtr) override;
107 };
108 
109 } // namespace PowerISA
110 } // namespace gem5
111 
112 #endif // __ARCH_POWER_FAULTS_HH__
gem5::PowerISA::MachineCheckFault::MachineCheckFault
MachineCheckFault()
Definition: faults.hh:75
gem5::PowerISA::PowerFault::PowerFault
PowerFault(FaultName name)
Definition: faults.hh:46
gem5::PowerISA::PowerFault::_name
FaultName _name
Definition: faults.hh:44
gem5::PowerISA::TrapFault
Definition: faults.hh:97
faults.hh
gem5::RefCountingPtr< StaticInst >
gem5::PowerISA::AlignmentFault::AlignmentFault
AlignmentFault(Addr va)
Definition: faults.hh:87
gem5::nullStaticInstPtr
const StaticInstPtr nullStaticInstPtr
Statically allocated null StaticInstPtr.
Definition: null_static_inst.cc:36
gem5::PowerISA::AlignmentFault::vaddr
Addr vaddr
Definition: faults.hh:85
gem5::PowerISA::MachineCheckFault
Definition: faults.hh:72
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:94
gem5::PowerISA::PowerFault::name
FaultName name() const
Definition: faults.hh:52
gem5::PowerISA::PowerFault
Definition: faults.hh:41
gem5::PowerISA::UnimplementedOpcodeFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition: faults.cc:43
gem5::PowerISA::AlignmentFault
Definition: faults.hh:82
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ArmISA::va
Bitfield< 8 > va
Definition: misc_types.hh:276
gem5::FaultName
const typedef char * FaultName
Definition: faults.hh:53
gem5::FaultBase
Definition: translation_gen.test.cc:49
gem5::PowerISA::TrapFault::TrapFault
TrapFault()
Definition: faults.hh:100
gem5::PowerISA::UnimplementedOpcodeFault
Definition: faults.hh:59
gem5::PowerISA::UnimplementedOpcodeFault::UnimplementedOpcodeFault
UnimplementedOpcodeFault()
Definition: faults.hh:62
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::PowerISA::AlignmentFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition: faults.cc:51
gem5::PowerISA::TrapFault::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition: faults.cc:58

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