gem5 v24.0.0.0
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faults.hh
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1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2009 The University of Edinburgh
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#ifndef __ARCH_POWER_FAULTS_HH__
31#define __ARCH_POWER_FAULTS_HH__
32
33#include "sim/faults.hh"
34
35namespace gem5
36{
37
38namespace PowerISA
39{
40
41class PowerFault : public FaultBase
42{
43 protected:
45
50
52 name() const
53 {
54 return _name;
55 }
56};
57
58
60{
61 public:
63 : PowerFault("Unimplemented Opcode")
64 {
65 }
66
67 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
68 nullStaticInstPtr) override;
69};
70
71
73{
74 public:
76 : PowerFault("Machine Check")
77 {
78 }
79};
80
81
83{
84 private:
86 public:
88 : PowerFault("Alignment"), vaddr(va)
89 {
90 }
91
92 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
93 nullStaticInstPtr) override;
94};
95
96
97class TrapFault : public PowerFault
98{
99 public:
101 : PowerFault("Trap")
102 {
103 }
104
105 void invoke(ThreadContext *tc, const StaticInstPtr &inst =
106 nullStaticInstPtr) override;
107};
108
109} // namespace PowerISA
110} // namespace gem5
111
112#endif // __ARCH_POWER_FAULTS_HH__
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:52
PowerFault(FaultName name)
Definition faults.hh:46
FaultName name() const
Definition faults.hh:52
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:61
void invoke(ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
Definition faults.cc:43
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Bitfield< 8 > va
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
const char * FaultName
Definition faults.hh:55
const StaticInstPtr nullStaticInstPtr
Statically allocated null StaticInstPtr.

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