gem5  v22.1.0.0
types.hh
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1 /*
2  * Copyright (c) 2013 ARM Limited
3  * Copyright (c) 2014 Sven Karlsson
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5  *
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15  * Copyright (c) 2017 The University of Virginia
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41 
42 #ifndef __ARCH_RISCV_TYPES_HH__
43 #define __ARCH_RISCV_TYPES_HH__
44 
45 #include "arch/riscv/pcstate.hh"
46 
47 namespace gem5
48 {
49 
50 namespace RiscvISA
51 {
52 
53 typedef uint32_t MachInst;
54 typedef uint64_t ExtMachInst;
55 
56 } // namespace RiscvISA
57 } // namespace gem5
58 
59 #endif // __ARCH_RISCV_TYPES_HH__
uint32_t MachInst
Definition: types.hh:53
uint64_t ExtMachInst
Definition: types.hh:54
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....

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